IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
Tegra186 has multiple PWM controllers with only one output instead of
one controller with four outputs in earlier SoC generations.
Add support for Tegra186 and detect the number of PWM outputs using
device tree match data.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
duty_ns * (1 << PWM_DUTY_WIDTH) could overflow in integer calculation
when the PWM rate is low. Hence do all calculation on unsigned long long
to avoid overflow.
Signed-off-by: Hyong Bin Kim <hyongbink@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
To get 100 % duty cycle (always high), pulse width needs to be set to
256.
Signed-off-by: Victor(Weiguo) Pan <wpan@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add reset control of the PWM controller to reset it before
accessing the PWM register.
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The former is much longer to type and is ambiguous because the value
stored in the field is not the (physical) base address of the memory-
mapped I/O registers, but the virtual address of those registers as
mapped through the MMU.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This macro is used to initialize the ->npwm field of the PWM chip. Use a
literal instead and make all other places rely on ->npwm.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Some PWM drivers are testing the PWMF_ENABLED flag. Create a helper
function to hide the logic behind enabled test. This will allow us to
smoothly move from the current approach to an atomic PWM update
approach.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Instead of using the literal value for the number of nanoseconds per
second, use the macro instead to increase readability.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Some drivers don't set the .owner fields of the struct device_driver or
struct pwm_ops, which causes the module usage count to become wrong.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
A few drivers already annotate this properly. Make the same change for
all other OF supporting drivers.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
A new driver has been added to support the PWM mode of the timer counter
blocks found on Atmel AT91 SoCs. The VT8500 driver now supports changing
the PWM signal polarity and the TI drivers (EHRPWM and ECAP) gained
suspend and resume functionality.
User drivers can now query the core for whether access to a PWM device
will sleep (if the PWM chip is on a slow bus such as I2C or SPI).
The pwm-backlight driver now handles the backlight BL_CORE_FBBLANK state
in addition to the FB layer's blanking states.
To round things off, a few fixes and cleanups are also included.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQIcBAABAgAGBQJRKxfbAAoJEN0jrNd/PrOhcwEP/0plVf30QDMhcan1GR3l+jmK
3Q/cCNIWEZ75mRu+FtVYKUOduxkCOHR6LM4C2ScGnnpsS/X5oitc45FrblIwQaEI
UeWVxDqI+pEp+rCdYVCND4lih60FJU0Cct0zZL2db4D4idF+8FRChhzwzSXhajnj
ZZqz782Y2ig3YTLHtVGT1pp61DKxdu1Gz4U+fxo4G1/fnkquCYDzbCQovcmPSnnF
gYB8hfxgT9JIt2cHrK6eKCHBF/4GToU+x5zDV2Ub15C2K/UQ+qgw82yl8MNd/ZS5
rFA06iW3icnJRRc8u6hu9WVjNVNTBrUqUlFhctNB01d5jF4R6uR6aEvovT9xe8NW
Wa5v5WrjnL6SWpZVwb/3kwwJmkeU9zKESQt5KUw3VKnT8yr2BfxcH1gJIiuW6wK7
uYqknAvt2rwMEGzaKZJmQH682wNMxpJirs8hG9VjJc/v7AOnk6586HbRupAq8wWZ
qK4n1Fto9RCg+b6e/hDId7+mN1GEcA5B8BOotPQ6ud+cinDZBKSbCSHhQG2LQ++F
m81BbL82H2R2ICRoYNA74/bKq5OVOFFqHLHg5bUrG7ikdNbYOTK/4dF9qSS7DnT3
Bi6WnKpOtfpWbHBnDunP2vBFo3f+gXmbLJdgarxk7mneV8wp0GY6TYI1awWn0hI9
82JP3yiK5kW2JZv92o0H
=Fcxi
-----END PGP SIGNATURE-----
Merge tag 'for-3.9-rc1' of git://gitorious.org/linux-pwm/linux-pwm
Pull PWM changes from Thierry Reding:
"A new driver has been added to support the PWM mode of the timer
counter blocks found on Atmel AT91 SoCs. The VT8500 driver now
supports changing the PWM signal polarity and the TI drivers (EHRPWM
and ECAP) gained suspend and resume functionality.
User drivers can now query the core for whether access to a PWM device
will sleep (if the PWM chip is on a slow bus such as I2C or SPI).
The pwm-backlight driver now handles the backlight BL_CORE_FBBLANK
state in addition to the FB layer's blanking states.
To round things off, a few fixes and cleanups are also included"
* tag 'for-3.9-rc1' of git://gitorious.org/linux-pwm/linux-pwm:
pwm: twl: Use to_twl() instead of container_of()
pwm: tegra: assume CONFIG_OF
pwm_backlight: Validate dft_brightness in main probe function
pwm: Export pwm_{set,get}_chip_data()
pwm: Make Kconfig entries more consistent
pwm: Add can_sleep property to drivers
pwm: Add pwm_can_sleep() as exported API to users
pwm-backlight: handle BL_CORE_FBBLANK state
pwm: pwm-tiecap: Low power sleep support
pwm: pwm-tiehrpwm: Low power sleep support
pwm: pwm-tiehrpwm: Update the clock handling of pwm-tiehrpwm driver
pwm: vt8500: Add polarity support
pwm: vt8500: Register write busy test performed incorrectly
pwm: atmel: add Timer Counter Block PWM driver
Tegra only supports, and always enables, device tree. Remove all ifdefs
for DT support from the driver.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The implementation in devm_request_and_ioremap() already shows error message,
so no need to show dev_err again if devm_request_and_ioremap() fails.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Philip, Avinash <avinashphilip@ti.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Also return proper error in tegra_pwm_remove() if pwmchip_remove()
fails.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Add auxdata to instantiate the PWFM controller from a device tree,
include the corresponding nodes in the dtsi files for Tegra 20 and
Tegra 30 and add binding documentation.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
This commit adds a generic PWM framework driver for the PWFM controller
found on NVIDIA Tegra SoCs. The driver is based on code from the
Chromium kernel tree and was originally written by Gary King (NVIDIA)
and later modified by Simon Que (Chromium).
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
