4 Commits

Author	SHA1	Message	Date
Shaoyun Liu	946a4d5b30	drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array ... Handle dynamic offsets correctly in static arrays. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2017-12-08 11:18:51 -05:00
Shaoyun Liu	4522824c48	drm/amdgpu: Dynamic initialize IP base offset ... The base offsets of the IP blocks may change across asics even though the relative register offsets are the same for an IP. Handle this dynamically. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2017-12-08 11:16:51 -05:00
Chunming Zhou	aecbe64f2b	drm/amdgpu: apply nbio7 for Raven (v3) ... nbio handles misc bus io operations. Handle differences between different nbio bus versions. v2: switch checks from RAVEN to APU (Alex) squash in raven rev id fetch squash in fix uninitalized hdp flush reg index for raven v3: add some missed RAVEN to APU checks (Alex) Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2017-05-24 17:41:17 -04:00
Ken Wang	8e3153ba3f	drm/amdgpu: add common soc15 headers ... These are used by various IP modules. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2017-03-29 23:54:31 -04:00