ae504be2e0
drm/i915: Downgrade incorrect engine constructor usage warnings to development
...
Render engine constructor helpers must only be called from the render
engine constructors, but there is no need to burden the production
binaries with warnings which can only be triggered during development.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Michel Thierry <michel.thierry@intel.com >
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: Michel Thierry <michel.thierry@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180119100005.9072-1-tvrtko.ursulin@linux.intel.com
2018-01-22 17:15:20 +00:00
c0cfb10d9e
drm/i915/edp: Do not do link training fallback or prune modes on EDP
...
In case of eDP because the panel has a fixed mode, the link rate
and lane count at which it is trained corresponds to the link BW
required to support the native resolution of the panel. In case of
panles with lower resolutions where fewer lanes are hooked up internally,
that number is reflected in the MAX_LANE_COUNT DPCD register of the panel.
So it is pointless to fallback to lower link rate/lane count in case
of link training failure on eDP connector since the lower link BW
will not support the native resolution of the panel and we cannot
prune the preferred mode on the eDP connector.
In case of Link training failure on the eDP panel, something is wrong
in the HW internally and hence driver errors out with a loud
and clear DRM_ERROR message.
v2:
* Fix the DEBUG_ERROR and add {} in else (Ville Syrjala)
Cc: Clinton Taylor <clinton.a.taylor@intel.com >
Cc: Jim Bride <jim.bride@linux.intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Ville Syrjala <ville.syrjala@linux.intel.com >
Cc: Dave Airlie <airlied@redhat.com >
Cc: Daniel Vetter <daniel.vetter@ffwll.ch >
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com >
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com >
Reference: https://bugs.freedesktop.org/show_bug.cgi?id=103369
Signed-off-by: Imre Deak <imre.deak@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1507835618-23051-1-git-send-email-manasi.d.navare@intel.com
2018-01-22 17:58:10 +02:00
dd63250c55
drm/sun4i: backend: Make sure we don't have a commit pending
...
If we try to read the backend registers while it fetches the new values, we
end up with the value of some random register instead of the one we asked
for.
In order to prevent that, let's make sure that the very first thing we do
during our atomic modesetting is to let the commit bit come to a rest.
We don't have to worry about anything else since the only time we will
trigger a new transaction is during the atomic_commit which comes much
later.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/35604307e5bde2b85c674de79fa7c4d55700f085.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:22:29 +01:00
5d68be9185
drm/sun4i: backend: Use runtime_pm variant of atomic_commit_tail
...
During a hardware commit, the commit bit in the backend will only be
cleared if the TCON is enabled. Use the runtime_pm variant of the
atomic_commit_tail hook that makes sure that the CRTC, our TCON, is enabled
when we perform an atomic_commit.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/bde95faff2078f63e9af99c3abee5360b9050fd1.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:21:18 +01:00
96180dde23
drm/sun4i: backend: Add a custom atomic_check for the frontend
...
Now that we have everything in place, we can start enabling the frontend.
This is more difficult than one would assume since there can only be one
plane using the frontend per-backend.
We therefore need to make sure that the userspace will not try to setup
multiple planes using it, since that would be impossible. In order to
prevent that, we can create an atomic_check callback that will check that
only one plane will effectively make use of the frontend in a given
configuration, and will toggle the switch in that plane state so that the
proper setup function can do their role.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/278e6c514a8311750fe627c7f28d58b3e2cbd825.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:17:32 +01:00
ca07b210bc
drm/sun4i: backend: Wire in the frontend
...
Now that we have a driver, we can make use of it. This is done by
adding a flag to our custom plane state that will trigger whether we should
use the frontend on that particular plane or not.
The rest is just plumbing to set up the backend to not perform the DMA but
receive its data from the frontend.
Note that we're still not making any use of the frontend itself, as no one
is setting the flag yet.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/cdffc25eab2d817820cc78cbd24f1f4b99902014.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:17:04 +01:00
dd0421f475
drm/sun4i: Add a driver for the display frontend
...
The display frontend is an hardware block that can be used to implement
some more advanced features like hardware scaling or colorspace
conversions. It can also be used to implement the output format of the VPU.
Let's create a minimal driver for it that will only enable the hardware
scaling features.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/029cdc3478bf89d422f5e8d9e600baf5e48ce4db.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:15:38 +01:00
6b8562c86e
drm/sun4i: engine: Create an atomic_begin callback
...
We have to implement some display engine specific behaviours in
atomic_begin. Let's add a function for that.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/44110951ae0cc13767fefc7fc1d9e2ec782d0a40.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:15:20 +01:00
3004f75fd4
drm/sun4i: engine: Add a VBLANK quirk callback
...
In some cases, the display engine needs to apply some quirks during the
VBLANK event. In the Display Engine 1.0 case for example, we can only
disable the frontend once the backend has been, which is at VBLANK.
Let's introduce a callback that can be implemented by the various engines.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/7c298d43aa1500196aa5d15d7a7c0f228c7a6f3c.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:15:11 +01:00
656e5f6549
drm/sun4i: engine: Add a custom crtc atomic_check
...
We have some restrictions on what the planes and CRTC can provide that are
tied to only one generation of display engines.
For example, on the first generation, we can only have one YUV plane or one
plane that uses the frontend output.
Let's allow our engines to provide an atomic_check callback to validate the
current configuration.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/e5f5f144e5c20d348cdb29933ae876c105bec017.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:15:03 +01:00
d540f82adf
drm/sun4i: backend: Add a custom plane state
...
We will need to store some additional data in the future to the state.
Create a custom plane state that will embed those data, in order to store
the pipe or whether or not that plane should use the frontend.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/88dd9c2b0caa550595e7b2ff37dc9d0af2c78609.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:14:58 +01:00
9f4ebf670d
drm/sun4i: backend: Allow a NULL plane pointer to retrieve the format
...
The function converting the DRM format to its equivalent in the backend
registers was assuming that we were having a plane.
However, we might want to use that function when setting up a plane using
the frontend, in which case we will not have a plane associated to the
backend's layer. Yet, we still need to setup the format to the one output
by the frontend.
Test for NULL plane pointers before referencing them, so that we can work
around it.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/bfbe4c2e8525a7542526b648d59a8f3546e905f1.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:14:49 +01:00
c4c7c72e5c
drm/sun4i: backend: Document the engine operations
...
Our operations were missing some documentation to explain what was expected
from them.
Let's make that clearer.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/fdcd8ec3ae9ecd73ef089ede5218d3a41b49be05.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:14:43 +01:00
f5870879e9
drm/sun4i: backend: Move line stride setup to buffer setup function
...
Setup the line stride in the buffer setup function, since it's tied to the
buffer itself, and is not needed when we do not set the buffer in the
backend.
This is for example the case when using the frontend and then routing its
output to the backend.
Reviewed-by: Chen-Yu Tsai <wens@csie.org >
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com >
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com >
Link: https://patchwork.freedesktop.org/patch/msgid/cbec84125bc0d5a6cf1d856b8291fbf77b138881.1516613040.git-series.maxime.ripard@free-electrons.com
2018-01-22 15:14:21 +01:00
073cd78166
drm/i915: Protect WC stash allocation against direct reclaim
...
As we attempt to allocate pages for use in a new WC stash, direct
reclaim may run underneath us and fill up the WC stash. We have to be
careful then not to overflow the pvec.
Fixes: 66df1014efhttps://bugs.freedesktop.org/show_bug.cgi?id=103109
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Matthew Auld <matthew.auld@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Reviewed-by: Matthew Auld <matthew.auld@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180121173143.17090-1-chris@chris-wilson.co.uk
2018-01-22 12:22:04 +00:00
861023e0b6
drm/i915/psr: Don't name status or debug registers like control registers.
...
Avoids some typo pitfalls.
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171220201021.17619-1-dhinakaran.pandiyan@intel.com
2018-01-19 16:46:13 -08:00
400b6afbaa
drm/amdgpu: disable MMHUB power gating on raven
...
MMHUB power gating still has issue, and doesn't work on raven at current. So
disable it for the moment.
Signed-off-by: Huang Rui <ray.huang@amd.com >
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2018-01-19 17:32:07 -05:00
f0111b04ff
drm/i915: Shrink the request kmem_cache on allocation error
...
If we fail to allocate a new request, make sure we recover the pages
that are in the process of being freed by inserting an RCU barrier.
v2: Comment before the shrink and barrier in the error path.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180119144657.22606-1-chris@chris-wilson.co.uk
2018-01-19 21:13:38 +00:00
bd724318b6
drm/i915/guc: Keep GuC log disabled by default
...
It looks that GuC log functionality is not fully functional yet and
causes issues when enabled by auto(-1) modparam on debug builds.
For example, but not limited to:
[ 30.062893] ======================================================
[ 30.062894] WARNING: possible circular locking dependency detected
[ 30.062895] 4.15.0-rc8-CI-CI_DRM_3648+ #1 Tainted: G U
[ 30.062896] ------------------------------------------------------
[ 30.062897] debugfs_test/1268 is trying to acquire lock:
[ 30.062898] (&dev->struct_mutex){+.+.}, at: [<00000000e4213449>] i915_mutex_lock_interruptible+0x47/0x130 [i915]
[ 30.062921]
but task is already holding lock:
[ 30.062921] (&mm->mmap_sem){++++}, at: [<00000000dd7adc93>] __do_page_fault+0x106/0x560
[ 30.062924]
which lock already depends on the new lock.
References: 0ed8795353https://bugs.freedesktop.org/show_bug.cgi?id=104693
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104694
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104695
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Jani Saarinen <jani.saarinen@intel.com >
Cc: Tomi Sarvela <tomi.p.sarvela@intel.com >
Cc: Marta Lofstedt <marta.lofstedt@intel.com >
Cc: Michal Winiarski <michal.winiarski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180119124926.29844-1-michal.wajdeczko@intel.com
Reviewed-by: Michal Winiarski <michal.winiarski@intel.com >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
2018-01-19 20:35:32 +00:00
b86aa4458a
drm/i915/icl: Gen11 render context size
...
Gen11 removes the Resource Streamer, which frees up a big chunk of
the context image. BSpec indicates 12544 DWORDs (13 pages), plus
one page for PPHWSP.
Please notice that, when looking at the BSpec context image table,
the right filter has to be applied as some rows are excluded for
specific GENs. Also, some rows apply per-subslice (for the
calculation above, we have supposed I915_MAX_SUBSLICES = 8).
v2: Rebase.
v3: Use the right size as per the BSpec.
v4:
- Rebased on top of the default context size (Rodrigo)
- Clarify in the commit message where the subslice calculation
comes from.
v5: s/12538/12544/ (Daniele)
BSpec: 18907
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Acked-by: Ben Widawsky <benjamin.widawsky@intel.com > (older version)
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1515711307-28979-2-git-send-email-oscar.mateo@intel.com
2018-01-19 18:13:33 -02:00
7ab4adbd92
drm/i915: Return a default RCS context size
...
Instead of returning whatever size the latest GEN used. This is because
context sizes for new GENs can go up or down, but the only safe thing to
do for missing cases is to use the largest known one, whatever that is.
Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1515711307-28979-1-git-send-email-oscar.mateo@intel.com
2018-01-19 18:09:47 -02:00
a6358dda29
drm/i915/icl: Icelake interrupt register addresses and bits
...
MMIO addresses and register definition for the new interrupt
registers in Gen11.
v2: Removed spelt out VCS and VECS bit definitions. (Daniel Vetter)
v3: Adjust VCS and VECS. (Daniele Ceraolo Spurio)
v4: Bikeshedding (Paulo).
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180109232336.11029-5-paulo.r.zanoni@intel.com
2018-01-19 18:05:54 -02:00
5c8ea01830
drm/i915/icp: Add the ID for ICL PCH - ICP
...
Add the PCI ID for the ICL PCH - ICP.
v2: rebased.
v3: rebased.
v4: fix ICP name.
v5: fix the ID mask (Fei Li).
v6 (from Paulo): bikesheds.
Cc: Li, Fei <fei.li@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-9-paulo.r.zanoni@intel.com
2018-01-19 18:03:52 -02:00
5c749c522f
drm/i915/icp: add ICP gmbus and gpio support
...
In ICP, there are three TC ports and 3 DDI ports.
v2:
- Correct Pin mapping.
v3:
- Update pin mapping into per platform implementation
rather than previous approach of port wise mapping.
v4:
- Update GMBUS_NUM_PINS (Paulo)
v5:
- rebase.
v6:
- Update function name, GMBUS_PIN_NUM (Paulo)
v7 (from Paulo):
- Make it apply.
v8 (from Paulo):
- Maintain consistent if ladder ordering.
Suggested by: Ville Syrjala <ville.syrjala@linux.intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-8-paulo.r.zanoni@intel.com
2018-01-19 18:02:52 -02:00
ccf6e0d977
drm/i915/icp: Add backlight Support for ICP
...
ICP has two backlight controllers - similar to previous platforms like
BXT -, but we only use one controller for now, so we can just reuse
the CNP code.
v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
Reuse CNP code since it is very similar.(Ville)
v3 (from Paulo): Rebase.
v4 (from Paulo): adjust commit message (James) and comment (Rodrigo).
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Ville Syrjala <ville.syrjala@linux.intel.com >
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Acked-by: James Ausmus <james.ausmus@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180119184812.2888-1-paulo.r.zanoni@intel.com
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
2018-01-19 17:58:28 -02:00
b0d6a0f27e
drm/i915/icp: Add Panel Power Sequencing Support
...
ICP, like BXT, has has two panel power sequencers.
v2: Simplify the code. Remove unwanted register definitions.
Make code as close to BXT style as possible. (Ville)
Also, remove the use of ICP_SECOND_PPS_BACKLIGHT for now.
Moving forward, if we are sure we need to set this register,
we can access it.
v3: Use INTEL_GEN(dev_priv), make code more readeable. (Ville)
v4 (from Paulo):
- Coding style fixes.
- Add a missing HAS_PCH_CNP -> gen10+ check.
- Rebase.
v5: Use per platform checks rather than INTEL_GEN().
v4 of this patch breaks on CoffeeLake, since CFL uses
CNP and per platform check makes sense in that case.
v6 (from Paulo):
- v5 was a patch on top of v4, not a new version. Now v6 is correctly
a new version of the original patch.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-6-paulo.r.zanoni@intel.com
2018-01-19 17:57:36 -02:00
4ef99abd07
drm/i915/icp: Get/set proper Raw clock frequency on ICP
...
Add register definitions for setting the rawclock.
Set the numerator,denominator and divider values.
v2: Simplify the commit message. Simplify the math.
Add register bits for numerator. (Paulo)
v3 (from Paulo): coding style bikesheds.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-5-paulo.r.zanoni@intel.com
2018-01-19 17:55:52 -02:00
0b58436f2d
drm/i915/icp: Introduce Ice Lake PCH
...
Add the enum additions to ICP PCH.
v2 (from Paulo): don't set any platforms to it yet since ICP support is
incomplete.
v3 (from Rodrigo): Fix ICP name.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-4-paulo.r.zanoni@intel.com
2018-01-19 17:54:01 -02:00
412310019a
drm/i915/icl: Add initial Icelake definitions.
...
Icelake is an Intel® Processor containing an Intel® Graphics
Controller.
This is just an initial Icelake definition. PCI IDs, Icelake support
and new features coming in following patches.
v2: Add .ddb_size and .has_guc (Michal Wajdeczko).
v3: Add the ICL_FEATURES macro (Kelvin Gardiner).
v4 (from Paulo): Add missing __initconst (Paulo) and say "graphics
controller" instead of something that looks like an official marketing
name but isn't (Chris).
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-3-paulo.r.zanoni@intel.com
2018-01-19 17:52:59 -02:00
841b5ed7aa
drm/i915/cnl: Add Port F definition.
...
Some Cannonlake SKUs will come with a full split between
port A and port E. This will be called port F although it
is not a 6th port, but only a split.
Note this patch alone is not sufficient for port F enabling,
it's just the first step.
v2: Fix size of dvo_ports found by Ander.
v3: Adding missing cases from intel_bios.c for Port_F
v4: Adding other missing cases and fix the commit message.
v5: Rebase on top of display headers rework.
v6 (from Paulo): improve commit message, bikeshed bit definitions.
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-2-paulo.r.zanoni@intel.com
2018-01-19 17:51:35 -02:00
54156da893
Merge airlied/drm-next into drm-misc-next
...
It's been a while since we've backmerged drm-next. Dave just brought
back 4.15-rc8, so now's a good time to freshen things up around here.
Signed-off-by: Sean Paul <seanpaul@chromium.org >
2018-01-19 12:32:05 -05:00
f7a71b0cf9
drm: add kernel doc for exported gem dmabuf_ops
...
Signed-off-by: Samuel Li <Samuel.Li@amd.com >
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1516311860-24949-1-git-send-email-Samuel.Li@amd.com
2018-01-19 11:14:59 -05:00
0b7029b7e4
drm/i915: Check for fused or unused pipes
...
We may have fused or unused pipes in our system. Let's check that the pipe
in question is within limits of accessible pipes. In case, that we are not
able to access the pipe, we return early with a warning.
v2: Rephrasing of the commit message (Jani)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103206
Reported-by: Thomas Gleixner <tglx@linutronix.de >
Tested-by: Jaswinder Singh Rajput <jaswinder@perfectintelligent.com >
Suggested-by: Jani Nikula <jani.nikula@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1513584243-12607-1-git-send-email-mika.kahola@intel.com
2018-01-19 16:15:50 +02:00
8a97bbcce8
drm/i915: Allow up to 32KB stride on SKL+ "sprites"
...
SKL+ "sprites" no longer have 16KB max stride limit that earlier
platforms had. Bump up the limit to 32KB.
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-7-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2018-01-19 15:33:58 +02:00
77064e2eb8
drm/i915: Add CCS capability for sprites
...
Allow sprites to scan out compressed framebuffers.
Since different platforms have a different set of planes that
support CCS let's add a small helper to determine whether a
specific plane supports CCS or not. Currently that information
is spread around in many places, and not all the pieces of
code even agree with each other.
In addition to allowing sprites to scan out compressed fbs,
the other fix here is that we stop rejecting them on pipe C
on CNL.
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-6-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2018-01-19 15:33:58 +02:00
c21f7904c7
drm/i915: Clean up the sprite modifier checks
...
Split the g4x and snb cases into separate functions to match how we deal
with all other platforms. Also sort the switch cases to match the format
lists we've declared earlier, to ease comparisons.
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-5-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2018-01-19 15:33:58 +02:00
74ac160b3f
drm/i915: Add the missing Y/Yf modifiers for SKL+ sprites
...
Y/Yf were dropped out from the SKL+ sprite modifier list on account
of some watermark issues Daniel Stone was having. My subsequent testing
seemed to indicate that things work better now, so add the modifiers
back in.
v2: Update the commit message with a better explanation
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-4-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2018-01-19 15:33:58 +02:00
e13a3183da
drm/i915: Nuke a pointless unreachable()
...
The unreachable() is very much unreachable and the compiler knows
that, so there's no point in having it.
Cc: Ben Widawsky <ben@bwidawsk.net >
Cc: Jason Ekstrand <jason@jlekstrand.net >
Cc: Daniel Stone <daniels@collabora.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171222192231.17981-3-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch >
2018-01-19 15:33:58 +02:00
3019062905
drm/i915: Ignore TMDS clock limit for DP++ when EDID override is set
...
4K modes testing by using dummy EDID data has never been working
properly on boxes with DP++ (dual-mode) adaptors. The reason for
this is that those modes got pruned during hdmi mode validation.
intel_hdmi_mode_valid returns CLOCK_HIGH because the pixel clock
reported by the 4k mode is higher than dual port TMDS clock limit.
However 4k injection does work properly on machines that don't have
DP++ adapters because the mode is never validated against the DP++
TMDS clock limit.
v2: Don't detect the DP++ limits when we're testing using overridden
EDIDs. Make sure to check for the override condition after
respecting the value of drm_dp_dual_mode_detect (Jani Nikula).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101649
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Daniel Vetter <daniel.vetter@ffwll.ch >
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171215102055.11729-1-abdiel.janulgue@linux.intel.com
2018-01-19 12:31:33 +02:00
a4dd90b1cb
drm/i915: remove redundant ELD connector type update
...
drm_edid_to_eld() sets ELD connector type since commit 1d1c366507c945b8c14bd471ed04b4ville.syrjala@linux.intel.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20171229125547.28672-1-jani.nikula@intel.com
2018-01-19 11:58:48 +02:00
3cfd32654b
drm/i915: vbt defs typo fixes
...
No more sing-a-ling.
Reported-by: Adam Jackson <ajax@redhat.com >
You're-my-ding-a-ling-by: Chris Wilson <chris@chris-wilson.co.uk >
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20180118150613.26140-1-jani.nikula@intel.com
2018-01-19 10:20:16 +02:00
04cef3eadc
Merge tag 'drm-intel-fixes-2018-01-18' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes
...
Display corruption regression bugfix with both a prep patch and a
follow-up fix
* tag 'drm-intel-fixes-2018-01-18' of git://anongit.freedesktop.org/drm/drm-intel:
drm/i915: Fix deadlock in i830_disable_pipe()
drm/i915: Redo plane sanitation during readout
drm/i915: Add .get_hw_state() method for planes
2018-01-19 12:40:07 +10:00
ee62249d85
Merge branch 'linux-4.15' of git://github.com/skeggsb/linux into drm-fixes
...
Thought I'd try my luck getting one more in:
- Two fixes for Tegra (one is to common code, but our userspace doesn't hit it).
- One for NV5x-class MCPs
* 'linux-4.15' of git://github.com/skeggsb/linux:
drm/nouveau/mmu/mcp77: fix regressions in stolen memory handling
drm/nouveau/bar/gk20a: Avoid bar teardown during init
drm/nouveau/drm/nouveau: Pass the proper arguments to nvif_object_map_handle()
2018-01-19 12:12:31 +10:00
2ffa64eba9
drm/nouveau/mmu/mcp77: fix regressions in stolen memory handling
...
- Fixes addition of stolen memory base address to PTEs.
- Removes support for compression.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
Tested-by: Pierre Moreau <pierre.morrow@free.fr >
2018-01-19 11:35:44 +10:00
e062a01e6d
drm/nouveau/bar/gk20a: Avoid bar teardown during init
...
Commit bbb163e189bbb163e189guillaume.tucker@collabora.com >
Signed-off-by: Jon Hunter <jonathanh@nvidia.com >
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
2018-01-19 11:35:44 +10:00
b554b12add
drm/nouveau/drm/nouveau: Pass the proper arguments to nvif_object_map_handle()
...
This is obviously wrong in the current code. Make sure to record the
correct size of the arguments and pass the actual arguments to the
nvif_object_map_handle() function.
Suggested-by: Ben Skeggs <bskeggs@redhat.com >
Signed-off-by: Thierry Reding <treding@nvidia.com >
Signed-off-by: Ben Skeggs <bskeggs@redhat.com >
2018-01-19 11:35:44 +10:00
49d85d0342
drm/i915: Check for downstream topology errors
...
HDCP compliant Repeaters can support max of 127 devices and max
depth of 7 for downstream topology.
If these max limits are exceeded, repeater will set the
topology error flags MAX_CASCADE_EXCEEDED and/or MAX_DEVS_EXCEEDED
in Bstatus followed by asserting READY/CP_IRQ for HDCP transmitter.
This patch check for these error flags as soon as READY bit is asserted.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com >
[seanpaul fixed checkpatch alignment issue]
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-5-git-send-email-ramalingam.c@intel.com
2018-01-18 17:56:02 -05:00
24b42cbadb
drm/i915: Start repeater auth on READY/CP_IRQ
...
Second stage of HDCP authentication starts at CP_IRQ or at the
assertion of READY bit from Repeater.
Till then repeater will be authenticating with its downstream devices.
So authenticated device count, depth and ksv_list readable from
repeaters are valid only after assertion of READY/CP_IRQ.
This patch makes sure that READY is polled before reading any
topology information.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com >
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-4-git-send-email-ramalingam.c@intel.com
2018-01-18 17:55:26 -05:00
87eb3ec818
drm/i915: II stage HDCP auth for repeater only
...
Second stage of HDCP authentication required only if the HDCP
sink is a repeater.
This patch imposes above condition on second stage HDCP authentication.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com >
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-3-git-send-email-ramalingam.c@intel.com
2018-01-18 17:55:13 -05:00
fdddd08c48
drm/i915: Extending HDCP for HSW, BDW and BXT+
...
This patch extends the Key load process and hdcp initialization for
few more capable intel platforms i.e. HSW, BDW and BXT+.
Signed-off-by: Ramalingam C <ramalingam.c@intel.com >
[seanpaul fixed checkpatch issues]
Signed-off-by: Sean Paul <seanpaul@chromium.org >
Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-2-git-send-email-ramalingam.c@intel.com
2018-01-18 17:28:49 -05:00
