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In the regcache_default_sync, if a register isn't writeable, then
_regmap_write will return an error and the rest of the sync will be
aborted. Avoid this by checking if a register is writeable before
trying to sync it.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
The default sync operation was still assuming a stride of one, fix it
to respect the reg_stride set in the map.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
regmap deploys the spinlock for the protection when set up in fast_io
mode. This may lead to sleep-in-atomic by memory allocation with
GFP_KERNEL in regmap_bulk_write(). This patch fixes it by moving the
allocation out of the lock.
[Fix excessively large locked region -- broonie]
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
With fast_io we use mutexes to lock the I/O operations so we would need
to do GFP_ATOMIC allocations if we wanted to do allocations inside the
lock as we do currently. Since it is unlikely that we will want to register
a patch outside of init where concurrency shouldn't be an issue move the
allocation of the patch data outside the lock.
Reported-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
After setting the 'data' pointer (wchich is returned to the caller for
freeing later) the regmap_add_irq_chip() could still fail for various
reasons (ENOMEM, regmap_read or regmap_write failure). In such case the
memory under 'data' was freed in error path and error value was returned
but the 'data' variable was not changed.
This could lead to errors if the caller passed such 'data' to
regmap_del_irq_chip().
The 'data' pointer should be changed atomically from the caller
perspective - set it only on regmap_add_irq_chip() success.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This is the implementation of regmap_multi_reg_write()
There is a new capability 'can_multi_write' that device drivers
must set in order to use this multi reg write mode.
This replaces the first definition, which just defined the API.
Signed-off-by: Anthony Olech <anthony.olech.opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
In some cases, we need regmap's format parse_val function
to do be/le translation according to the bus configuration.
For example, snd_soc_bytes_put() uses regmap to write/read values,
and use cpu_to_be() directly to covert MASK into big endian. This
is a defect, and should use regmap's format function to do it according
to bus configuration.
Signed-off-by: Nenghua Cao <nhcao@marvell.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Since we now have an internal version of regmap_multi_reg_write use this
to apply the register patch.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Devices with more complex boot proceedures may occasionally apply the
register patch manual. regmap_multi_reg_write is a logical way to do so,
however the patch must be applied with cache bypass on, such that it
doesn't override any user settings. This patch adds a
regmap_multi_reg_write_bypassed function that applies a set of writes
with the bypass enabled.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
There should be no need for the writes supplied to this function to be
edited by it so mark them as const.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
/drivers/base/regmap/regmap.c:717:6-33: WARNING:
Comparison to bool.
More information about semantic patching is available at
http://coccinelle.lip6.fr/
Signed-off-by: Nenghua Cao <nhcao@marvell.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Currently, we check the registers in the patch are aligned to the
register stride everytime we sync the cache and the first time the patch
is written out is unchecked.
This patch checks the register patch when we first register it so the
first writes are no longer unchecked and then doesn't check on
subsequent syncs as the patch will be unchanged.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Since sometimes the 'config' parameter has no use, it should be NULL.
And make the code simplifier.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Create special function regmap_attach_dev
which can be called separately out of regmap_init.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
SPMI states that a slave may contain two register spaces, the Base
register space is a 5-bit byte-addressable space accessed via the
Register Read/Write and Register Zero Write command sequences, and the
Extended register space: a 16-bit byte-addressable space accessed via
the Extended Read/Write and Extended Read/Write Long command sequences.
Provide support for accessing both of these spaces, taking advantage of
the more bandwidth-efficient commands ('Register 0 Write' vs 'Register
Write', and 'Extended Register Read/Write' vs 'Extended Register
Read/Write Long') when possible.
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
Acked-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
None of these files are actually using any __init type directives
and hence don't need to include <linux/init.h>. Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.
Cc: Len Brown <len.brown@intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
irqdomain now supports removal of domains on exit so we can properly clean
up on deletion of a regmap irqchip.
Signed-off-by: Mark Brown <broonie@linaro.org>
When a map covers a single register, max_register is equal
to 0, so the "registers" & "access" files were not created.
Now they will be, as register 0 must be readable for such
map to make sense.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
regcache_sync_block_raw_flush takes the address of the base register
and the address of one past the last register to write to. "count" is
the number of registers in the range, not the number of bytes, it
should be (end addr - start addr) / stride. Without accounting for
strides greater than one, registers past the end might be synced or
the writeable_reg callback at the beginning of _regmap_raw_write will
fail and nothing will be written.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
regmap_bulk_write() should decay to performing individual writes
if we're using a "no-bus" regmap. Unfortunately, it returns an
error because there is no map->bus pointer. Fix it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Merge tag 'v3.13-rc4' into regmap-core
Needed as a subsequent patch is built on some of the fixes.
Linux 3.13-rc4
regmap_bulk_read() should decay to performing individual reads if
we're using a "no-bus" regmap. Unfortunately, it returns an
error because there is no map->bus pointer. Fix it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
In some cases, clear interrupt register may be at address 0.
This patch allows to use such configurations by adding additional
configuration bit to indicate this.
[With doc fix from Levente Kurusa <levex@linux.com> -- broonie]
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Mark Brown <broonie@linaro.org>
clk_get() returns an error pointer, or a valid token to pass back to the
clock API. Hence, the result must be checked with IS_ERR(), not by
comparison against NULL.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch give a warning when calling regmap_register_patch with
parameter num_regs <= 0.
When the num_regs parameter is zero and krealloc doesn't fail,
then the code would return an uninitialized value. However,
calling this function with num_regs == 0, would be a waste as it
essentially does nothing.
Signed-off-by: Cai Zhiyong <caizhiyong@huawei.com>
Reviewed-by: Geyslan G. Bem <geyslan@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
fix a trivial copy'n'paste error in the regmap kerneldoc, s/write/read/
for the regmap_read(), regmap_raw_read() and regmap_bulk_read() routines
Signed-off-by: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add basic support for the System Power Management Interface (SPMI) bus.
This is a simple implementation which only implements register accesses
via the Extended Register Read/Write Long commands.
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
If called early enough, regmap_debugfs_init causes a crash, if the
fs subsystem does not have its mount cache created yet. Even if this
would work, the root node for the regmap debugfs is still missing,
thus postpone the regmap_debugfs_init in this case until the root
node is created. A special regmap_debugfs_early list is created for
this purpose which is parsed later in the boot.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
clear the status bit if the mask register doesn't prevent
the chip level irq from being asserted
OR in the following sequence, there will be irq storm happens:
1) interrupt is triggered;
2) another thread disables it(the mask bit is set);
3) _Then_ the interrupt thread is not ACKed(the status bit is not cleared),
and it's ignored;
4) if the irq is still asserted because of the uncleared status bit,
the irq storm happens;
Signed-off-by: Yi Zhang <yizhang@marvell.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Extend the interface for async I/O by allowing the value buffer to be
omitted and sending the value as part of the register buffer, minimising
the number of separate hardware operations required.
Signed-off-by: Mark Brown <broonie@linaro.org>
If the value is zero then assume it has been included in the register data
and don't send anything, minimising the number of interactions with the
hardware.
Signed-off-by: Mark Brown <broonie@linaro.org>
New API regmap_multi_reg_write() is defined that allows a set of reg,val
pairs to be written to a I2C client device as one block transfer from the
point of view of a single I2C master system.
A simple demonstration implementation is included that just splits the
block write request into a sequence of single register writes.
The implementation will be modified later to support those I2C clients
that implement the alternative non-standard MULTIWRITE block write mode
so to achieve a single I2C transfer that will be atomic even in multiple
I2C master systems.
Signed-off-by: Anthony Olech <anthony.olech.opensource@diasemi.com>
Signed-off-by: David Dajun Chen <david.chen@diasemi.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Try to speed up I/O a little by not synchronising until we are finished
scheduling writes. A brief survey of existing users suggests we have none
that would currently benefit from an async cache sync.
Signed-off-by: Mark Brown <broonie@linaro.org>
When regmap_bulk_write() is called with the map->use_single_rw flag set
an immediate mutex deadlock happens because regmap_raw_write() is called
after obtaining the mutex and regmap_raw_write() itself then tries to
obtain the mutex as well.
It is obvious that no one other than myself tried it with a real device.
I did, but only for the purposes of an experiment and demonstration.
But even if this situation will never ever happen with a real device, it
is a bug and therefore should be fixed.
Signed-off-by: Anthony Olech <anthony.olech.opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Make it easier for drivers to include single register writes in
asynchronous sequences by providing async versions of the write
and update bits operations. The update bits operations are only
likely to be effective when used with devices that have caches
but this is common enough to be useful.
Signed-off-by: Mark Brown <broonie@linaro.org>
Rather than passing a flag around through the entire call stack store it
in the regmap struct and read it when required. This minimises the
visibility of the feature through the API, minimising the code updates
needed to use it more widely.
Signed-off-by: Mark Brown <broonie@linaro.org>
Since it is quite common for single register raw or async writes to be
generated by rbtree cache syncs or firmware downloads and essentially all
hardware will be faster with only a single transfer optimise this case by
copying single values into the internal scratch buffer before sending.
Signed-off-by: Mark Brown <broonie@linaro.org>
Rather than allocating and deallocating the structures used to manage async
transfers each time we do one keep the structures around as long as the
regmap is around. This should provide a small performance improvement.
Signed-off-by: Mark Brown <broonie@linaro.org>
Current Linux kernel is supporting regmap_field method
and it is very useful feature.
It needs one regmap_filed for one register access.
OTOH, there is multi port device which
has many same registers in the market.
The difference for each register access is
only its address offset.
Current API needs many regmap_field for such device,
but it is not good.
This patch adds new regmap_fileds API which can care
about multi port/offset access via regmap.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
