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Rename hdmiddc to hdmi_ddc to be more in-line with other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Apalis Evaluation Board uses Apalis GPIO7 on MXM3 pin 15 as reset
signal for its PLX PEX 8605 PCIe Switch.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop obsolete spidev device tree nodes as nowadays one should do this
by binding the spidev driver to specific instances/chip selects at
runtime.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop model and compatible nodes from the module level device tree as
they get overridden by the carrier board device tree anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Get rid of the fake clocks simple bus and use node names as per the
actual schematics.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add i2c-thermtrip which would set the DEV_OFF bit in the DCDC control
register of the TPS65911 PMIC.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Clean-up pinmuxing:
- white-space clean-up
- explicitly disable input of BKL1_ON, BKL1_PWM and BKL1_PWM_EN#
- annotate Apalis I2C3 usage for CAM
- get rid of nvidia,lock property
- add missing eMMC sdmmc4_cmd_pt7 and explicitly enable input
- explicitly disable lcd_dc1_pd2 (e.g. LM95245 I2C address pin)
- annotate TOUCH_PEN_INT# being on-module
- As underscores in node names are not recommended replace them all
where possible with dashes.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop pwmleds in favour of using regular PWMs.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate UARTs and move the serial UART "nvidia,tegra30-hsuart"
compatible definitions from the carrier board to the module level device
trees. One could still override this in a custom carrier board device
tree if required.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate PCIe port nodes and clean-up PCIe controller/port status' with
respect to carrier board vs. module level device trees. As port 3
connects to the on-module Gigabit Ethernet MACPHY it is always enabled
together with the PCIe controller itself.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
In order to avoid any floating SD card detect pins as may e.g. happen on
Ixora V1.1A pull them all up.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This is similar to tegra124 and avoids the following being reported
upon boot:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
There was a dot instead of a comma. Fix this.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the actual dts for the tinker board S, which brings its own emmc
device, not therefore not requiring an sd-card to boot.
Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tinker Board and Tinker Board S share most of their components,
so should also not replicate these for each variant.
So move them to a shared dtsi that then can get included by both
boards.
Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
On the imx6qdl-zii-rdu2 board the RTC functionality is provided via
a DS1341 RTC connected via I2C bus, so we can safely disable the internal
one.
Reported-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/rtc/rtc-ds1307.txt the
original compatible "maxim,ds1341" is not a valid entry.
Switch to the documented "dallas,ds1341" compatible.
Reported-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock
needs to be enabled first, so use the nvmem-cells binding instead.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
dtc has new checks for SPI buses. Fix the warnings in node names and
unit-addresses.
There's over 100 warnings for FSL boards, a few examples:
arch/arm/boot/dts/imx28-duckbill-2-spi.dtb: Warning (spi_bus_bridge): /apb@80000000/apbh@80000000/ssp@80014000: node name for SPI buses should be 'spi'
arch/arm/boot/dts/imx53-ppd.dtb: Warning (spi_bus_bridge): /soc/aips@50000000/spba@50000000/ecspi@50010000: node name for SPI buses should be 'spi'
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtb: Warning (spi_bus_reg): /soc/aips-bus@2000000/spba-bus@2000000/spi@2014000/mcp251x@1: SPI bus unit address format error, expected "0"
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Li Yang <leoyang.li@nxp.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
To use the "earlycon" kernel command line parameter (without arguments)
we need a stdout-path property under the /chosen node. Add this to make
it easier to spot errors early in the boot process when looking for
them.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Odroid-C1 exposes ADC channels 0 and 1 on the GPIO headers. NOTE: Due
to the SoC design these are limited to 1.8V (instead of 3.3V like all
other pins).
Enable the SAR ADC to enable voltage measurements on these pins.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There are multiple fixed regulators on the Odroid-C1 board. Add them so
they can be used when we add the devices that need them (SAR ADC needs
the 1.8V IOREF, RTC needs VDD_RTC).
These are:
- P5V0 is the main 5V power input
- VCC3V3 / VDDIO_AO3V3 / VDD3V3: fixed regulator with 3.3V output which
is supplied by P5V0
- IOREF_1V8 / VCC1V8 / VDD1V8: fixed regulator with 1.8V output which is
supplied by P5V0
- VDD_RTC: fixed voltage regulator with 0.9V output which is supplied by
VDDIO_AO3V3
- DDR_VDDC / DDR3_1V5: fixed voltage regulator with 1.5V output which is
supplied by P5V0
- the existing TF_IO and RFLASH_VDD_EN regulators are supplied by
VDDIO_AO3V3
- the existing VCCK regulator is supplied by P5V0
This does not add the missing VDDEE regulator (controlled by PWM_D)
because it's not clear yet how to configure the voltage of that
regulator.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The CPU voltage regulator is a "Monolithic Power Systems MP2161"
(according to the Odroid-C1+'s schematics). It is driven by PWM_C on
GPIODV_9.
Hardkernel's 3.10 kernel (based on the Amlogic GPL kernel sources)
defines a PWM voltage table with the following values:
- 0.86 volts = PWM register value 0x10f001b
- (more values in 0.1 volt increments)
- 1.14 volts = PWM register value 0x000012a
When using the XTAL (24MHz) as input this translates into a PWM period
of 12218ns with 0.86V using a duty cycle of 91% and 1.14V using a duty
cycle of 0%.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Endless Mini (EC-100) is a grapefruit-sized computer based on the
Amlogic Meson8b (S805) SoC which comes in two variants.
Both variants have in common:
- Amlogic Meson8b (S805) SoC
- two USB 2.0 ports on the rear, one one the front (connected to the SoC
through an internal hub)
- 3.5mm Stereo out and MIC combo port
- HDMI and CVBS output
- 5V power supply (rated at 3A / 15W)
- an internal embedded micro-controller (called "EC") which implements a
"breathing" effect for the LED and allows shutting down (powering off)
the whole device
- 10/100 Mbit/s Ethernet using an IC Plus IP101A/G PHY (note: the website
incorrectly lists a Gigabit Ethernet port)
- the CPU voltage is regulated using a PWM regulator. The GPL sources of
the EC-100 are using a PWM value of 0x1c0000 for 0.86V and a PWM value
of 0x00001c for 1.14V. When using the XTAL (24MHz) as input this
translates into a PWM period of 1148ns with 0.86V using a duty cycle of
100% and 1.14V using a duty cycle of 0%.
The main differences are:
- the main indicator for the variant is the RAM size: the "cheaper"
variant has 1 GB of RAM, while the more expensive one comes with 2GB
- the storage size differs: 24 GB vs 32 GB
- the "1 GB RAM" variant has Ethernet connectivity only, while the "2 GB"
variant has a Realtek RTL8723BS SDIO chip which adds 802.11b/g/n wifi
and Bluetooth 4.0 support
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Some boards use an RMII Ethernet PHY which requires fewer pins than the
RGMII PHYs. Add a separate eth_rmii_pins node which does not include the
pins which are only required for RGMII (but not for RMII) PHYs.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
These are used for example on the Endless Mini (EC-100):
- I2C_A is connected to the Realtek RT5640 audio codec
- PWM_C (GPIODV_9) is connected to a PWM regulator which is used for
VCCK (CPU voltage supply)
- UART_B is connected to the Bluetooth module (of the RTL8723BS SDIO
wifi and Bluetooth combo chip)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Remove unused parameter from SPI6 dmas property on stm32mp157c SoC.
Fixes: dc3f8c86c10d ("ARM: dts: stm32: add SPI support on stm32mp157c")
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
[olof: Without this patch, SPI6 will fall back to interrupt mode with
lower perfmance]
Signed-off-by: Olof Johansson <olof@lixom.net>
Pass the 'no-sd' for esdhc0 controller as it is wired to eMMC.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
No SDIO devices are connected to these ports, so pass the 'no-sdio'
property.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx51-zii-scu2-mezz has an external watchdog in the environment
microcontroller, so disable the internal one.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
