IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
Since simplefb nodes do not relate directly to hw typically they have been
placed in the root of the devicetree. As the represent runtime information
having them as sub-nodes of /chosen is more logical, specify this.
Also specify when to set the chosen stdout-path property to a simplefb node.
For reliable handover to a hardware specific driver, that driver needs to
know which simplefb to unregister when taking over, specify how the hw driver
can find the matching simplefb node.
Last add some advice on how to fill and use simplefb nodes from a firmware
pov.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
A simple-framebuffer node represents a framebuffer setup by the firmware /
bootloader. Such a framebuffer may have a number of clocks in use, add a
property to communicate this to the OS.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This adds a DT binding documentation for the MT6592 SoC from Mediatek.
Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The TS3A227E is an autonomous audio accessory detection and
configuration switch that detects 3-pole or 4-pole audio accessories
and configures internal switches to route the signals accordingly.
This chip also has built-in support for the new button standard
described in the Android "Wired audio headset specification" v1.0.
These buttons will be reported on the jack as buttons 0-3 mapped to
KEY_MEDIA, KEY_VOLUMEUP, KEY_VOLUMEDOWN, and KEY_VOICE_COMMAND.
This will be added as an aux_dev and have the jack passed in from the
machine driver.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Conflicts:
drivers/net/ethernet/chelsio/cxgb4vf/sge.c
drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
sge.c was overlapping two changes, one to use the new
__dev_alloc_page() in net-next, and one to use s->fl_pg_order in net.
ixgbe_phy.c was a set of overlapping whitespace changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
41e5c0f81d3e ("of/pci: Add pci_get_new_domain_nr() and
of_get_pci_domain_nr()") added parsing of the "linux,pci-domain" property,
but didn't add the binding documentation.
Since this property will be supported by a number of host bridge drivers,
add it to the common PCI binding doc.
Fixes: 41e5c0f81d3e ("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
The device tree probing for R-Car M2N (r8a7793) is added.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Document the device tree binding for the ALC5631 codec and update vendor
specific prefix for the Realtek.
Signed-off-by: Krishna Mohan Dani <krishna.md@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
This panel requires dual-channel mode. The device accepts command-mode
data on 8 lanes and will therefore need a dual-channel DSI controller.
The two interfaces that make up this device need to be instantiated in
the controllers that gang up to provide the dual-channel DSI host.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Berlin BG2 SATA PHY is slightly different from currently supported
BG2Q SATA PHY. Document the new compatible for BG2's PHY.
Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The clock name "fmanclk" was given in the example, but not specified
in the binding itself. Made clock-names mandatory as otherwise there's
not much point having it.
Added a reference to the fsl,qman and fsl,bman properties proposed
in http://patchwork.ozlabs.org/patch/407034/ and
http://patchwork.ozlabs.org/patch/407035/
Signed-off-by: Scott Wood <scottwood@freescale.com>
The Frame Manager (FMan) combines the Ethernet network interfaces with
packet distribution logic to provide intelligent distribution and
queuing decisions for incoming traffic at line rate.
This binding document describes Freescale's Frame Manager hardware
attributes that are used by the Frame Manager driver for its basic
initialization and configuration.
Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Portals are memory mapped interfaces to QMan that allow low-latency,
lock-less interaction by software running on processor cores,
accelerators and network interfaces with the QMan
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I29764fa8093b5ce65460abc879446795c50d7185
Signed-off-by: Scott Wood <scottwood@freescale.com>
The Queue Manager is part of the Data-Path Acceleration Architecture
(DPAA). QMan supports queuing and QoS scheduling of frames to CPUs,
network interfaces and DPAA logic modules, maintains packet ordering
within flows. Besides providing flow-level queuing, is also
responsible for congestion management functions such as RED/WRED,
congestion notifications and tail discards. This binding covers the
CCSR space programming model
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I3acb223893e42003d6c9dc061db568ec0b10d29b
Signed-off-by: Scott Wood <scottwood@freescale.com>
Portals are memory mapped interfaces to BMan that allow low-latency,
lock-less interaction by software running on processor cores,
accelerators and network interfaces with the BMan
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95
Signed-off-by: Scott Wood <scottwood@freescale.com>
The Buffer Manager is part of the Data-Path Acceleration Architecture
(DPAA). BMan supports hardware allocation and deallocation of buffers
belonging to pools originally created by software with configurable
depletion thresholds. This binding covers the CCSR space programming
model
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I3ec479bfb3c91951e96902f091f5d7d2adbef3b2
Signed-off-by: Scott Wood <scottwood@freescale.com>
It adds the DT support for mmp2 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
It adds the DT support for pxa910 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
It adds the DT support for pxa168 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
The documentation only mentioned the generic fallback compatible
property.
Add the missing SoC-specific compatible properties, which are already in
use.
Also drop a bogus 0x unit-address prefix while we're at it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mark Brown <broonie@kernel.org>
The documentation only mentioned the generic fallback compatible
property.
Add the missing SoC-specific compatible properties, some of which are
already in use.
Also fix a small typo, while we're at it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mark Brown <broonie@kernel.org>
Enable led-mode configuration for KSZ8081 and KSZ8091.
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
A recent commit extended the documentation of the ethernet-phy
compatible property, but placed the new paragraph under the max-speed
property.
Fixes: f00e756ed12d ("dt: Document a compatible entry for MDIO ethernet
Phys")
Cc: devicetree@vger.kernel.org
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Make it possible to transfer i2c message buffers via DMA.
Start/Stop/Sending_Slave_Address is still handled using the old state
machine, it is sending the actual data that is done via DMA. This is
least intrusive and allows us to work with the message buffers directly
instead of preparing a custom buffer which involves copying the data
around.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
[wsa: fixed an uninitialized var problem]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
An underrun (playback) event occurs when the serializer transfer
data from the XRBUF buffer to the XRSR shift register, but the
XRBUF hasn't been filled. Similarly, the overrun (capture) event
occurs when data from the XRSR shift register is transferred to
the XRBUF but it hasn't been read yet.
These events are handled as XRUN events that cause the pcm to stop.
The stream has to be explicitly restarted by the userspace which
ensures that after stopping/starting McASP the data transfer is
aligned with DMA. The other possibility was to internally stop and
start McASP without DMA even knowing about it.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Describes how to specify the parents for clocks with EXSRC bits.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch to compensate tx impedance (Sata, PCIe)
depending on Soc cuts the kernel is built for.
Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This patch to tune on/off the ssc on miphy sata setup.
User can now enable ssc via dt blob, it is useful to reduce
effects of EMI.
Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.
Signed-off-by: alexandre torgue <alexandre.torgue@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
It is not possible to auto detect the irq numbers used by the cores on
an arm SoC. If bcma was registered with device tree it will search for
some device tree nodes with the irq number and add it to the core
configuration.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit unifies the APB1 mux with the APB1 clock, using the new
factors infrastructure.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
[wens@csie.org: Add mux mask bits]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This driver has no 'compatible' string and so is not found when
using device-tree.
Add one with value to match
hdqw1w: 1w@480b2000 {
device in omap3.dtsi.
Signed-off-by: NeilBrown <neilb@suse.de>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now that sdhci-pxav3 driver allows to have more than one IP clock defined,
document both clocks and clock-names properties.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Explicitly list the various SoC-specific compatible properties.
This allows checkpatch to validate DTSes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This patch adds initial driver data for Exynos7 pinctrl support.
Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Exynos7 uses different offsets for wakeup interrupt configuration registers.
So a new irq_chip instance for Exynos7 wakeup interrupts is added. The irq_chip
selection is now based on the wakeup interrupt controller compatible string.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Most implementations of the bcm7120-l2 controller only have a single
32-bit enable word + 32-bit status word. But some instances have added
more enable/status pairs in order to support 64+ IRQs (which are all
ORed into one parent IRQ input). Make the following changes to allow
the driver to support this:
- Extend DT bindings so that multiple words can be specified for the
reg property, various masks, etc.
- Add loops to the probe/handle functions to deal with each word
separately
- Allocate 1 generic-chip for every 32 IRQs, so we can still use the
clr/set helper functions
- Update the documentation
This uses one domain per bcm7120-l2 DT node. If the DT node defines
multiple enable/status pairs (i.e. >=64 IRQs) then the driver will
create a single IRQ domain with 2+ generic chips. Multiple generic chips
are required because the generic-chip code can only handle one
enable/status register pair per instance.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-12-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
- Rearrange the DTS files to make a pure SoC-specific file and
a pure board file for S8815.
- Add the device tree for the NDK15 board.
- Update the defconfig and configure in the STMPE expander by
default on the Nomadik.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUWyzIAAoJEEEQszewGV1z0Q0P/3yvUT1NWTSRAhu+5V1ycVSi
UmctP58ZPSU14Zavvb6E4XunfgrLNRIGTXAL1YbSUURGLNJ6+bsKLmBHQB3z/oQ4
4ynSE0pqdLna3fxhgxqfikh4Oc1213Nppnb1RcGupS1S7ya5JGsg6PD50nSlUCan
xR+WG4U5ZQ80Z0eWMoafFeESt4n2xv4J1BwNyiFDoSDaAmUdRJTiWtXYlVaMcuXD
Ysrp7QNSihvUO74AcS43H2zv1nMxnUDgKpKWTq4UGHMRkdDSlAo2zskATmYhenBd
CteDwuGHgTtBcnUOEA+AHidSw25Pl2QmS5CX9Dgt70DNq/OCKIOyi2nwn4NnKhWY
+WfL4TKLshREe83GCBOkDO5bBNV4qP9W81ASisIp2T6ALCQQEqyRU4BIF1vsAJuR
fynPzzSDuwAzPbxOTVB8HVyzY2XEKEzMOwAFLBt7U1dteuIGkOUbfM8bso13AAYR
bI4XPaPpY5l5TE5OKC3AzdMltiVU8onwsMaBfx4Gp3aIhzVN+OH/Tr4Bu1TDAhSb
hSZ74Z+SAKdrLBvZRe6FJUp+8bV5znTFq/R9g4QmIruw3drOWzxIdZFvvA+Oyz/J
pGH/kBSRKze1TJfYy2QMbZ1vKj2sD0S8AOIOGTL+hXjHZFDyd7367JsuSWrTGXK6
oHtUyZhKmHQ+rIUhawy6
=6oZZ
-----END PGP SIGNATURE-----
Merge tag 'nomadik-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Merge "Nomadik updates for the v3.19 series" from Linus Walleij:
Nomadik changes for the v3.19 development series:
- Rearrange the DTS files to make a pure SoC-specific file and
a pure board file for S8815.
- Add the device tree for the NDK15 board.
- Update the defconfig and configure in the STMPE expander by
default on the Nomadik.
* tag 'nomadik-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: configure in STMPE support
ARM: update Nomadik config
ARM: nomadik: device tree for NHK15 board
ARM: nomadik: push ethernet down to board
ARM: nomadik: set up MCDATDIR2
ARM: nomadik: move GPIO I2C to S8815 board file
ARM: nomadik: disable chrystals in top level board files
ARM: nomadik: move MMC/SD card detect GPIO to board DTS
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUVqxEAAoJEEEQszewGV1zRcQP/AxYB/o+6Zb/HgCxIT+9vujJ
4ghuDElDUffBCXhv8IGuvzcAK+UKAqoj98vZNmI6Kl/MvXoHLcyTfu7e9i/zPFcM
szYdlG+ui4PEhuwPgWHCpOzyWWjqBuujFyYG8Kk/akUtMntV0NXoS7snqoAw47Y1
IAn7oov+UHFDw8ewWU+i5qrdPKOQ4IaIQcWB58EfJHfsU4f9sUB6JVSBJ3mCtAhg
N8P3qg9WV0sqvZt1oI+naTRZL/CtNlrDYVnWVQb0WeGEI3MGEibEkWr1HScHmwko
eNsOvTV+/3iFz/RUQtFqw4kidHiIdpTHgCLEauJ+KBz86X5sRq23CXLWnZy3h9Mw
q/05yl0/IgTZlNCrULqmkcapjLp89nk5PGYOtuXuaYPj7y8og3LWc+bCYIXJd7Ay
OMH9CJQpysWdyDOMt2C7xOI3/IkUjluEvOGN8iWoze9k8Dxr2+Ajmvf74lu0QtYm
hejdKS6Jr0a43FHwJFS/oX7LAGSft76xvs9bGa033YRcNGLXYLcjlbNqynep0Hhm
SKk67IfI+FXjo28FWlp7sXWsfhyg3tJHkAgEPZ1o+V8UNWT5Pb+Pop/DqJG6Jvjc
+F3m+wkvcP7kOpVHdyFqY026lb0nMyDimTvqYjfDxwaElVcUSBu3/0/A9SJGqBcH
L0mMNkBMP5HDmwy6bo2u
=8T8T
-----END PGP SIGNATURE-----
Merge tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
Merge "Ux500 core changes for v3.19" from Linus Walleij:
"please pull in these Ux500 core changes for this kernel development
cycle: mainly a generic power domain implementation from Ulf Hansson
that needs to get queued up in -next and tested."
Generic power domains for the Ux500
* tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Add i2c devices to the VAPE PM domain
ARM: ux500: Add spi and ssp devices to the VAPE PM domain
ARM: ux500: Add sdi devices to the VAPE PM domain
ARM: ux500: Add DT node for ux500 PM domains
ARM: ux500: Enable Kconfig for the generic PM domain
ARM: ux500: Initial support for PM domains
dt: bindings: ux500: Add header for PM domains specifiers
dt: bindings: ux500: Add documentation for PM domains
ARM: u300: Convert pr_warning to pr_warn
- AHCI and SATA PHY nodes for BG2Q
- Reset controller binding docs
- Ethernet nodes for BG2, BG2CD
- SDHCI nodes for BG2, BG2CD
- Corresponding board changes to enable AHCI, Ethernet, SDHCI
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUVhGkAAoJEN2kpao7fSL42icQAIC5LG0eL8yi6HXOAhI1Tkky
0g6J2/HZtUqoGHKU92kvBa7kba852oMi2NIIF9LI03b8o1z7E4Of8sZCPCvH/BQ/
hBmUIDi6himQ8+SxDBFcsETjIu2vPgemvy1mvwd/OUNY2YEFkYLKT48qrU3pD5oU
F2W33RpHrkkazG7/WrcRa+Tk2G2eb3tC90czAjE5A5PkAp4LUEZq24treuVv424h
S6qe76WQs+EHIW3nkIBmRjr3D7yWW1U9vknxwz6XNyNkvW9bcMfTMq1dQY5RXt17
JiZli9d62Z1Fu8k0qDebcgTw5YzyoXIuLd4+hbPn8qFkT/umjIgrZOZYD4dZmBvB
vxwQ5NOw1mI27Lbb1IkpizldzpJ1XwhvY3POfgGVYSeI5R4CyLamvzaMJbo8zWWs
CvneMaghQNWweC9AiOlUXJKzlaYJMu6pfMJssZuzyLx4g+YGKQunoGIEXehWzRAh
g8K0bUfYxWHmhZPz9nQLaDJTJI85Xytm0/iP14STp59OsKQsFokm4m9X5ZyJrQHc
ig1NivEC8qDZqegRhjDLsatkI8xsQA6ovA/h7HHil5D04hxI6OlRiFfob9ZAhkxc
hud9Ne7vocJ6uhB72xm4eTKcMSg1iSi6wDEsaoK/jU6yTdOgV2i3QvIr8wQZ+yru
SFy2OPWebL9AaCdgTfaO
=VVTX
-----END PGP SIGNATURE-----
Merge tag 'berlin-dt-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "ARM: berlin: DT changes for v3.19 (round 1)" from Sebastian Hesselbarth:
"This is Berlin DT changes for v3.19 and contains those patches that missed
the v3.18 merge window plus corresponding patches to catch-up with Antoine's
BG2Q improvements for BG2 and BG2CD. We now have working SDHCI and Ethernet
on all SoCs (well, BG2CD has HDMI HEC only), SATA PHY support for BG2 is still
pending."
Berlin DT changes for v3.19 (round 1)
- AHCI and SATA PHY nodes for BG2Q
- Reset controller binding docs
- Ethernet nodes for BG2, BG2CD
- SDHCI nodes for BG2, BG2CD
- Corresponding board changes to enable AHCI, Ethernet, SDHCI
* tag 'berlin-dt-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: Enable eMMC on Sony NSZ-GS7
ARM: dts: berlin: Enable WiFi on Google Chromecast
ARM: dts: berlin: Add SDHCI controller nodes to BG2/BG2CD
ARM: dts: berlin: Enable ethernet on Sony NSZ-GS7
ARM: dts: berlin: Add phy-connection-type to BG2Q Ethernet
ARM: dts: berlin: Add BG2CD ethernet DT nodes
ARM: dts: berlin: Add BG2 ethernet DT nodes
ARM: dts: berlin: Add GPIO leds to Google Chromecast
ARM: dts: berlin: enable timer 1 for sched_clock
ARM: dts: berlin: add a required reset property in the chip controller node
Documentation: bindings: add reset bindings docs for Marvell Berlin SoCs
ARM: dts: berlin: enable the eSATA interface on the BG2Q DMP
ARM: dts: berlin: add the AHCI node for the BG2Q
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Broadcom Cygnus SoC Device Tree changes" from Florian Fianelli:
This patchset contains initial support for Broadcom's Cygnus SoC based on our
iProc architecture. Initial support is minimal and includes just the mach
platform code, clock driver, and a basic device tree configuration. Peripheral
drivers will be submitted soon, as will device tree configurations for other
Cygnus board variants.
These are the Device Tree changes
* tag 'arm-soc/for-3.18/cygnus-dts-v9' of http://github.com/brcm/linux:
ARM: dts: Enable Broadcom Cygnus SoC
dt-bindings: Document Broadcom Cygnus SoC and clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I7950afa9650d15ec7ce2cca89bb2a1e38586d4a5
Signed-off-by: Scott Wood <scottwood@freescale.com>
Add equivalent attributes to those provided in the platform data
for use when RX DMA is enabled.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
