52 Commits

Author SHA1 Message Date
Linus Torvalds
982818426a ARM: SoC fixes for 6.3, part 1
A few bugfixes already came up during the merge window. Samsung, ASpeed,
 Spear have minor DT changes, in case of Samsung this fixes a regression
 compared to earlier versions.
 
 Bartosz takes over as the primary maintainer for the TI DaVinci platform,
 and we get a few last minute defconfig changes.
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Merge tag 'arm-fixes-6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A few bugfixes already came up during the merge window. Samsung,
  ASpeed, Spear have minor DT changes, in case of Samsung this fixes a
  regression compared to earlier versions.

  Bartosz takes over as the primary maintainer for the TI DaVinci
  platform, and we get a few last minute defconfig changes"

* tag 'arm-fixes-6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: spear320-hmi: correct STMPE GPIO compatible
  ARM: dts: aspeed: p10bmc: Update battery node name
  arm64: defconfig: Add IOSCHED_BFQ to the default configs
  arm64: defconfig: Fix unintentional disablement of PCI on i.MX
  ARM: dts: exynos: correct TMU phandle in Odroid XU3 family
  ARM: dts: exynos: correct TMU phandle in Odroid HC1
  ARM: dts: exynos: correct TMU phandle in Odroid XU
  ARM: dts: exynos: correct TMU phandle in Exynos5250
  ARM: dts: exynos: correct TMU phandle in Exynos4210
  ARM: dts: exynos: correct TMU phandle in Exynos4
  MAINTAINERS: make me the maintainer of DaVinci platforms
2023-02-27 10:09:40 -08:00
Eddie James
a8cef541dd
ARM: dts: aspeed: p10bmc: Update battery node name
The ADC sensor for the battery needs to be named "iio-hwmon" for
compatibility with user space applications.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230202152759.67069-1-eajames@linux.ibm.com
Fixes: bf1914e2cfed ("ARM: dts: aspeed: p10bmc: Fix ADC iio-hwmon battery node name")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230221003352.1218797-1-joel@jms.id.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-27 14:46:15 +01:00
Eddie James
1480bcf074 ARM: dts: aspeed: p10bmc: Enable UART2
The APSS can be accessed over the second uart on these systems.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230126220842.885965-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-02-01 15:10:18 +10:30
Eddie James
943aaf336e ARM: dts: aspeed: p10bmc: Add occ-hwmon nodes
Add the occ-hwmon nodes in order to specify that the occ-hwmon driver
should not poll the OCC during initialization.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20221101213212.643472-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20 20:47:31 +10:30
Adriana Kobylak
e184d42a6e ARM: dts: aspeed: rainier,everest: Move reserved memory regions
Move the reserved regions to account for a decrease in DRAM when ECC is
enabled. ECC takes 1/9th of memory.

Running on HW with ECC off, u-boot prints:
DRAM:  already initialized, 1008 MiB (capacity:1024 MiB, VGA:16 MiB, ECC:off)

And with ECC on, u-boot prints:
DRAM:  already initialized, 896 MiB (capacity:1024 MiB, VGA:16 MiB, ECC:on, ECC size:896 MiB)

This implies that MCR54 is configured for ECC to be bounded at the
bottom of a 16MiB VGA memory region:

1024MiB - 16MiB (VGA) = 1008MiB
1008MiB / 9 (for ECC) = 112MiB
1008MiB - 112MiB = 896MiB (available DRAM)

The flash_memory region currently starts at offset 896MiB:
0xb8000000 (flash_memory offset) - 0x80000000 (base memory address) = 0x38000000 = 896MiB

This is the end of the available DRAM with ECC enabled and therefore it
needs to be moved.

Since the flash_memory is 64MiB in size and needs to be 64MiB aligned,
it can just be moved up by 64MiB and would sit right at the end of the
available DRAM buffer.

The ramoops region currently follows the flash_memory, but it can be
moved to sit above flash_memory which would minimize the address-space
fragmentation.

Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220916195535.1020185-1-anoo@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-20 20:47:31 +10:30
Krzysztof Kozlowski
bafd5bb5ea ARM: dts: aspeed: correct gpio-keys properties
gpio-keys children do not use unit addresses.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-37-krzysztof.kozlowski@linaro.org
2022-07-05 13:43:54 +02:00
Krzysztof Kozlowski
7bd809eee4 ARM: dts: aspeed: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-36-krzysztof.kozlowski@linaro.org
2022-07-05 13:43:37 +02:00
Brandon Wyman
f6b6795004 ARM: dts: aspeed: everest, rainier: Add power-ffs-sync-history GPIO
The IBM Everest and Rainier systems have a GPIO line that goes to the
power supplies. It has a dual function: 1) Fans Full Speed, and 2) Sync
input history.

Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
Link: https://lore.kernel.org/r/20220421213638.1151193-1-bjwyman@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-05-19 17:12:52 +09:30
Eddie James
09603f805a ARM: dts: aspeed: p10bmc: Enable ftrace in ramoops buffer
Increase the size of the buffer and set the ftrace-size property in order
to collect event tracing during a crash.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211202224525.29178-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28 15:46:12 +10:30
Joel Stanley
454a9fb774 ARM: dts: aspeed: everest: Add RTC battery gpio name
This is the documented name used for OpenBMC systems:

 https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md#rtc-battery-voltage-read-enable

Link: https://lore.kernel.org/r/20220222041559.68651-3-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-28 15:35:09 +10:30
Andrew Geissler
d1acc52b52 ARM: dts: aspeed: everest: Label reset-cause-pinhole GPIO
This GPIO is used on the everest system to indicate the BMC was reset
due to a physical pinhole reset.

It has been verified that the previous name for this pin has not been
utilized by userspace so the name change is ok.

See the following doc for more information:
https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md

Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Link: https://lore.kernel.org/r/20220113211735.37861-2-geissonator@yahoo.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-21 14:11:58 +10:30
Eddie James
b8ae255e89 ARM: dts: aspeed: rainier and everest: Enable UHCI
The UHCI controller is necessary to talk to slower, USB1.1 devices, so
enable the UHCI controller in the device tree.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20220128214852.21551-4-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-01-31 17:17:23 +10:30
Eddie James
62589e873d ARM: dts: aspeed: p10: Add TPM device
Add the Nuvoton NPCT75X, a TIS I2C TPM.

Modified Eddie's change to include the general compatible string, and
combine the rainier and everest patches.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211208191758.20517-8-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21 15:30:31 +10:30
Eddie James
1fe5c05c7c ARM: dts: aspeed: p10: Enable USB host ports
Ensure both controllers are enabled on, and add GPIO hog for USB power
control to set the USB power to always on.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211208170641.13322-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-12-21 15:29:43 +10:30
Andrew Jeffery
59618b1c3b ARM: dts: aspeed: p10bmc: Enable KCS channel 2
Rainier uses KCS channel 2 as the source for the debug-trigger
application outlined at [1] and implemented at [2].

[1] https://github.com/openbmc/docs/blob/master/designs/bmc-service-failure-debug-and-recovery.md
[2] https://github.com/openbmc/debug-trigger

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210623033854.587464-8-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-21 16:56:07 +10:30
Andrew Jeffery
d4efb68f17 ARM: dts: aspeed: p10bmc: Use KCS 3 for MCTP binding
The MCTP LPC driver was loaded by hacking up the compatible in the
devicetree node for KCS 4. With the introduction of the raw KCS driver
this hack is no-longer required. Use the regular compatible string for
KCS 4 and configure the appropriate SerIRQ.

The reset state of the status bits on KCS 4 is inappropriate for the
MCTP LPC binding. Switch to KCS 3 which has a different reset behaviour.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-21 16:56:03 +10:30
Eddie James
a559f27a40 ARM: dts: aspeed: everest: Fix bus 15 muxed eeproms
The eeproms on bus 15 muxes were at the wrong addresses.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20211020215321.33960-6-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-21 16:56:02 +10:30
Eddie James
e175be2a71 ARM: dts: aspeed: everest: Add IBM Operation Panel I2C device
Set I2C bus 14 to multi-master mode and add the panel device that will
register the I2C controller as a slave device.
In addition, in early Everest systems, the panel device was behind an
I2C switch, which doesn't work for slave mode. Get it working (albeit
unreliably, since a master transaction might switch the switch at any
moment) by defaulting the switch channel to the one with the panel.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20211020215321.33960-5-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-21 16:56:02 +10:30
Eddie James
e80e70fb05 ARM: dts: aspeed: everest: Add I2C switch on bus 8
The switch controls two busses containing some VRMs.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20211020215321.33960-4-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-21 16:56:02 +10:30
Eddie James
4df227c407 ARM: dts: aspeed: rainier and everest: Remove PCA gpio specification
Specifying gpio nodes under PCA led controllers no longer does anything,
so remove those nodes in the device trees.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20211020215321.33960-3-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-21 16:56:02 +10:30
Eddie James
bf1914e2cf ARM: dts: aspeed: p10bmc: Fix ADC iio-hwmon battery node name
In keeping with previous systems, call the iio-hwmon bridge node
"iio-hwmon-battery" to distinguish it as the battery voltage
sensor.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20211020215321.33960-2-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-21 16:55:58 +10:30
Joel Stanley
f2a4985058 ARM: dts: aspeed: p10bmc: Define secure boot gpio
Input pin that indicates that the BMC is configured to boot with security
protections enforced.

Pulled up by default (secure). Placing the jumper will pull the pin down
(bypass security).

When in the secure boot state, it makes the EEPROM at 0x50 on bus 14
read only.

Link: https://lore.kernel.org/r/20210923074606.283393-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-10-08 15:10:01 +10:30
Eddie James
eaad40466b ARM: dts: aspeed: Add ADC for AST2600 and enable for Rainier and Everest
Add the ADC nodes to the AST2600 devicetree. Enable ADC1 for Rainier and
Everest systems and add an iio-hwmon node for the 7th channel to report
the battery voltage.

Tested on Rainier:
~# cat /sys/class/hwmon/hwmon11/in1_input
1347

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210916210045.31769-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-22 13:01:04 +09:30
Ben Tyner
1390293eac ARM: dts: everest: Define name for gpio line B6
gpio-line-names B6 set to checkstop

Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210920150549.6431-4-bentyner@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-22 13:00:05 +09:30
Ben Tyner
d269f55815 ARM: dts: everest: Define name for gpio line Q2
gpio-line-names Q2 set to regulator-standby-faulted

Signed-off-by: Ben Tyner <ben.tyner@ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210920150549.6431-3-bentyner@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-22 13:00:04 +09:30
Isaac Kurth
230ffbc782 ARM: dts: everest: Add 'factory-reset-toggle' as GPIOF6
The state of this GPIO determines whether a factory reset has been
requested. If a physical switch is used, it can be high or low. During boot,
the software checks and records the state of this switch. If it is different
than the previous recorded state, then the read-write portions of memory are
reformatted.

Signed-off-by: Isaac Kurth <isaac.kurth@ibm.com>
Link: https://lore.kernel.org/r/20210901185236.558771-1-isaac.kurth@ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-14 18:38:48 +09:30
Eddie James
cf623b6274 ARM: dts: aspeed: everest: Add I2C bus 15 muxes
Add the muxes that are attached on I2C bus 15.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210903214836.48286-3-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-09-14 18:36:18 +09:30
Rob Herring
9e62ec0e66 arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
Fix all the remaining dtc 'unit_address_format' warnings except for the ones
related to 'register-bit-led'. For those, we need to decide on and document
the node name.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210823165126.2320910-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-26 13:46:29 +02:00
Jim Wright
6b8b312698 ARM: dts: aspeed: p10bmc: Add power control pins
Add to p10bmc systems the GPIO line names used in chassis power on / off
control and chassis power good monitoring. Names used are as documented at [1].

[1] https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md

Signed-off-by: Jim Wright <jlwright@us.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210816160002.18645-1-jlwright@us.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-17 13:52:46 +09:30
Joel Stanley
a3034e895a ARM: dts: rainier, everest: Add TPM reset GPIO
The GPIO is used to place the BMC-connected TPM in reset. This state is
latched until the BMC is next reset, blocking access to the TPM for that
boot.

On both machines this net is called TPM_RESET_LATCH_B.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210727033319.473152-2-joel@jms.id.au
2021-07-28 10:40:29 +09:30
Andrew Jeffery
ded3e2864c ARM: dts: everest: Add phase corrections for eMMC
The values were determined via scope measurements.

With the patch we can write and read data without issue where as booting
the system without the patch failed at the point of mounting the rootfs.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210712233642.3119722-1-andrew@aj.id.au
Fixes: faffd1b2bde3 ("ARM: dts: everest: Add phase corrections for eMMC")
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-07-19 09:40:34 +09:30
B. J. Wyman
ab4a49d360 ARM: dts: aspeed: everest: PSU #3 address change
The third power supply had an I2C address conflict with another device
in the system. The device will have the address changed from 6Ah to 6Dh.

Signed-off-by: B. J. Wyman <bjwyman@gmail.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210610202940.3650554-1-bjwyman@gmail.com
Fixes: d66d720b64e5 ("ARM: dts: aspeed: everest: Add power supply i2c devices")
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-07-01 13:41:33 +09:30
Andrew Jeffery
faffd1b2bd ARM: dts: everest: Add phase corrections for eMMC
The values were determined experimentally via boot tests, not by
measuring the bus behaviour with a scope. We plan to do scope
measurements to confirm or refine the values and will update the
devicetree if necessary once these have been obtained.

However, with the patch we can write and read data without issue, where
as booting the system without the patch failed at the point of mounting
the rootfs.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210628013605.1257346-1-andrew@aj.id.au
Fixes: 2fc88f92359d ("mmc: sdhci-of-aspeed: Expose clock phase controls")
Fixes: a5c5168478d7 ("ARM: dts: aspeed: Add Everest BMC machine")
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-07-01 13:37:12 +09:30
Vishwanatha Subbanna
dd87684c7c ARM: dts: aspeed: everest: Add pcie cable card indicator leds
These are leds on the IBM proprietary PCIE cards called cable cards.
Cable cards have 2 ports on them and each port has an indicator led.

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210607031259.475020-7-joel@jms.id.au
2021-06-07 13:38:55 +09:30
Vishwanatha Subbanna
2970264fb8 ARM: dts: aspeed: everest: Add vrm and other indicator leds
This commit adds indicator leds for vrms, processors, opencapi
connectors, tpm, planar, power distribution card and dasd
backplane and are driven by PIC16F882.

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210607031259.475020-6-joel@jms.id.au
2021-06-07 13:38:54 +09:30
Vishwanatha Subbanna
5b4673c847 ARM: dts: aspeed: everest: Add dimm indicator leds
These are dimm indicator leds driven by PIC16F882.

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210607031259.475020-5-joel@jms.id.au
2021-06-07 13:38:54 +09:30
Vishwanatha Subbanna
66d8e7a296 ARM: dts: aspeed: everest: Add pcie slot indicator leds
These are pcie slot indicator leds driven by PCA9552.

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210607031259.475020-4-joel@jms.id.au
2021-06-07 13:38:54 +09:30
Vishwanatha Subbanna
793de4def9 ARM: dts: aspeed: everest: Add nvme and fan indicator leds
These are the indicator leds for nvme slots and fans and are
driven by PCA9552.

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210607031259.475020-3-joel@jms.id.au
2021-06-07 13:38:54 +09:30
Vishwanatha Subbanna
c1e9c4a140 ARM: dts: aspeed: everest: Add system level indicator leds
These are the system level indicator leds that are driven by
PCA9551 connected to the Operator Panel.

Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210607031259.475020-2-joel@jms.id.au
2021-06-07 13:38:54 +09:30
Vishwanatha Subbanna
51b4803723 ARM: dts: aspeed: Everest: Add directly controlled LEDs
These LEDs are directly connected to the BMC's GPIO bank

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-04 16:11:24 +09:30
Santosh Puranik
010da3daf9 ARM: dts: aspeed: Everest: Fix cable card PCA chips
Correct two PCA chips which were placed on the wrong I2C bus and
address.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Santosh Puranik <santosh.puranik@in.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-06-04 16:11:12 +09:30
Joel Stanley
7aaa2074d5 ARM: dts: aspeed: everest: Add size/address cells
The gpio and fan nodes reg properties cause dtc to emit a noisy warning
about relying on default sizes.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30
Eddie James
6cebf3764f ARM: dts: aspeed: everest: Enable fan watchdog
Set watchdog 1 to pulse the fan watchdog circuit that drives the FAULT
pin of the MAX31785, resulting in fans running at full speed, if at
any point the BMC stops pulsing it, such as a BMC reboot at runtime.
Enable watchdog 2 for BMC reboots.

Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210329150020.13632-21-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30
Eddie James
5dbbacd43f ARM: dts: aspeed: everest: Add RTC
Add the RTC at the appropriate I2C bus and address.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210329150020.13632-20-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30
Alpana Kumari
3c00ebf08a ARM: dts: aspeed: everest: GPIOs support
This commit adds support for-
- Presence GPIOs
- I2C control GPIOs
- Op-panel GPIOs (ex PHR)

Signed-off-by: Alpana Kumari <alpankum@in.ibm.com>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Brandon Wyman <bjwyman@gmail.com>
Link: https://lore.kernel.org/r/20210329150020.13632-19-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30
Jim Wright
22db69f04c ARM: dts: aspeed: everest: Add UCD90320 power sequencer
Add UCD90320 chip to Everest device tree.

Signed-off-by: Jim Wright <jlwright@us.ibm.com>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210329150020.13632-18-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30
Brandon Wyman
d66d720b64 ARM: dts: aspeed: everest: Add power supply i2c devices
Add the i2c/pmbus power supply devices to the everest device tree.

Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210329150020.13632-17-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30
Matthew Barth
baf1fb2668 ARM: dts: aspeed: everest: Add pca9552 fan presence
Add the pca9552 at address 0x61 on i2c14 behind mux0 channel 3 with the
4 GPIO fan presence inputs.

Signed-off-by: Matthew Barth <msbarth@us.ibm.com>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Brandon Wyman <bjwyman@gmail.com>
Link: https://lore.kernel.org/r/20210329150020.13632-16-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30
Eddie James
d9406d17e9 ARM: dts: aspeed: everest: Add FSI CFAMs and re-number engines
Add additional CFAMs and re-number the existing engines for the
extra processors present on the Everest system.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210329150020.13632-15-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30
Matthew Barth
7313cde52a ARM: dts: aspeed: everest: Add max31785 fan controller device
Add the max31785 configuration at address 0x52 on i2c14 behind mux0
channel 3.

Signed-off-by: Matthew Barth <msbarth@us.ibm.com>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210329150020.13632-14-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-04-08 11:13:56 +09:30