3 Commits

Author SHA1 Message Date
Rob Herring
3e70cee46c ARM: dts: ixp4xx: Group PCI interrupt properties together
Move the PCI 'interrupt-map-mask' and '#interrupt-cells' properties
alongside the 'interrupt-map' property in each board dts. This avoids
having incomplete set of interrupt properties which may fail validation.

Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2021-10-20 02:31:22 +02:00
Linus Walleij
f2791ed731 ARM: dts: ixp4xx: Use the expansion bus
Replace the "simple-bus" simplification by the proper bus for
IXP4xx memory or device expansion.

Use chip-select addressing with two address cells on all the
flashes mounted on the IXP4xx devices. This includes all flash
chips.

Change the unit-name from @50000000 to @c4000000 as the DTS
validation screams. The registers for controlling the bus are
at c4000000 but the actual memory windows and ranges are at
50000000. Well it is just syntax, we can live with it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09 01:55:10 +02:00
Linus Walleij
94e8b34be2 ARM: dts: ixp4xx: Add devicetree for D-Link DSM-G600 rev A
This adds a devicetree for the D-Link DSM-G600 Wireless Network
Storage Enclosure so that we can delete the boardfile. The boardfile
does not even define an ethernet interface as it has an external
ethernet on PCI. This devicetree is for revision A using IXP420
the rev B version uses PowerPC.

Cc: Michael-Luke Jones <mlj28@cam.ac.uk>
Cc: Rod Whitby <rod@whitby.id.au>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Michael Westerhof <mwester@dls.net>
Cc: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-09 01:55:05 +02:00