IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
These PMICs all contain a GPIO controller. Now that the binding for this
variant is documented, wire up the controller in the device tree.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220916042751.47906-3-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The "ldo-io0" and "ldo-io1" regulators are enabled/disabled by toggling
the pinmux between two functions. This happens in the regulator driver.
Setting the pinmux to "ldo" in the DT is inappropriate because it would
enable the regulator before the driver has a chance to set the correct
initial voltage.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220916042751.47906-2-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Content in NAND boot partition have exceeded 32MB defined in device
tree node.
Increase boot partition size to 37MB to support larger kernel Image
and FPGA bitstream.
Signed-off-by: Teoh Ji Sheng <ji.sheng.teoh@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add interrupt support for the PHYs found on pcb8290. They are all
sharing the same interrupt line towards lan966x.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220915064112.1935051-1-horatiu.vultur@microchip.com
The signal name of pin PB2 with function F is FLEXCOM11_IO1
as it is defined in the datasheet.
Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221017083119.1643-1-mihai.sain@microchip.com
This patch fixes interrupt trigger (should be level low as that is what the
driver is always using), the GPIO that is the interrupt source that is also
used to wake up chip by driving the line low.
The proper polarity is be needed for converting the driver to gpiod API.
Acked-by: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20220920042608.1865560-1-dmitry.torokhov@gmail.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
The USB OTG controller provides the USB data available on stm32mp135f-dk,
on the Type-C connector. Data role is determined by "usb-role-switch".
A STM32G0 provides the USB Type-C and Power Delivery connectivity.
It controls dual role power and dual role data through UCSI protocol over
I2C. It's wired on I2C1, with an interrupt pin on PI2 GPIO.
Its firmware maybe updated over I2C, so use the optional firmware-name
to enable firmware update.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add gpio pin configuration to be used with stm32g0 typec controller. Define
the PI2 to enable internal pull-up on stm32mp13, used as interrupt pin on
stm32mp135f-dk board.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
USBH Host EHCI controller manages the USB High-Speed hub controller IC
offering Type-A CN5 & CN6 connectors available on stm32mp135f-dk.
USB Host OHCI controller doesn't need to be enabled as Full-Speed and
Low-Speed traffic will be managed by the hub.
This USB2514B onboard hub is supplied by a 3v3 PMIC regulator.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
USBPHYC manages the two USB High-Speed phys. port0 is used by USBH and
port1 is used by USBOTG.
Enable and tune both PHYs on stm32mp135f-dk.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add VDD_USB and 3V3_SW regulators on stm32mp135f-dk. Temporary add them
as fixed regulators, waiting for full SCMI regulators support.
This is a precursor patch to enable USB support on STM32MP13:
- VDD_USB supplies the STM32MP13 USB internals
- 3V3_SW supplies various peripherals, including the onboard HUB.
Note: USB support requires these regulators to be enabled before
entering the kernel.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This patch adds USB Host EHCI and OHCI support on stm32mp131.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This patch adds support for USBPHYC and its two USB HS PHY on stm32mp131.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add 1v1, 1v8 and 3v3 PWR regulators on stm32mp131. Temporary add them
as fixed regulators, waiting for full SCMI regulators support.
This is a precursor patch to enable USB support on STM32MP13.
Note: USB support requires these regulators to be enabled before
entering kernel.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The WLAN regulator uses 'gpios' property instead of 'gpio' to specify
regulator enable GPIO. While the former is also currently handled by
the Linux kernel regulator-fixed driver, the later is the correct one
per DT bindings. Update the DT to use the later.
Fixes: 7dd5cbba42c93 ("ARM: dts: stm32: Enable WiFi on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Configure ADC support on stm32mp135f-dk. ADC can be used for
USB Type-C CC1 & CC2 pins wired to in6 & in12.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add a dummy fixed regulator vdd-adc for STM32 ADC,
on STM32MP135F-DK board, while SCMI regulators are not available.
This patch will have to be removed when SCMI regulator support
is added to STM32MP13.
This patch intends to allow ADC enabling on STM32MP13.
With this patch the ADC can probe but it cannot return
valid conversion data, as it's regulator is not actually enabled.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Define pins muxing that can be used for ADC on stm32mp135f-dk board
(USB Type-C CC1 & CC2 pins).
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add ADC1 and ADC2 support to STM32MP13 SoC family.
The STM32MP131 provides only ADC2, while other STM32MP13 SoCs provide
both ADC1 and ADC2.
Internal channels support limitations:
- VREFINT internal channel requires calibration data from OTP memory.
The nvmem properties used to access OTP are not defined for time being,
as OTP support is not yet enabled.
- VBAT internal channel is not defined by default in SoC DT, and
has be defined in board DT when needed, instead. This avoids unwanted
current consumption on battery, when ADC conversions are performed
on any other channels.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The pl18x MMCI driver does not use the interrupt-names property,
the binding document has been updated to recommend this property
be unused, remove it.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add support for USB2514B onboard hub on stm32mp157c EV1 board. The HUB
is supplied by a 3v3 PMIC regulator.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
at86rf230 driver starts with having reset line high, and then drives it
low and then high again, and even calls it "rstn" internally, therefore
it needs to be annotated as "active low" in the DTS.
This will make difference when at86rf230 driver will be converted to
gpiod API that respects declared line polarity.
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove spurious debounce property from linux,extcon-usb-gpio.
Note that debouncing is hard-coded to 20 ms (USB_GPIO_DEBOUNCE_MS
define).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Specify USBH_PEN GPIO being active-low rather than active-high.
Note that this should not have any functional impact as for fixed
regulators the regular GPIO polarity is ignored and a true active-high
enable GPIO would need an additional enable-active-high property which
is/was not the case here. However, this may be rather confusing which
this patch fixes.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move USB VBUS supply from single carrier board to module level device
tree. This pin is as per Colibri module family standard.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Introduce USBC_DET GPIO based USB dual-role aka device/host switching.
While at it re-work pinmux comment adding SODIMM number to the USBC_DET
entry.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds a devicetree for the Kobo Aura 2 Ebook reader. It is based
on boards marked with "37NB-E60QL0+4B1". It is equipped with an i.MX6SL
SoC.
Expected to work:
- Buttons
- Wifi (with external module)
- LED
- uSD
- USB
- RTC
- Fuel Gauge
- Backlight (if the required regulator is probed before the backlight,
specifying a supply is not supported by backlightdriver)
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
variant.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The dai-format and format are handled equally by sound-core.c , the
later is however the only documented property in audio-graph-port.yaml .
Switch to the later.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The default-trigger setting set to none has no impact and triggers DT
dtbs_check warning, remove it:
"
arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dtb: led: led4:linux,default-trigger: 'oneOf' conditional failed, one must be fixed:
"
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Replace "mdio0" node with "mdio" to match mdio.yaml DT schema.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The Avenger96 is populated with STM32MP157A DHCOR SoM, drop the
stm32mp15xc.dtsi which should only be included in DTs of devices
which are populated with STM32MP15xC/F SoC as the stm32mp15xc.dtsi
enables CRYP block not present in the STM32MP15xA/D SoC .
Fixes: 7e76f82acd9e1 ("ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Update the PP2 ethernet ports subnodes' names to match
schema enforced by the marvell,pp2.yaml contents.
Add new required properties ('reg') which contains information
about the port ID, keeping 'port-id' ones for backward
compatibility.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Current internal optee version enables ASYNc notif and in suche case
interrupt is mandatory in optee node.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The compatible "qcom,arch-cache" for l2-cache does not exist, and all
other Qualcomm boards use just "cache" for it. Fix it.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221013190657.48499-2-luca@z3ntu.xyz
The devicetree documentation for the nand node requires the subnode be
called nand@ and no compatible is needed.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221013190657.48499-1-luca@z3ntu.xyz
Add a device tree for the Samsung Galaxy Tab 4 10.1 (SM-T530) wifi tablet
based on the apq8026 platform.
Currently supported are accelerometer sensor, hall sensor,
internal storage, physical buttons (power & volume), screen
(based on simple-framebuffer set up by the bootloader), sdcard,
touchscreen and USB.
Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927214940.244480-4-matti.lehtimaki@gmail.com
The PM8226 provides 8 GPIOs. Add a node to support them.
Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220927214940.244480-2-matti.lehtimaki@gmail.com
