b1a5895352
drm/amdgpu: update the calc algorithm of umc ecc error count
...
the initial value of ecc error count can be adjusted
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-08-02 10:30:38 -05:00
b7f92097f5
drm/amdgpu: implement umc ras init function
...
enable umc ce interrupt and initialize ecc error count
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-08-02 10:30:38 -05:00
2b671b6049
drm/amdgpu: apply umc_for_each_channel macro to umc_6_1
...
use umc_for_each_channel to make code simpler
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-08-02 10:30:38 -05:00
3aacf4ea11
drm/amdgpu: initialize new parameters and functions for amdgpu_umc structure
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add initialization for new members of amdgpu_umc structure
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-08-02 10:30:38 -05:00
a55c8d7bda
drm/amdgpu: remove the clear of MCA_ADDR
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clearing MCA_STATUS is enough to reset the whole MCA, writing zero to
MCA_ADDR is unnecessary
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-08-02 10:30:38 -05:00
8c94810357
drm/amdgpu: query umc ras error address
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query umc ras error address, translate it to gpu 4k page view
and save it.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Dennis Li <dennis.li@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-07-31 14:50:17 -05:00
c2742aef4d
drm/amdgpu: add structures for umc error address translation
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add related registers, callback function and channel index table
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-07-31 14:50:11 -05:00
f1ed4afa13
drm/amdgpu: update algorithm of umc uncorrectable error counting
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remove the check of ErrorCodeExt
v2: refine the if condition for ue counting
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Dennis Li <dennis.li@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-07-31 14:49:58 -05:00
5bbfb64a17
drm/amdgpu: use 64bit operation macros for umc
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replace some 32bit macros with 64bit operations to simplify code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Dennis Li <dennis.li@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-07-31 14:49:46 -05:00
9884c2b1c3
drm/amdgpu: add umc v6_1 query error count support
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Implement umc query_ras_error_count function to support querry
both correctable and uncorrectable error
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Tao Zhou <tao.zhou1@amd.com >
Reviewed-by: Dennis Li <dennis.li@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2019-07-31 14:49:16 -05:00
