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1. Split common reboot/poweroff node to separate DTSI.
2. Don't overheat Odroid XU3 by cooling CPU with cpufreq.
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Merge tag 'samsung-dt-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "ARM: EXYNOS: dts for 4.6, 2nd pull" from Krzysztof Kozlowski:
Samsung DeviceTree updates and improvements for v4.6, second round:
1. Split common reboot/poweroff node to separate DTSI.
2. Don't overheat Odroid XU3 by cooling CPU with cpufreq.
* tag 'samsung-dt-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Don't overheat the Odroid XU3-Lite on high load
ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs
ARM: dts: exynos: Add cooling levels for Exynos5420 CPUs
ARM: dts: exynos: Move syscon reboot/poweroff to common dtsi
All PCI mmio ranges are dynamically mapped now, so we
can remove the fixed virtual address definitions.
Signed-off-by: Krzysztof Hałasa <khalasa@piap.pl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Instead of using old GPIO API, let's switch to GPIOD API, which
automatically handles polarity.
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
In an invalid randconfig build (fixed by another patch),
I ran across this warning:
arch/arm/include/debug/at91.S:18:0: error: "CONFIG_DEBUG_UART_VIRT" redefined [-Werror]
#define CONFIG_DEBUG_UART_VIRT AT91_IO_P2V(CONFIG_DEBUG_UART_PHYS)
As Russell pointed out, we should never #define a macro starting
with CONFIG_ in a source file, as that is rather confusing.
This renames the macro to avoid the symbol clash.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: Russell King <linux@arm.linux.org.uk>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add the three leds on the sama5d2 Xplained board with their pinctrl node.
The blue led is positioned with the "heartbeat" trigger.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: add commit message and adapt to newer kernel]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add the push button named "PB USER" with code 0x104. Associated pinctrl node is
also added.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
For USB gadget on port A (device mode):
- pin PA31 is configured as an input GPIO which triggers an interrupt when
vbus is detected on USB port A.
- pin PB9 is configured as an output GPIO and set to low level so the
board doesn't supply vbus to USB port A.
For USB host:
- pin PB10 is configured as an output GPIO and is active at high level.
The ohci driver will activate this pin so the board supplies vbus to USB
port B.
- pin PB9 should be configured as an output GPIO and active at high level
to use to USB port A in host mode (conflicts with USB gadget).
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
MAC is connected to a PHY in MII mode.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Now that the AT24 uses the NVMEM framework, replace the
memory_accessor in the setup() callback with nvmem API calls.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Detailed description for patchset:
1. Add new EXTCON_CHG_USB_SDP type
- SDP (Standard Downstream Port) USB Charging Port
means the charging connector.a
2. Add the VBUS detection by using GPIO on extcon-palmas
- Beaglex15 board uses the extcon-palmas driver
But, beaglex15 board need the GPIO support for VBUS
detection.
3. Fix the minor issue of extcon drivers
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Merge tag 'extcon-next-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-testing
Chanwoo writes:
Update extcon for 4.6
Detailed description for patchset:
1. Add new EXTCON_CHG_USB_SDP type
- SDP (Standard Downstream Port) USB Charging Port
means the charging connector.a
2. Add the VBUS detection by using GPIO on extcon-palmas
- Beaglex15 board uses the extcon-palmas driver
But, beaglex15 board need the GPIO support for VBUS
detection.
3. Fix the minor issue of extcon drivers
In the final versions of the Porter board (called "PORTER_C") Renesas
decided to get rid of the Maxim Integrated MAX3355 OTG chip and didn't
add any other provision to differ the host/gadget mode, so we'll have to
remove no longer valid "renesas,enable-gpio" property from the HS-USB
device node. Hopefully, the earlier revisions of the board were never
seen in the wild...
Fixes: c794f6a09a25 ("ARM: shmobile: porter: add HS-USB DT support")
Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds support for the volume and gesture keys, using TWL4030 keypad.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This reverts commit 5fcc673067a2b577d37f2c5c5439dbb177f7107e.
The binding may need to change pending related hwmod comments,
so reverting as requested by Paul Walmsley <paul@pwsan.com>.
Let the non boot cpus call into idle with the corresponding hotplug state, so
the hotplug core can handle the further bringup. That's a first step to
convert the boot side of the hotplugged cpus to do all the synchronization
with the other side through the state machine. For now it'll only start the
hotplug thread and kick the full bringup of the cpu.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arch@vger.kernel.org
Cc: Rik van Riel <riel@redhat.com>
Cc: Rafael Wysocki <rafael.j.wysocki@intel.com>
Cc: "Srivatsa S. Bhat" <srivatsa@mit.edu>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul Turner <pjt@google.com>
Link: http://lkml.kernel.org/r/20160226182341.614102639@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
These patches add RTC support for the AM43xx, and add support for
the DRA7xx eDMA controller's TPCC, TPTC0, and TPTC1 IP blocks.
Also included is a workaround for PRCM hardreset control of the DRA7xx
PCIe subsystem.
Note that I do not have a DRA7xx board, and therefore cannot
test any patches for that SoC family.
Basic build, boot, and PM test logs can be found here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-b-for-v4.6/20160301021258/
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Merge tag 'for-v4.6/omap-hwmod-b' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.6/soc
ARM: OMAP2+: second set of hwmod changes for v4.6
These patches add RTC support for the AM43xx, and add support for
the DRA7xx eDMA controller's TPCC, TPTC0, and TPTC1 IP blocks.
Also included is a workaround for PRCM hardreset control of the DRA7xx
PCIe subsystem.
Note that I do not have a DRA7xx board, and therefore cannot
test any patches for that SoC family.
Basic build, boot, and PM test logs can be found here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-b-for-v4.6/20160301021258/
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].
[1] dm814x TRM: SPRUGZ8F: 11.2.4.12.2 NAND Device-Ready Pin
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add Ethernet support (Synopsys MAC IP 3.50a) on stm32f429 SOC.
Signed-off-by: Alexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
This makes it possible to automatically boot-test this defconfig with
kernelci.org.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Regenerate imx_v4_v5_defconfig by running:
make imx_v4_v5_defconfig
- Manually disable EXT2_FS and EXT3_FS
make savedefconfig
mv defconfig arch/arm/configs/imx_v4_v5_defconfig
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Both nodes are required to access NAND Flash memory. Additional
settings will be necessary at the board level to use it.
Tested-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The dmas/dma-names properties are added to the UART nodes. Note that additional
properties are needed to enable them at the board level: check bindings for
details.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
All pinctrl nodes for the Atmel pinctrl controller need to have their
bias configuration explicitly defined. Otherwise, the pinctrl mapping
is not valid.
It works for now as the pinctrl driver proceeds even with invalid
mappings, but this can become an issue, if the pinctrl driver starts
to require valid mappings. Additionally, the pin is not protected from
being remapped later by an other driver.
There is an external 1kOhms pull-up to 3.3V, so no bias is required on
the Ethernet PHY's interrupt line.
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
After adding cpufreq-dt support to Exynos542x, the Odroid XU3-Lite can
be easily overheated when launching eight CPU-intensive tasks:
thermal thermal_zone3: critical temperature reached(121 C),shutting down
This seems to be specific to Odroid XU3-Lite board which officially
supports lower frequencies than regular XU3 or XU4. When working at
maximum CPU speed (1800 MHz big and 1300 MHz LITTLE) in warmer place for
longer time, the fan fails to cool down the board and it reaches
critical temperature.
Add CPU cooling to Exynos5422/5800 to fix this issue. When reaching last
interrupt-driven trip-point (70 degrees of Celsius) start passive
cooling in polling mode (slowing CPU by 2 steps). When reaching 85
degrees of Celsius, start slowing even more, down to 600 MHz.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
On Exynos5422 and Exynos5800 we support 12 cpufreq steps (200-1300 MHz) for LITTLE
and 18 steps for big core (200-1700 MHz). Add respective cooling cells.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
12 steps for big core (700-1800 MHz). Add respective cooling cells.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Add hwmod data for the eDMA blocks:
- TPCC: Third-party channel controller
- TPTC0: Third-party transfer controller 0
- TPTC1: Third-party transfer controller 1
The TPCC's clock gating status follows the status of its clock and
power domain. This means that the hwmod code can not directly control
the TPCC enable/disable status.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[paul@pwsan.com: rephrased last two sentences of the patch description]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This is a minor cycle with :
- cleanup fixes from Arnd, mainly build oriented and sparse type ones
- dma fixes for requestors above 32 (impacting mainly camera driver)
- some minor cleanup on pxa3xx device-tree side
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Merge tag 'pxa-for-4.6' of https://github.com/rjarzmik/linux into next/soc
Merge "pxa changes for v4.6 cycle" from Robert Jarzmik:
This is a minor cycle with :
- cleanup fixes from Arnd, mainly build oriented and sparse type ones
- dma fixes for requestors above 32 (impacting mainly camera driver)
- some minor cleanup on pxa3xx device-tree side
* tag 'pxa-for-4.6' of https://github.com/rjarzmik/linux:
dmaengine: pxa_dma: fix the maximum requestor line
ARM: pxa: add the number of DMA requestor lines
dmaengine: mmp-pdma: add number of requestors
dma: mmp_pdma: Add the #dma-requests DT property documentation
ARM: pxa: pxa3xx device-tree support cleanup
ARM: pxa: don't select RFKILL if CONFIG_NET is disabled
ARM: pxa: fix building without IWMMXT
ARM: pxa: move extern declarations to pm.h
ARM: pxa: always select one of the two CPU types
ARM: pxa: don't select GPIO_SYSFS for MIOA701
ARM: pxa: mark unused eseries code as __maybe_unused
ARM: pxa: mark spitz_card_pwr_ctrl as __maybe_unused
ARM: pxa: define clock registers as __iomem
Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
tbclk is used by ehrpwm to generate PWM waveform on DRA7 SoC. Add Linux
clock to control ehrpwm tbclk.
The TRM says, tbclk is derived from SYSCLKOUT. SYSCLKOUT is nothing but
ehrpwm functional clock derived from the gateable interface and
functional clock of PWMSS(l4_root_clk_div).
Refer AM57x TRM SPRUHZ6[1], October 2014, Table 29-4 and Section 29.2.2.1,
Table 29-19 and the NOTE at the end of the table.
[1] www.ti.com/lit/ug/spruhz6/spruhz6.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- a single fix for nand dmaengine node
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Merge tag 'pxa-dt-4.6' of https://github.com/rjarzmik/linux into next/dt
Merge pxa dt for v4.6 from Robert Jarzmik:
This device-tree pxa update brings :
- a single fix for nand dmaengine node
* tag 'pxa-dt-4.6' of https://github.com/rjarzmik/linux:
ARM: dts: pxa: fix dma engine node to pxa3xx-nand
Quite a few changes, among which:
- Support for the A83t
- Support for the eMMC DDR on a few boards
- Support for the OTG controller on a few boards
- New boards: Itead Ibox, Cubietruck plus, Homlet v2, Lamobo R1
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Merge tag 'sunxi-dt-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Merge "Allwinner DT Additions for 4.6" from Maxime Ripard:
Quite a few changes, among which:
- Support for the A83t
- Support for the eMMC DDR on a few boards
- Support for the OTG controller on a few boards
- New boards: Itead Ibox, Cubietruck plus, Homlet v2, Lamobo R1
* tag 'sunxi-dt-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (34 commits)
ARM: dts: sun8i: Add leds and switch on Orangepi Plus boards
ARM: dts: sun8i: Add ir receiver nodes to H3 dtsi
ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi
dts: sun8i-h3: Add APB0 related clocks and resets
ARM: dts: sun7i: Add dts file for the lamobo-r1 board
ARM: dts: sun4i: Enable USB DRC on Hyundai-a7hd
ARM: dts: sun4i: Enable USB DRC on the MK802
ARM: dts: sun8i: q8-common: Add AXP223 PMIC device and regulator nodes
ARM: dts: sun8i: sinlinx-sina33: Add AXP223 PMIC device and regulator nodes
ARM: dts: sun7i: Enable USB DRC on Olimex A20 EVB
ARM: dts: sun7i: Enable USB DRC on MK808C
ARM: dts: sunxi: Fix #interrupt-cells for PIO in H3
ARM: dts: sun8i-a83t: Correct low speed oscillator clocks
ARM: dts: sun9i: a80-optimus: Remove i2c3 and uart4
ARM: dts: sun4i: Itead Iteaduino to use common code
ARM: dts: sun7i: Add Itead Ibox support
ARM: dts: sunxi: Add sunxi-itead-core-common.dtsi
ARM: dts: sun9i: cubieboard4: Enable hardware reset and HS-DDR for eMMC
ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC
ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pins
...
A bunch of changes to add new drivers to the sunxi and multi_v7 defconfigs,
most notably the USB OTG that is finally enabled.
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Merge tag 'sunxi-defconfig-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/defconfig
Merge "Allwinner defconfig changes for 4.6" from Maxime Ripard:
A bunch of changes to add new drivers to the sunxi and multi_v7 defconfigs,
most notably the USB OTG that is finally enabled.
* tag 'sunxi-defconfig-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi_defconfig: Enable MUSB HDRC driver with Allwinner glue
ARM: multi_v7_defconfig: Enable A10 audio codec driver as module
ARM: multi_v7_defconfig: Enable MUSB HDRC driver with Allwinner glue
ARM: sunxi_defconfig: Enable INPUT_EVDEV so axp20x-pek can be used
ARM: sunxi_defconfig: Enable A10 audio codec driver
ARM: sunxi_defconfig: Enable sunxi IR driver
Just introduce the A83T support.
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Merge tag 'sunxi-core-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Merge "Allwinner core changes for 4.6" from Maxime Ripard:
Just introduce the A83T support.
* tag 'sunxi-core-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Introduce Allwinner for A83T support
DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should be 2. So, changing the address-cells and size-cells to 2 and
updating the memory nodes accordingly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
enable SRAM support in mvebu_v7_defconfig
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Merge tag 'mvebu-defconfig-4.6-2' of git://git.infradead.org/linux-mvebu into next/defconfig
Merge "mvebu defconfig for 4.6 (part 2)" from Gregory CLEMENT:
enable SRAM support in mvebu_v7_defconfig
* tag 'mvebu-defconfig-4.6-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: enable SRAM support in mvebu_v7_defconfig
The LP872x regulator is used in the LG Optimus Black codename sniper to supply
the external mmc card.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Reorder Ethernet node on Armada 38x SoCs
- Add device tree for buffalo linkstation ls-gl
- Use the more accurate armada-370-sata string for SATA on Armada 375
- Add NAND description to Armada 370 DB and Armada XP DB
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Merge tag 'mvebu-dt-4.6-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt for 4.6 (part 2)" from Gregory CLEMENT:
- Reorder Ethernet node on Armada 38x SoCs
- Add device tree for buffalo linkstation ls-gl
- Use the more accurate armada-370-sata string for SATA on Armada 375
- Add NAND description to Armada 370 DB and Armada XP DB
* tag 'mvebu-dt-4.6-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: mvebu: add NAND description to Armada 370 DB and Armada XP DB
ARM: dts: armada-375: use armada-370-sata for SATA
ARM: dts: orion5x: add device tree for buffalo linkstation ls-gl
ARM: dts: orion5x: split linkstation lswtgl into common and device parts
ARM: dts: armada-38x: add reference to ETH connectors for A385-AP
ARM: dts: armada-38x: change order of ethernet DT nodes on Armada 38x
ARM: dts: orion5x: fix the missing mtd flash on linkstation lswtgl
ARM: dts: kirkwood: use unique machine name for ds112
randconfig warning fixes for mvebu SoCs
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Merge tag 'mvebu-soc-4.6-1' of git://git.infradead.org/linux-mvebu into next/fixes-non-critical
Merge "mvebu soc for 4.6 (part 1)" from Gregory CLEMENT:
randconfig warning fixes for mvebu SoCs
* tag 'mvebu-soc-4.6-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused
ARM: mv78xx0: avoid unused function warning
ARM: orion: only select I2C_BOARDINFO when using I2C
Add a missing call to of_node_put() armada_xp_smp_prepare_cpus()
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Merge tag 'mvebu-cleanup-4.6-2' of git://git.infradead.org/linux-mvebu into next/cleanup
Merge "mvebu cleanup for 4.6 (part 2)" from Gregory CLEMENT:
Add a missing call to of_node_put() armada_xp_smp_prepare_cpus()
* tag 'mvebu-cleanup-4.6-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add missing of_node_put()
The LP872x regulator is used in the LG Optimus Black codename sniper to supply
the external mmc card.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds support for USB OTG on the Optimus Black.
The HSUSB0 interface is connected to the TWL4030 USB PHY.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The LG Optimus Black codename sniper is a smartphone that was designed and
manufactured by LG Electronics (LGE) and released back in 2011.
It is using an OMAP3630 SoC, GP version.
This adds devicetree support for the device, with only a few basic features
supported, such as debug uart, i2c, internal emmc and external mmc.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Programming the active state in the (re)distributor can be an
expensive operation so it makes some sense to try and reduce
the number of accesses as much as possible. So far, we
program the active state on each VM entry, but there is some
opportunity to do less.
An obvious solution is to cache the active state in memory,
and only program it in the HW when conditions change. But
because the HW can also change things under our feet (the active
state can transition from 1 to 0 when the guest does an EOI),
some precautions have to be taken, which amount to only caching
an "inactive" state, and always programing it otherwise.
With this in place, we observe a reduction of around 700 cycles
on a 2GHz GICv2 platform for a NULL hypercall.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Doing a linear search is a bit silly when we can do a binary search.
Not that we trap that so many things that it has become a burden yet,
but it makes sense to align it with the arm64 code.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
As we're going to play some tricks on the struct coproc_reg,
make sure its 64bit indicator field matches that of coproc_params.
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
