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Tegra AHCI dt-binding doc is converted from text based to yaml based.
dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.
Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.
This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit adds "interrupts" property to Tegra210/Tegra186/Tegra194
XUSB PADCTL node. XUSB PADCTL interrupt will be raised when USB wake
event happens. This is required for supporting XUSB host controller
ELPG.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The trogdor design has two options for supplying the 'pp3300_hub' power
rail, it can be supplied by 'pp3300_l7c' or 'pp3300_a'. The 'pp3300_a'
path includes a load switch that can be controlled through GPIO84.
Initially trogdor boards used 'pp3300_l7c' to power the USB hub, newer
revisions (will) use 'pp3300_a' as supply for 'pp3300_hub'.
Add a DT node for the 'pp3300_a' path and a pinctrl entry for the GPIO.
Make this path the default and keep trogdor rev1, lazor rev0 and rev1
on 'pp3300_l7c'. These earlier revisions also allocated the GPIO to the
purpose of controlling the power switch, so there is no need to limit
the pinctrl config to newer revisions. Remove the platform-wide
'always/boot-on' properties from 'pp3300_l7c' and add them to the
boards that use this supply. Also delete the 'always/boot-on'
properties of 'pp3300_hub' for these boards.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20201124164714.v4.1.I0ed4abdd2b2916fbedf76be254bc3457fb8b9655@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
They don't descibe hardware fully yet but it's enough to boot a system.
Some missing blocks:
1. PMC (Power Management Controller?)
2. Ethernet
3. Crypto
4. Thermal
Asus DTS is missing defining full NAND partitions layout and buttons.
Further changes will fill those gaps as soon as required bindings will
be found / tested / added.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
DMA device nodes should follow regex pattern of "^dma-controller(@.*)?$".
This is a preparatory patch to use YAML doc format for ADMA.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
For some reason this was never hooked up. Do it now so that over-current
interrupts can be logged.
Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
According to dmesg, thermal-zones for mem and cpu are missing hot
temperatures properties.
throttrip: pll: missing hot temperature
...
throttrip: mem: missing hot temperature
...
Adding them will clear the messages.
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
On Jetson TX1 the following message can be seen:
tegra_soctherm 700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop
This patch will fix the invalid prop issue according to the binding.
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
According to dmesg, thermal-zones for mem and cpu are missing hot
temperatures properties.
throttrip: pll: missing hot temperature
...
throttrip: mem: missing hot temperature
...
Adding them will clear the messages.
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix the device-tree entry that represents I/O High Voltage property
by replacing 'nvidia,io-high-voltage' with 'nvidia,io-hv' as the former
entry is deprecated.
Fixes: dbb72e2c305b ("arm64: tegra: Add configuration for PCIe C5 sideband signals")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
GIC400 has full support for virtualization, and yet the tegra186
DT doesn't expose the GICH/GICV regions (despite exposing the
maintenance interrupt that only makes sense for virtualization).
Add the missing regions, based on the hunch that the HW doesn't
use the CPU build-in interfaces, but instead the external ones
provided by the GIC. KVM's virtual GIC now works with this change.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the description of CPU PMUs for both the Denver and A57 clusters,
which enables the perf subsystem.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When the device-tree board file was added for the Tegra234 VDK simulator
it incorrectly used the names 'cbb' and 'sdhci' instead of 'bus' and
'mmc', respectively. The names 'bus' and 'mmc' are required by the
device-tree json-schema validation tools. Therefore, fix this by
renaming these nodes accordingly.
Fixes: 639448912ba1 ("arm64: tegra: Initial Tegra234 VDK support")
Reported-by: Ashish Singhal <ashishsingha@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The AON HSP node's "reg" property size 0xa0000 will overlap with other
resources. This patch fixes that wrong value with correct size 0x90000.
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Fixes: a38570c22e9d ("arm64: tegra: Add nodes for TCU on Tegra194")
Signed-off-by: Thierry Reding <treding@nvidia.com>
USB host mode is broken on the OTG port of Jetson TX1 platform because
the USB_VBUS_EN0 regulator (regulator@11) is being overwritten by the
vdd-cam-1v2 regulator. This commit rearranges USB_VBUS_EN0 to be
regulator@14.
Fixes: 257c8047be44 ("arm64: tegra: jetson-tx1: Add camera supplies")
Cc: stable@vger.kernel.org
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Jetson Xavier NX board routes UARTA to the 40-pin header and UARTC
to a 12-pin debug header. The UARTs can be used by either the Tegra
Combined UART (TCU) driver or the Tegra 8250 driver. By default, the
TCU will use UARTC on Jetson Xavier NX. Currently, device-tree for
Xavier NX enables the TCU and the Tegra 8250 node for UARTC. Fix this
by disabling the Tegra 8250 node for UARTC and enabling the Tegra 8250
node for UARTA.
Fixes: 3f9efbbe57bc ("arm64: tegra: Add support for Jetson Xavier NX")
Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit ff4c371d2bc0 ("arm64: defconfig: Build ADMA and ACONNECT driver")
enable the Tegra ADMA and ACONNECT drivers and this is causing resume
from system suspend to fail on Jetson TX2. Resume is failing because the
ACONNECT driver is being resumed before the BPMP driver, and the ACONNECT
driver is attempting to power on a power-domain that is provided by the
BPMP. While a proper fix for the resume sequencing problem is identified,
disable the ACONNECT for Jetson TX2 temporarily to avoid breaking system
suspend.
Please note that ACONNECT driver is used by the Audio Processing Engine
(APE) on Tegra, but because there is no mainline support for APE on
Jetson TX2 currently, disabling the ACONNECT does not disable any useful
feature at the moment.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
DT schema is checking tuples which should be properly separated. The patch
is doing this separation to avoid the following warning:
..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0,
3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
any of the given schemas (Possible causes of the failure):
...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected
...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0,
3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com
The reason for this change is that after change from amba to axi U-Boot
started to show error like:
Unable to update property /axi/ethernet@ff0e0000:mac-address, err=FDT_ERR_NOTFOUND
Unable to update property /axi/ethernet@ff0e0000:local-mac-address, err=FDT_ERR_NOTFOUND
The reason is implementation in fdt_nodename_eq_() which is taken from dtc
to the kernel and to the U-Boot. Especially DTC commit d2a9da045897 ("libfdt:
Make unit address optional for finding nodes") which is in DTC from 2007.
The part of commit description is
" This is contrary to traditional OF-like finddevice() behaviour, which
allows the unit address to be omitted (which is useful when the device
name is unambiguous without the address)."
The kernel commit dfff9066e60e ("arm64: dts: zynqmp: Rename buses to be
align with simple-bus yaml") changed amba-apu/amba to axi@0/axi but
fdt_nodename_eq_() detects /axi/ as match for /axi@0/ because of commit
above.
That's why it easier to fix one DT inside the kernel by moving GIC node
from own bus to generic axi bus as is done by others SoCs. This will avoid
incorrect match because the unit address is omitted.
Reported-by: Paul Thomas <pthomas8589@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f767fe007e446a2299fda9905e75b723c650a424.1605021644.git.michal.simek@xilinx.com
Add DDR/L3 bandwidth votes for the pro variant of SC7180 SoC, as it support
frequencies upto 2.5 GHz.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1606198876-3515-2-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC
since the gold cores only support frequencies upto 2.1 GHz.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1606198876-3515-1-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Trogdor has a thermistor to monitor the temperature of the charger IC.
Add the ADC (monitor) nodes and a thermal zone for this thermistor.
Signed-off-by: Antony Wang <antony_wang@compal.corp-partner.google.com>
[mka: tweaked commit message]
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20201030084840.1.If389f211a8532b83095ff8c66ec181424440f8d6@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add ADC_TM peripheral definitions for PM6150 and PM6150L. Add
ADC peripheral definition for PM6150l, which is needed for ADC_TM.
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
Link: https://lore.kernel.org/r/1602160825-10414-2-git-send-email-jprakash@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The Android and Windows firmware does not accept the use of 3 as a mask
to cover the IPA streams. But with 0x721 being related to WiFi and 0x723
being unsed the mapping can be reduced to just cover 0x720 and 0x722,
which is accepted.
Acked-by: Alex Elder <elder@linaro.org>
Tested-by: Alex Elder <elder@linaro.org>
Fixes: e9e89c45bfeb ("arm64: dts: sdm845: add IPA iommus property")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201123052305.157686-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Point the various remoteprocs of SM8150 MTP to a place with the platform
specific firmware.
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201121055603.582281-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The SMMU that sits in front of the QUP needs to be programmed properly
so that the i2c geni driver can allocate DMA descriptors. Failure to do
this leads to faults when using devices such as an i2c touchscreen where
the transaction is larger than 32 bytes and we use a DMA buffer.
arm-smmu 15000000.iommu: Unexpected global fault, this could be serious
arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000006c0, GFSYNR2 0x00000000
Add the right SID and mask so this works.
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Caleb Connolly <caleb@connolly.tech>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
[bjorn: Define for second QUP as well, be more specific in sdm845.dtsi]
Link: https://lore.kernel.org/r/20201122034149.626045-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This is to remove similar errors as below:
OF: /.../gpio-port@0: could not find phandle
Commit 7569486d79ae ("gpio: dwapb: Add ngpios DT-property support")
explained the reason of above errors well and added the generic
"ngpios" property, let's use it.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The snps,dw-apb-uart binding need to specify two clocks: "baudclk",
"apb_pclk". But only "apb_pclk" is specified now. Because the driver
preferentially matches the first clock. Otherwise, it matches the second
clock instead of both clocks. So both of them use the same clock don't
change the function.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The arm,pl011 binding need to specify two clocks: "uartclk", "apb_pclk".
But only "apb_pclk" is specified now. Because the driver preferentially
matches the first clock. Otherwise, it matches the second clock instead
of both clocks. So both of them use the same clock don't change the
function.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk".
But only "apb_pclk" is specified now. Because the driver preferentially
matches the first clock. Otherwise, it matches the second clock instead
of both clocks. So both of them use the same clock don't change the
function.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Change the node name of the UART devices to match
"^serial(@[0-9a-f,]+)*$".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Change the node name of the usb devices to match "^usb(@.*)?". These errors
are detected by generic-ehci.yaml and generic-ohci.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Change the node name of the SMMU devices to match "^iommu@[0-9a-f]*".
Otherwise, the errors similar to the following will be reported by
arm,smmu-v3.yaml.
smmu_pcie: $nodename:0: 'smmu_pcie' does not match '^iommu@[0-9a-f]*'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Look at the clock-names schema defined in synopsys-dw-mshc.yaml:
clock-names:
items:
- const: biu
- const: ciu
The "biu" needs to be placed before the "ciu".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
uart1 and uart5 are not used as pinctrl, so the property "pinctrl-names"
can be deleted. In fact, the property "pinctrl-names" depends on the
property "pinctrl-0". So the errors similar to the following will be
reported by pinctrl-consumer.yaml.
serial@fdf00000: 'pinctrl-0' is a dependency of 'pinctrl-names'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Use <> to separate the values of property-units will be treated as
multiple arrays. The errors similar to the following will be reported by
property-units.yaml.
ufs@ff3c0000: freq-table-hz: [[0, 0], [0, 0]] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Do not write the "reg" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported by reg.yaml.
soc: dsa@c7000000:reg:0: [0, 3305111552, 0, 8978432, 0, 3338665984, 0, \
6291456] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Change the node name of the ITS devices to match
"^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$". Although
"interrupt-controller" is allowed, but "msi-controller" is preferred.
Otherwise, "interrupt-controller@b7000000: False schema does not allow"
will be reported by arm,gic-v3.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The uart2 node has been renamed, apply the change to sm8250-hdk dts too so
that serial output works.
Fixes: 91ed0e90fc49 ("arm64: dts: qcom: add sm8250 hdk dts")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20201123143538.14198-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
all ordering, a fix to make the Odroig Go Advance actually power down
and using the correct clock name on the NanoPi R2S.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl+6aAkQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgZ6aB/4zVEcf7LYe6RMdV8DCaDHSPK2V8uYOifu/
Z8BaCJujiED249NI0NzvbZqrcuSjssxOSi4Y4kNCytPODs1+4wLVgG0f2xC2k38X
o0ofroN68lueSdhw4PZ9216w9scZpo/POLC7LLWR6kzlKGKv5Bj4w9UAq6cqqSMk
9FCwSyCxKm3yuYaWz/iJLJfC1oWRZ6qMvzjtXfdDT8bMFhLUZh9UOoWGeJP7CPIQ
nGu1WWVXWsda4UN7hwirGkApp65yK8asubekznBb2vw9Rr2A3bBuCqDdyOOOim3E
qxeLLGiObNfM6t0m5Pp+PfWPwqyn864LGUBBQ3b5zz7l2wjMh5i8
=/LkX
-----END PGP SIGNATURE-----
Merge tag 'v5.10-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Fixed ordering for MMC devices on rk3399, due to a mmc change jumbling
all ordering, a fix to make the Odroig Go Advance actually power down
and using the correct clock name on the NanoPi R2S.
* tag 'v5.10-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Reorder LED triggers from mmc devices on rk3399-roc-pc.
arm64: dts: rockchip: Assign a fixed index to mmc devices on rk3399 boards.
arm64: dts: rockchip: Remove system-power-controller from pmic on Odroid Go Advance
arm64: dts: rockchip: fix NanoPi R2S GMAC clock name
Link: https://lore.kernel.org/r/11641389.O9o76ZdvQC@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Touch screen and OV5640 camera support for the iWave RainboW Qseven
board (G21D), and its camera expansion board,
- Support for the AISTARVISION MIPI Adapter V2.1 board connected to
HiHope RZ/G2 boards,
- SPI (MSIOF) support for the R-Car M3-W+ SoC,
- Digital Radio Interface (DRIF) support for the R-Car M3-N SoC,
- Initial support for the R-Car M3-W+ ULCB/Kingfisher board combo,
- Minor fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCX66VTQAKCRCKwlD9ZEnx
cFhnAP9W9Jp5o/gp9JQ+Y2Js3xMDD9JngTYRQ+9x4qu2HTf0AAEAjfSzb0T2ub/x
HaW5LisNk1LZNp09+9ugw/nNZxp45AQ=
=QdJ8
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.11
- Touch screen and OV5640 camera support for the iWave RainboW Qseven
board (G21D), and its camera expansion board,
- Support for the AISTARVISION MIPI Adapter V2.1 board connected to
HiHope RZ/G2 boards,
- SPI (MSIOF) support for the R-Car M3-W+ SoC,
- Digital Radio Interface (DRIF) support for the R-Car M3-N SoC,
- Initial support for the R-Car M3-W+ ULCB/Kingfisher board combo,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: hihope-rev4: Add a comment explaining switch SW2404
arm64: dts: renesas: r8a77961: ulcb-kf: Initial device tree
arm64: dts: renesas: r8a77961: Add CAN{0,1} placeholder nodes
arm64: dts: renesas: beacon-renesom-baseboard: Move connector node out of hd3ss3220 device
arm64: dts: renesas: cat874: Move connector node out of hd3ss3220 device
arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
arm64: dts: renesas: rcar-gen3: Convert EtherAVB to explicit delay handling
arm64: dts: renesas: r8a77965: Add DRIF support
arm64: dts: renesas: Add support for MIPI Adapter V2.1 connected to HiHope RZ/G2N
arm64: dts: renesas: Add support for MIPI Adapter V2.1 connected to HiHope RZ/G2M
arm64: dts: renesas: Add support for MIPI Adapter V2.1 connected to HiHope RZ/G2H
arm64: dts: renesas: aistarvision-mipi-adapter-2.1: Add parent macro for each sensor
arm64: dts: renesas: cat875: Remove rxc-skew-ps from ethernet-phy node
arm64: dts: renesas: hihope-rzg2-ex: Drop rxc-skew-ps from ethernet-phy node
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Enable VIN instances
arm64: dts: renesas: r8a77961: Add MSIOF nodes
arm64: dts: renesas: Align GPIO hog names with dtschema
ARM: dts: r8a7742-iwg21d-q7: Add LCD support
Link: https://lore.kernel.org/r/20201113150854.3923885-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit 22337b91022d ("arm64: dts: qcom: sc7180: Changed polling mode
in Thermal-zones node") sets both 'polling-delay' and
'polling-delay-passive' to zero with the rationale that TSENS interrupts
are enabled. A TSENS interrupt fires when the temperature of a thermal
zone reaches a trip point, which makes regular polling below the passive
trip point temperature unnecessary. However the situation is different
when passive cooling is active, regular polling is still needed to
trigger a periodic evaluation of the thermal zone by the thermal governor.
Change 'polling-delay-passive' back to the original value of 250 ms.
Commit 2315ae70af95 ("arm64: dts: qcom: sc7180: Add gpu cooling
support") recently changed the value for the GPU thermal zones from
zero to 100 ms, also set it to 250 ms for uniformity. If some zones
really need different values these can be changed in dedicated patches.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Fixes: 22337b91022d ("arm64: dts: qcom: sc7180: Changed polling mode in Thermal-zones node")
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20201111120334.1.Ifc04ea235c3c370e3b21ec3b4d5dead83cc403b4@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Some versions of the firmware leave i2c gpios in a wrong state.
Add pinctrl that disables pin bias since external pull-up resistors
are present.
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Fixes: 1329c1ab0730 ("arm64: dts: qcom: Add device tree for Samsung Galaxy A3U/A5U")
Signed-off-by: Nikita Travkin <nikitos.tr@gmail.com>
Link: https://lore.kernel.org/r/20201113175917.189123-6-nikitos.tr@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
