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4 Commits

Author SHA1 Message Date
Florian Fainelli
c7b23bcb9e ARM: dts: Cygnus: Fix most DTC W=1 warnings 
Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
 2019-06-22 19:28:37 -07:00
Simran Rai
3dd3c077b5 ARM: dts: Add audio clock to the existing Broadcom Cygnus clock DT 
Signed-off-by: Simran Rai <ssimran@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
 2016-01-31 16:21:37 -08:00
Ray Jui
5253ed194c ARM: dts: enable clock support for Broadcom Cygnus 
Replace current device tree dummy clocks with real clock support for
Broadcom Cygnus SoC

Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
 2015-07-07 18:08:18 -07:00
Scott Branden
c9ad7bc5fe ARM: dts: Enable Broadcom Cygnus SoC 
DT files to enable cygnus consisting on reference designs
and cygnus core configuration.

Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Arun Parameswaran <aparames@broadcom.com>
Tested-by: Jonathan Richardson <jonathar@broadcom.com>
Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com>
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
 2014-11-11 22:30:42 -08:00