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* for-next/read-barrier-depends:
: Allow architectures to override __READ_ONCE()
arm64: Reduce the number of header files pulled into vmlinux.lds.S
compiler.h: Move compiletime_assert() macros into compiler_types.h
checkpatch: Remove checks relating to [smp_]read_barrier_depends()
include/linux: Remove smp_read_barrier_depends() from comments
tools/memory-model: Remove smp_read_barrier_depends() from informal doc
Documentation/barriers/kokr: Remove references to [smp_]read_barrier_depends()
Documentation/barriers: Remove references to [smp_]read_barrier_depends()
locking/barriers: Remove definitions for [smp_]read_barrier_depends()
alpha: Replace smp_read_barrier_depends() usage with smp_[r]mb()
vhost: Remove redundant use of read_barrier_depends() barrier
asm/rwonce: Don't pull <asm/barrier.h> into 'asm-generic/rwonce.h'
asm/rwonce: Remove smp_read_barrier_depends() invocation
alpha: Override READ_ONCE() with barriered implementation
asm/rwonce: Allow __READ_ONCE to be overridden by the architecture
compiler.h: Split {READ,WRITE}_ONCE definitions out into rwonce.h
tools: bpf: Use local copy of headers including uapi/linux/filter.h
* for-next/tlbi:
: Support for TTL (translation table level) hint in the TLB operations
arm64: tlb: Use the TLBI RANGE feature in arm64
arm64: enable tlbi range instructions
arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
arm64: tlb: don't set the ttl value in flush_tlb_page_nosync
arm64: Shift the __tlbi_level() indentation left
arm64: tlb: Set the TTL field in flush_*_tlb_range
arm64: tlb: Set the TTL field in flush_tlb_range
tlb: mmu_gather: add tlb_flush_*_range APIs
arm64: Add tlbi_user_level TLB invalidation helper
arm64: Add level-hinted TLB invalidation helper
arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors
arm64: Detect the ARMv8.4 TTL feature
* for-next/misc:
: Miscellaneous fixes and cleanups
arm64: use IRQ_STACK_SIZE instead of THREAD_SIZE for irq stack
arm64/mm: save memory access in check_and_switch_context() fast switch path
recordmcount: only record relocation of type R_AARCH64_CALL26 on arm64.
arm64: Reserve HWCAP2_MTE as (1 << 18)
arm64/entry: deduplicate SW PAN entry/exit routines
arm64: s/AMEVTYPE/AMEVTYPER
arm64/hugetlb: Reserve CMA areas for gigantic pages on 16K and 64K configs
arm64: stacktrace: Move export for save_stack_trace_tsk()
smccc: Make constants available to assembly
arm64/mm: Redefine CONT_{PTE, PMD}_SHIFT
arm64/defconfig: Enable CONFIG_KEXEC_FILE
arm64: Document sysctls for emulated deprecated instructions
arm64/panic: Unify all three existing notifier blocks
arm64/module: Optimize module load time by optimizing PLT counting
* for-next/vmcoreinfo:
: Export the virtual and physical address sizes in vmcoreinfo
arm64/crash_core: Export TCR_EL1.T1SZ in vmcoreinfo
crash_core, vmcoreinfo: Append 'MAX_PHYSMEM_BITS' to vmcoreinfo
* for-next/cpufeature:
: CPU feature handling cleanups
arm64/cpufeature: Validate feature bits spacing in arm64_ftr_regs[]
arm64/cpufeature: Replace all open bits shift encodings with macros
arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR2 register
arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR1 register
arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR0 register
* for-next/acpi:
: ACPI updates for arm64
arm64/acpi: disallow writeable AML opregion mapping for EFI code regions
arm64/acpi: disallow AML memory opregions to access kernel memory
* for-next/perf:
: perf updates for arm64
arm64: perf: Expose some new events via sysfs
tools headers UAPI: Update tools's copy of linux/perf_event.h
arm64: perf: Add cap_user_time_short
perf: Add perf_event_mmap_page::cap_user_time_short ABI
arm64: perf: Only advertise cap_user_time for arch_timer
arm64: perf: Implement correct cap_user_time
time/sched_clock: Use raw_read_seqcount_latch()
sched_clock: Expose struct clock_read_data
arm64: perf: Correct the event index in sysfs
perf/smmuv3: To simplify code for ioremap page in pmcg
* for-next/timens:
: Time namespace support for arm64
arm64: enable time namespace support
arm64/vdso: Restrict splitting VVAR VMA
arm64/vdso: Handle faults on timens page
arm64/vdso: Add time namespace page
arm64/vdso: Zap vvar pages when switching to a time namespace
arm64/vdso: use the fault callback to map vvar pages
* for-next/msi-iommu:
: Make the MSI/IOMMU input/output ID translation PCI agnostic, augment the
: MSI/IOMMU ACPI/OF ID mapping APIs to accept an input ID bus-specific parameter
: and apply the resulting changes to the device ID space provided by the
: Freescale FSL bus
bus: fsl-mc: Add ACPI support for fsl-mc
bus/fsl-mc: Refactor the MSI domain creation in the DPRC driver
of/irq: Make of_msi_map_rid() PCI bus agnostic
of/irq: make of_msi_map_get_device_domain() bus agnostic
dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus
of/device: Add input id to of_dma_configure()
of/iommu: Make of_map_rid() PCI agnostic
ACPI/IORT: Add an input ID to acpi_dma_configure()
ACPI/IORT: Remove useless PCI bus walk
ACPI/IORT: Make iort_msi_map_rid() PCI agnostic
ACPI/IORT: Make iort_get_device_domain IRQ domain agnostic
ACPI/IORT: Make iort_match_node_callback walk the ACPI namespace for NC
* for-next/trivial:
: Trivial fixes
arm64: sigcontext.h: delete duplicated word
arm64: ptrace.h: delete duplicated word
arm64: pgtable-hwdef.h: delete duplicated words
IRQ_STACK_SIZE can be made different from THREAD_SIZE,
and as IRQ_STACK_SIZE is used while irq stack allocation,
same define should be used while printing information of irq stack.
Signed-off-by: Maninder Singh <maninder1.s@samsung.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/1596196190-14141-1-git-send-email-maninder1.s@samsung.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
- Fix build breakage due to circular headers
- Fix build regression when using Clang's integrated assembler
- Fix IPv4 header checksum code to deal with invalid length field
- Fix broken path for Arm PMU entry in MAINTAINERS
-----BEGIN PGP SIGNATURE-----
iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAl8j9m0QHHdpbGxAa2Vy
bmVsLm9yZwAKCRC3rHDchMFjNClxB/42/chcSRJfo8tEMZQGYAp2ASVBrFmFfgn1
iudQ0vb50BXcpVBeMyVLyCH0did/fAmVDrYqyOiOCpqIjbn0URNB4ghKR71i5yKf
g5xqtZim584WLGcer8KPdNtqdcbwFKcGxs9mJTICRGebQ1CnPYJNVOzceDlYC9I6
pvgSmRPxOCsCxWPsrQWfmPC7OXtRDN7j2DORl0VtHl6d32Som7uURU72deejNmwP
Z+mXA87a2Oa4w5srq9vMwChrNK4+WW5FdzNhK7aZH9zrAMd9oPp35j0mS+a1z3uO
ogQhgVSFrQUYFO7CaZlwcxPTr5jZxpwCCVBMFHQIOSXOXdOiW3z6
=pshv
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Will Deacon:
"The main one is to fix the build after Willy's per-cpu entropy changes
this week. Although that was already resolved elsewhere, the arm64 fix
here is useful cleanup anyway.
Other than that, we've got a fix for building with Clang's integrated
assembler and a fix to make our IPv4 checksumming robust against
invalid header lengths (this only seems to be triggerable by injected
errors).
- Fix build breakage due to circular headers
- Fix build regression when using Clang's integrated assembler
- Fix IPv4 header checksum code to deal with invalid length field
- Fix broken path for Arm PMU entry in MAINTAINERS"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
MAINTAINERS: Include drivers subdirs for ARM PMU PROFILING AND DEBUGGING entry
arm64: csum: Fix handling of bad packets
arm64: Drop unnecessary include from asm/smp.h
arm64/alternatives: move length validation inside the subsection
Conflicts:
arch/arm/include/asm/percpu.h
As Stephen Rothwell noted, there's a conflict between this commit
in locking/core:
a21ee6055c ("lockdep: Change hardirq{s_enabled,_context} to per-cpu variables")
and this fresh upstream commit:
aa54ea903a ("ARM: percpu.h: fix build error")
a21ee6055c is a simpler solution to the dependency problem and doesn't
further increase header hell - so this conflict resolution effectively
reverts aa54ea903a and uses the a21ee6055c solution.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
For SC7180 this adds the necessary properties for blowing fuses in
qfprom, Coresight fixes, GPU interconnect votes and specifies max speed
for USB controller.
SM8150 and SM8250 gains Adreno SMMU, the graphics management unit and
the GPU nodes, to enable headless GPU usage.
SDM845 gains tracing support for deep idle, GPU bus bandwidth scaling
and DB845c gains the LT9611 HDMI bridge wired up.
MSM8994 gains SMD RPM and SCM support and a new dts for the Sony Xperia
Z5.
MSM8992 is refactored and modernized and gets support for SCM, SPMI,
BLSP2 UART and I2C nodes, PMU, RPM clock controller, PSCI and proper CPU
definitions. Support for the Xiaomi Libra and Microsoft Lumia 950 are
added.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl8iVQQbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F9l4P/jc98ZkQXQXKQJ/ZBo/Q
bCXRVd+9BuQrfQLLtBEsoCHAh+XaapbhhKG95nWm8wYY4EWnmArR2XBjtC7Omy3b
9x3M6v3cuHcmaqEx8rHr8OOtJIi440roz3mpl1sZZFOo/XXmuUYIc/J/9/4oAd/J
k4X9ISaSrOzIre99LhRRlfzGeUi02vRHKJ8Qu+qjhtp8qCyctyXw0pZuE+koyWTX
kkri5fzu87/OXp8aJmhevOTn3CXWCNMqDoPthU5Pm1b2GVNiIZUSFztMNIu1h8U4
RZblerVyBB1opOtaA+e1hINrNY7dTM1AUsUc+ocCUehjDscibDqKJHIzoZP/SxED
ZH+3tszHQbv1KQANOTqjW2l0h8eEjFaL8kSf3u3ze7gjzJpUYO3E/xGMhWIZUP/m
nv7gnCc4VB0dhw19R0Nq/LV6zeQalXeuPyzaNoytskW/Gr2A7EdICr1W3fO1JCd7
5/6B8Tj+uGDd9AAXAghCQF2WvW98BQ9/2BM9dpLDHpuETY5Z2JSSZbf5gHNKcgQ9
Mu7CH6geeJsi+PvMDlN+4u9ipIg56ldL7phS+gE6USls4bLO/AJYjunvVA27wPs9
nhdo9B51upePixBUY5aHD9+crf36SmjchuIaoHgEF3kdjF8UwOoS5mU5FIi/u5lx
U528G9RM9PChVVsfdNCgffhj
=FfiE
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT additional updates for 5.9
For SC7180 this adds the necessary properties for blowing fuses in
qfprom, Coresight fixes, GPU interconnect votes and specifies max speed
for USB controller.
SM8150 and SM8250 gains Adreno SMMU, the graphics management unit and
the GPU nodes, to enable headless GPU usage.
SDM845 gains tracing support for deep idle, GPU bus bandwidth scaling
and DB845c gains the LT9611 HDMI bridge wired up.
MSM8994 gains SMD RPM and SCM support and a new dts for the Sony Xperia
Z5.
MSM8992 is refactored and modernized and gets support for SCM, SPMI,
BLSP2 UART and I2C nodes, PMU, RPM clock controller, PSCI and proper CPU
definitions. Support for the Xiaomi Libra and Microsoft Lumia 950 are
added.
* tag 'qcom-arm64-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (31 commits)
arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree
arm64: dts: qcom: msm8992: Add RPMCC node
arm64: dts: qcom: msm8992: Add PSCI support.
arm64: dts: qcom: msm8992: Add PMU node
arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
arm64: dts: qcom: msm8992: Add a SCM node
arm64: dts: qcom: msm8992: Add a proper CPU map
arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
arm64: dts: qcom: bullhead: Add qcom,msm-id
arm64: dts: qcom: msm8992: Fix SDHCI1
arm64: dts: qcom: msm8992: Modernize the DTS style
arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
arm64: dts: qcom: msm8994: Add support for SMD RPM
arm64: dts: qcom: msm8992: Add a label to rpm-requests
arm64: dts: qcom: msm8994: Add SCM node
arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodes
arm64: dts: qcom: add sm8250 GPU nodes
...
Link: https://lore.kernel.org/r/20200730052003.649940-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
When a tracing BPF program attempts to read memory without using the
bpf_probe_read() helper, the verifier marks the load instruction with
the BPF_PROBE_MEM flag. Since the arm64 JIT does not currently recognize
this flag it falls back to the interpreter.
Add support for BPF_PROBE_MEM, by appending an exception table to the
BPF program. If the load instruction causes a data abort, the fixup
infrastructure finds the exception table and fixes up the fault, by
clearing the destination register and jumping over the faulting
instruction.
To keep the compact exception table entry format, inspect the pc in
fixup_exception(). A more generic solution would add a "handler" field
to the table entry, like on x86 and s390.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Song Liu <songliubraving@fb.com>
Link: https://lore.kernel.org/bpf/20200728152122.1292756-2-jean-philippe@linaro.org
Although iph is expected to point to at least 20 bytes of valid memory,
ihl may be bogus, for example on reception of a corrupt packet. If it
happens to be less than 5, we really don't want to run away and
dereference 16GB worth of memory until it wraps back to exactly zero...
Fixes: 0e455d8e80 ("arm64: Implement optimised IP checksum helpers")
Reported-by: guodeqing <geffrey.guo@huawei.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
asm/pointer_auth.h is not needed anymore in asm/smp.h, as 62a679cb28
("arm64: simplify ptrauth initialization") removed the keys from the
secondary_data structure.
This also cures a compilation issue introduced by f227e3ec3b
("random32: update the net random state on interrupt and activity").
Fixes: 62a679cb28 ("arm64: simplify ptrauth initialization")
Fixes: f227e3ec3b ("random32: update the net random state on interrupt and activity")
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
Commit f7b93d4294 ("arm64/alternatives: use subsections for replacement
sequences") breaks LLVM's integrated assembler, because due to its
one-pass design, it cannot compute instruction sequence lengths before the
layout for the subsection has been finalized. This change fixes the build
by moving the .org directives inside the subsection, so they are processed
after the subsection layout is known.
Fixes: f7b93d4294 ("arm64/alternatives: use subsections for replacement sequences")
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Link: https://github.com/ClangBuiltLinux/linux/issues/1078
Link: https://lore.kernel.org/r/20200730153701.3892953-1-samitolvanen@google.com
Signed-off-by: Will Deacon <will@kernel.org>
To allow for re-injection of stage-2 faults on stage-1 page-table walks
due to either a missing or read-only memslot, move the triage logic out
of io_mem_abort() and into kvm_handle_guest_abort(), where these aborts
can be handled before anything else.
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Quentin Perret <qperret@google.com>
Link: https://lore.kernel.org/r/20200729102821.23392-5-will@kernel.org
If a guest performs cache maintenance on a read-only memslot, we should
inform userspace rather than skip the instruction altogether.
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Quentin Perret <qperret@google.com>
Link: https://lore.kernel.org/r/20200729102821.23392-4-will@kernel.org
If the guest generates a synchronous external abort which is not handled
by the host, we inject it back into the guest as a virtual SError, but
only if the original fault was reported on the data side. Instruction
faults are reported as "Unsupported FSC", causing the vCPU run loop to
bail with -EFAULT.
Although synchronous external aborts from a guest are pretty unusual,
treat them the same regardless of whether they are taken as data or
instruction aborts by EL2.
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Quentin Perret <qperret@google.com>
Link: https://lore.kernel.org/r/20200729102821.23392-3-will@kernel.org
kvm_vcpu_dabt_isextabt() is not specific to data aborts and, unlike
kvm_vcpu_dabt_issext(), has nothing to do with sign extension.
Rename it to 'kvm_vcpu_abt_issea()'.
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Quentin Perret <qperret@google.com>
Link: https://lore.kernel.org/r/20200729102821.23392-2-will@kernel.org
Some compilers may put a subset of generated functions into '.text.*'
ELF sections and the linker may leverage this division to optimize ELF
layout. Unfortunately, the recently introduced HYPCOPY command assumes
that all executable code (with the exception of specialized sections
such as '.hyp.idmap.text') is in the '.text' section. If this
assumption is broken, code in '.text.*' will be merged into kernel
proper '.text' instead of the '.hyp.text' that is mapped in EL2.
To ensure that this cannot happen, insert an OBJDUMP assertion into
HYPCOPY. The command dumps a list of ELF sections in the input object
file and greps for '.text.'. If found, compilation fails. Tested with
both binutils' and LLVM's objdump (the output format is different).
GCC offers '-fno-reorder-functions' to disable this behaviour. Select
the flag if it is available. From inspection of GCC source (latest
Git in July 2020), this flag does force all code into '.text'.
By default, GCC uses profile data, heuristics and attributes to select
a subsection.
LLVM/Clang currently does not have a similar optimization pass. It can
place static constructors into '.text.startup' and it's optimizer can
be provided with profile data to reorder hot/cold functions. Neither
of these is applicable to nVHE hyp code. If this changes in the future,
the OBJDUMP assertion should alert users to the problem.
Signed-off-by: David Brazdil <dbrazdil@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200730132519.48787-1-dbrazdil@google.com
On arm64, smp_processor_id() reads a per-cpu `cpu_number` variable,
using the per-cpu offset stored in the tpidr_el1 system register. In
some cases we generate a per-cpu address with a sequence like:
cpu_ptr = &per_cpu(ptr, smp_processor_id());
Which potentially incurs a cache miss for both `cpu_number` and the
in-memory `__per_cpu_offset` array. This can be written more optimally
as:
cpu_ptr = this_cpu_ptr(ptr);
Which only needs the offset from tpidr_el1, and does not need to
load from memory.
The following two test cases show a small performance improvement measured
on a 46-cpus qualcomm machine with 5.8.0-rc4 kernel.
Test 1: (about 0.3% improvement)
#cat b.sh
make clean && make all -j138
#perf stat --repeat 10 --null --sync sh b.sh
- before this patch
Performance counter stats for 'sh b.sh' (10 runs):
298.62 +- 1.86 seconds time elapsed ( +- 0.62% )
- after this patch
Performance counter stats for 'sh b.sh' (10 runs):
297.734 +- 0.954 seconds time elapsed ( +- 0.32% )
Test 2: (about 1.69% improvement)
'perf stat -r 10 perf bench sched messaging'
Then sum the total time of 'sched/messaging' by manual.
- before this patch
total 0.707 sec for 10 times
- after this patch
totol 0.695 sec for 10 times
Signed-off-by: Pingfan Liu <kernelfans@gmail.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Steve Capper <steve.capper@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>
Link: https://lore.kernel.org/r/1594389852-19949-1-git-send-email-kernelfans@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Add support for audio on jack socket of the odroid-n2
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200701094556.194498-3-jbrunet@baylibre.com
Add capture pcm interfaces and loopback routes to the odroid-n2
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200701094556.194498-2-jbrunet@baylibre.com
This patch moves ATOMIC_INIT from asm/atomic.h into linux/types.h.
This allows users of atomic_t to use ATOMIC_INIT without having to
include atomic.h as that way may lead to header loops.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Waiman Long <longman@redhat.com>
Link: https://lkml.kernel.org/r/20200729123105.GB7047@gondor.apana.org.au
Qian reported that the current setup forgoes the Kconfig dependencies and
results in warnings such as:
WARNING: unmet direct dependencies detected for SCHED_THERMAL_PRESSURE
Depends on [n]: SMP [=y] && CPU_FREQ_THERMAL [=n]
Selected by [y]:
- ARM64 [=y]
Revert commit
e17ae7fea8 ("arm, arm64: Select CONFIG_SCHED_THERMAL_PRESSURE")
and re-implement it by making the option default to 'y' for arm64 and arm,
which respects Kconfig dependencies (i.e. will remain 'n' if
CPU_FREQ_THERMAL=n).
Fixes: e17ae7fea8 ("arm, arm64: Select CONFIG_SCHED_THERMAL_PRESSURE")
Reported-by: Qian Cai <cai@lca.pw>
Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200729135718.1871-1-valentin.schneider@arm.com
These are the latest device tree fixes for Arm SoCs:
- TI Keystone2 ethernet regressed after a driver change broke with
incorrect phy-mode in a board's DT source.
- A similar fix is needed for two i.MX boards that were missed in
an earlier bugfix.
- DT change for Armada 38x allowing to add the register needed to fix
NETA lockup when repeatedly switching speed.
- One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card
detect work correctly.
- Two fixes for the Allwinner SoCs, one to relax the CMA allocation
ranges that were failing on older SoCs and one to fix Cedrus on the H6.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8gF10ACgkQmmx57+YA
GNkBGA/+OXUz9WyQrF32/f/Y2PmtDQV9v+0lCnqH3cdbuqYlVCAclAPxoZFy0qy+
cfK+FIAfzKdn8tsDQ3yReLujZgmlm40Tn2m7xS8ZBiwNX6g+ucGmrGyivySYXrFt
39cXHUYG8P8AjpZHaT7MHHGMNIczR4ESp4xSIQhvY4WjE/klkw5E3INqU3Z9M5zm
Ch2BB9UhfbJLSKZtKNPUomqE6wF6VJvyrr3bMPXWYkkZbFugvXFQFNYbrmkxJMVL
BQucXXli/mI8ZaWUwwzZvtLJXuARTtxFuguX/1OLOXHyhY7vBQx3RV96MfmQuFiT
GGgJSVLxA8gO/KlM9IEaAMbpXn3qWRtmDGAqfcRJo/ZQX3QwoaC6Pr5aiU5eGlpk
3jy3X1W+kmYgQem3trDVubIiemTaExHEHs0NN8DUE0zx2cg8AfSdZUEYhQVKXYic
9ijRSVoUg9SYhVXMFp+18thlzMTvm9tO+LNVDmBaucjLTbSGsdedNp+qRCo5OssH
p2704xANlKWBXmAgdZ/n+tlEEOeEqMnKMQHWoeDjKVdhoasswbr7KsIqDVrMjHF/
8M4HrXaYbNT+GL4giFmkuScrBZkHilO5aBJT4RqYli2O3XzThLhLvILf7ar9dwUR
SGpHExsZP+EpfdZYQJkbHrm11SxQRxKbzHAUXg/QIEUld0UsbFM=
=qXc9
-----END PGP SIGNATURE-----
Merge tag 'arm-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc into master
Pull ARM SoC DT fixes from Arnd Bergmann:
"These are the latest device tree fixes for Arm SoCs:
- TI Keystone2 ethernet regressed after a driver change broke with
incorrect phy-mode in a board's DT source.
- A similar fix is needed for two i.MX boards that were missed in an
earlier bugfix.
- DT change for Armada 38x allowing to add the register needed to fix
NETA lockup when repeatedly switching speed.
- One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card
detect work correctly.
- Two fixes for the Allwinner SoCs, one to relax the CMA allocation
ranges that were failing on older SoCs and one to fix Cedrus on the
H6"
* tag 'arm-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: dts: keystone-k2g-evm: fix rgmii phy-mode for ksz9031 phy
ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speeds
ARM: dts: imx6qdl-icore: Fix OTG_ID pin and sdcard detect
ARM: dts: imx6sx-sabreauto: Fix the phy-mode on fec2
ARM: dts: imx6sx-sdb: Fix the phy-mode on fec2
arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage
ARM: dts sunxi: Relax a bit the CMA pool allocation range
The HARDEN_EL2_VECTORS config maps vectors at a fixed location on cores which
are susceptible to Spector variant 3a (A57, A72) to prevent defeating hyp
layout randomization by leaking the value of VBAR_EL2.
Since this feature is only applicable when EL2 layout randomization is enabled,
unify both behind the same RANDOMIZE_BASE Kconfig. Majority of code remains
conditional on a capability selected for the affected cores.
Signed-off-by: David Brazdil <dbrazdil@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200721094445.82184-3-dbrazdil@google.com
If there are spare bits in non-VHE hyp VA, KVM unconditionally replaces them
with a random tag chosen at init. Disable this if the kernel is built without
RANDOMIZE_BASE to align with kernel behavior.
Signed-off-by: David Brazdil <dbrazdil@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200721094445.82184-2-dbrazdil@google.com
This adds a DPLL clock to the Sparx5 SoC. It is used to generate clock
to misc peripherals, specifically the SDHCI/eMMC controller.
Link: https://lore.kernel.org/r/20200615133242.24911-10-lars.povlsen@microchip.com
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
If a stage-2 page-table contains an executable, read-only mapping at the
pte level (e.g. due to dirty logging being enabled), a subsequent write
fault to the same page which tries to install a larger block mapping
(e.g. due to dirty logging having been disabled) will erroneously inherit
the exec permission and consequently skip I-cache invalidation for the
rest of the block.
Ensure that exec permission is only inherited by write faults when the
new mapping is of the same size as the existing one. A subsequent
instruction abort will result in I-cache invalidation for the entire
block mapping.
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Quentin Perret <qperret@google.com>
Reviewed-by: Quentin Perret <qperret@google.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200723101714.15873-1-will@kernel.org
So far, vcpu_has_ptrauth() is implemented in terms of system_supports_*_auth()
calls, which are declared "inline". In some specific conditions (clang
and SCS), the "inline" very much turns into an "out of line", which
leads to a fireworks when this predicate is evaluated on a non-VHE
system (right at the beginning of __hyp_handle_ptrauth).
Instead, make sure vcpu_has_ptrauth gets expanded inline by directly
using the cpus_have_final_cap() helpers, which are __always_inline,
generate much better code, and are the only thing that make sense when
running at EL2 on a nVHE system.
Fixes: 29eb5a3c57 ("KVM: arm64: Handle PtrAuth traps early")
Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Reported-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Link: https://lore.kernel.org/r/20200722162231.3689767-1-maz@kernel.org
Add device tree support for the Microsoft Lumia 950 smartphone.
It is based on msm8992 and supports booting Linux via a custom
EDK2 port.
Currently it supports:
* Screen console via EFIFB
* Booting via EFI_STUB
* SDHCI
* I2C
* PSCI core bringup
Please note that there is an implementation of EL2 startup
on this board, but it requires the user to resign from
PSCI and use spin-table instead. This revision sticks with
PSCI.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-14-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit adds support for the Xiaomi Libra (Mi 4C)
smartphone. It's based on the Qualcomm msm8992 SoC.
It currently supports:
* Screen console from bootloader
* SDHCI
* Regulator configuration
* Serial console
* I2C
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-13-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This SoC's firmware does not fully support the PSCI
spec, but it's good enough to bring the cores up.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-11-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add support for I2C to enable support for peripherals
such as touchscreens or sensors. Also add BLSP_UART2 interface.
Please note that the naming scheme follows downstream and as
abominable as it is, that's what we get.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-9-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This pinout is common for every 8992-based device and
should therefore reside in the SoC device tree.
Also convert addresses into phandles.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-5-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add the property required for the bootloader to select
the correct device tree blob. It has been removed from
the SoC device tree as it should be set on a per-device
basis.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-4-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit ensures the correct IRQ type is set
and disables the device by default.
The mmc-hs400-1_8v property is also moved to
Bullhead as it might not be present on all boards.
The node has been renamed to sdhci@ instead of mmc@
and the phandle was changed to sdhc_1 to comply with
the newer DTS style.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-3-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Following changes have been made:
- remove name, compatible and msm-id
- wrap clocks in clocks{}
- order nodes by name and by address
- clock_gcc -> gcc
- msmgpio -> tlmm
- retire msm8992-pins.dtsi
- add some of the missing pins
- make comments C-style
- make apcs a mailbox
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-2-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add device tree support for the Sony Xperia Z5 smartphone.
It's based on Sony Kitakami platform (msm8994) and hence
a Kitakami-common DTSI has been created so as to reduce
clutter when remaining devices are added.
The board currently supports
* Serial
* SDHCI
* I2C
* Regulator configuration
* pstore log dump
* GPIO keys
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200624150107.76234-9-konradybcio@gmail.com
[bjorn: Changed vendor identifier in board compatible from somc to sony]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This was the only device using that dtsi, so no point
keeping it separate AND with a confusing name (bullhead
is based on msm8992 and the file contains regulator
values for that specific board).
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200624150107.76234-8-konradybcio@gmail.com
[bjorn: Squashed with change that remove regulators from msm8992.dtsi]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add opp-peak-kBps bindings to the GPU opp table, listing the peak
GPU -> DDR bandwidth requirement for each opp level. This will be
used to scale the DDR bandwidth along with the GPU frequency dynamically.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/1594992579-20662-7-git-send-email-akhilpo@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch adds the interconnects property to the GPU node. This enables
the GPU->DDR path bandwidth voting.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/1594992579-20662-6-git-send-email-akhilpo@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch adds the interconnects property for the gpu node and the
opp-peak-kBps property to the opps of the gpu opp table. This should
help enable DDR bandwidth scaling dynamically and proportionally to the
GPU frequency.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/1594992579-20662-5-git-send-email-akhilpo@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add "qcom,replicator-loses-context" property to the replicator
in Always-on domain in SC7180 SoC to enable coresight replicator
driver to handle this variation of replicator designs.
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/5072d94849cfaee46748d26ac997212fb2d783c2.1591708204.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add "qcom,skip-power-up" property to skip powering up ETM
on SC7180 SoC to workaround a hardware errata where CPU
watchdog counter is stopped when ETM power up bit is set
(i.e., when TRCPDCR.PU = 1).
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/8c5ff297d8c89d9d451352f189baf26c8938842a.1591708204.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Similar to other G12B devices using the W400 dtsi, I see reports of mmc0
tuning errors on VIM3 after a few hours uptime:
[12483.917391] mmc0: tuning execution failed: -5
[30535.551221] mmc0: tuning execution failed: -5
[35359.953671] mmc0: tuning execution failed: -5
[35561.875332] mmc0: tuning execution failed: -5
[61733.348709] mmc0: tuning execution failed: -5
I do not see the same on VIM3L, so remove sd-uhs-sdr50 from the common dtsi
to silence the error, then (re)add it to the VIM3L dts.
Fixes: 4f26cc1c96 ("arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi")
Fixes: 700ab8d839 ("arm64: dts: khadas-vim3: add support for the SM1 based VIM3L")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200721015950.11816-1-christianshewitt@gmail.com
The UDP reuseport conflict was a little bit tricky.
The net-next code, via bpf-next, extracted the reuseport handling
into a helper so that the BPF sk lookup code could invoke it.
At the same time, the logic for reuseport handling of unconnected
sockets changed via commit efc6b6f6c3
which changed the logic to carry on the reuseport result into the
rest of the lookup loop if we do not return immediately.
This requires moving the reuseport_has_conns() logic into the callers.
While we are here, get rid of inline directives as they do not belong
in foo.c files.
The other changes were cases of more straightforward overlapping
modifications.
Signed-off-by: David S. Miller <davem@davemloft.net>
- Fix the layering violation in the use of the EFI runtime services
availability mask in users of the 'efivars' abstraction
- Revert build fix for GCC v4.8 which is no longer supported
- Clean up some x86 EFI stub details, some of which are borderline bugs
that copy around garbage into padding fields - let's fix these
out of caution.
- Fix build issues while working on RISC-V support
- Avoid --whole-archive when linking the stub on arm64
Signed-off-by: Ingo Molnar <mingo@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAl8cCIkRHG1pbmdvQGtl
cm5lbC5vcmcACgkQEnMQ0APhK1hGsxAAsPwL5ghYykViUQId0OjNmI7eRgISKRso
3n3BaFmgYMp9eq1gndzPp7A5Ty0NPsr8FiwuZ7setk9YoLuTUT1MHVtAzd6xkxlR
838CwTDvW5HvB69uxPQDHA/1mcH1smH4Iew/J7QXP+o6Zrg+BWOjKNtTiKFwawNC
m4Tkdvvq52wzykqbeuRhXxLetKFOH//R1V0s4M6nNySuY6gQGJQ2LPyaiMN6eq1V
LE8+wGcNlIRUOeC8RkEA7CE9g92jkGZ07uJDA09OP0J5WBNWLcxMJM2mBZ1Ho6uc
sNNOeTy76sjuXQvUBWCnjBr3/qqXnVGSuIq8NS1hS4L7HagdQ/peqFJRzvWBHT90
b9wUZv09ioFm9lb6/P6NL16sn/WPknCD7umxpfp5HKrlL2p7puvsvDXtuWgyhhPG
M+X9ZX1iaA54cA9bU6cXFzrNMw/DnYjHFsECF915EXjItNZToGs0rd1lf7ArgH2P
+3HgvLods73ufObKH2pUfY7EU2Ly1oJsNpK3RmpoOUzehW+++S80KdytkaAB10kT
dKp9LlTj6gC+lnC45J9NtpHlCodz/Rc0lBHQpxIqlk/p9grUuH4zn714Ii/FfNQg
i29GX9cCdgv+4KzmJCNTqyZvGFZ5m3K8f41x7iD+/ygqPLsP9PfV5RGRGau+FfL8
ezInhKdITqM=
=n3nF
-----END PGP SIGNATURE-----
Merge tag 'efi-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into master
Pull EFI fixes from Ingo Molnar:
"Various EFI fixes:
- Fix the layering violation in the use of the EFI runtime services
availability mask in users of the 'efivars' abstraction
- Revert build fix for GCC v4.8 which is no longer supported
- Clean up some x86 EFI stub details, some of which are borderline
bugs that copy around garbage into padding fields - let's fix these
out of caution.
- Fix build issues while working on RISC-V support
- Avoid --whole-archive when linking the stub on arm64"
* tag 'efi-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
efi: Revert "efi/x86: Fix build with gcc 4"
efi/efivars: Expose RT service availability via efivars abstraction
efi/libstub: Move the function prototypes to header file
efi/libstub: Fix gcc error around __umoddi3 for 32 bit builds
efi/libstub/arm64: link stub lib.a conditionally
efi/x86: Only copy upto the end of setup_header
efi/x86: Remove unused variables
Pull networking fixes from David Miller:
1) Fix RCU locaking in iwlwifi, from Johannes Berg.
2) mt76 can access uninitialized NAPI struct, from Felix Fietkau.
3) Fix race in updating pause settings in bnxt_en, from Vasundhara
Volam.
4) Propagate error return properly during unbind failures in ax88172a,
from George Kennedy.
5) Fix memleak in adf7242_probe, from Liu Jian.
6) smc_drv_probe() can leak, from Wang Hai.
7) Don't muck with the carrier state if register_netdevice() fails in
the bonding driver, from Taehee Yoo.
8) Fix memleak in dpaa_eth_probe, from Liu Jian.
9) Need to check skb_put_padto() return value in hsr_fill_tag(), from
Murali Karicheri.
10) Don't lose ionic RSS hash settings across FW update, from Shannon
Nelson.
11) Fix clobbered SKB control block in act_ct, from Wen Xu.
12) Missing newlink in "tx_timeout" sysfs output, from Xiongfeng Wang.
13) IS_UDPLITE cleanup a long time ago, incorrectly handled
transformations involving UDPLITE_RECV_CC. From Miaohe Lin.
14) Unbalanced locking in netdevsim, from Taehee Yoo.
15) Suppress false-positive error messages in qed driver, from Alexander
Lobakin.
16) Out of bounds read in ax25_connect and ax25_sendmsg, from Peilin Ye.
17) Missing SKB release in cxgb4's uld_send(), from Navid Emamdoost.
18) Uninitialized value in geneve_changelink(), from Cong Wang.
19) Fix deadlock in xen-netfront, from Andera Righi.
19) flush_backlog() frees skbs with IRQs disabled, so should use
dev_kfree_skb_irq() instead of kfree_skb(). From Subash Abhinov
Kasiviswanathan.
* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (111 commits)
drivers/net/wan: lapb: Corrected the usage of skb_cow
dev: Defer free of skbs in flush_backlog
qrtr: orphan socket in qrtr_release()
xen-netfront: fix potential deadlock in xennet_remove()
flow_offload: Move rhashtable inclusion to the source file
geneve: fix an uninitialized value in geneve_changelink()
bonding: check return value of register_netdevice() in bond_newlink()
tcp: allow at most one TLP probe per flight
AX.25: Prevent integer overflows in connect and sendmsg
cxgb4: add missing release on skb in uld_send()
net: atlantic: fix PTP on AQC10X
AX.25: Prevent out-of-bounds read in ax25_sendmsg()
sctp: shrink stream outq when fails to do addstream reconf
sctp: shrink stream outq only when new outcnt < old outcnt
AX.25: Fix out-of-bounds read in ax25_connect()
enetc: Remove the mdio bus on PF probe bailout
net: ethernet: ti: add NETIF_F_HW_TC hw feature flag for taprio offload
net: ethernet: ave: Fix error returns in ave_init
drivers/net/wan/x25_asy: Fix to make it work
ipvs: fix the connection sync failed in some cases
...
- Fix compat vDSO build flags for recent versions of clang
-----BEGIN PGP SIGNATURE-----
iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAl8avzQQHHdpbGxAa2Vy
bmVsLm9yZwAKCRC3rHDchMFjNKe4CADFdjUbKJSPMfn2EvYHJGYCS7Q6yUag6uZx
eecq/tfCulz4/vKrWkqiAgAUvFiSxAVhyHnqZhbp0wVo3J7PrNtK6xsPj+8yEBvh
o5z1F0ovhBshBpk4P2jBTDCaq/LsA5p8Uv3/OpgF192P61lplb+1XTmAa5kxN4an
d5UW5TMTYq0Apd5GYUAgWYEnLtwhncSj2DYuIIt3Dq3f3wpCB0mK4XfjnYPVrbgD
lY5X6795qeCffkoGf2WidZ7R9KQm/5E8hpK7ongQpbX1HjbWiobdDzFyzbT4WT7p
EvhOPpbboN5B/mAgeLTO6UKBIC52BgDMWI/dMRP7g4VIPL8OcBzk
=7lBG
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux into master
Pull arm64 fix from Will Deacon:
"Fix compat vDSO build flags for recent versions of clang to tell it
where to find the assembler"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: vdso32: Fix '--prefix=' value for newer versions of clang
- new board: WeTek Core2
- audio playback support on more boards
- add GPU DVFS
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl8bNuMACgkQWTcYmtP7
xmWmKw/+PAiU3PsHH8MPyN2hRQwK3MFG786Tw4A8lRhVSKZAR7u0vPRxTD1OTyt7
ikSH3RO1e1pYzcOF32frwI5nQ3lokcvaQNTY8UdqVmFdise8P8uLm9a9cXWx2YFa
JiznocTKlvPkQLoW6c1VTeQiUDCIIf448LhNg4yw6vSfdWvY0QubP+HawcSwyMOh
0cfXC4v3lqsx0u1OBCOnGWMN0LofPtpzYHv5WTRC1k5Zsc1O4W54mOwaR8qkE2Wt
gNFQbojaOwJgWY29loHFNoAUdgONIFHoHj8nta3ewaWn0zWvizDgpVDtP9JwxTE6
NhT6qa04K6BpbRpHjrXkLoLLT9uKZuSpPUhpwTKXuzuaGtUUrSN5owFpX/+R8wVf
Jl911zDfgkS6Fjt1QRxZcxYQKWqefGCd+fPFJrkGIvMATRoLmUE8b0HTIgbJTCsG
w3AJfZexwVvlnsXkv1jIsMSkgs+Tv5zRG8g7unqs/mYB8mVgeHiF/t1EIuxZri+x
vF8MwLbFg01pdDyUJV0MxL00bc/oKhRdaYMgtSPR1THWy0H+9LieO35dpFM9f5no
nidDvhgw3j9PJqEpZj5E69oisqSjESM7YK1xxGwPG9p9Faq/xNR0/RrAyXHzt44j
gvzY3aa44XwVWh3wFdCYD1QiKtpuvfTQp04Uoz+wf6eWt9a2nHU=
=ibOR
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic: updates for v5.9 (round 2)
- new board: WeTek Core2
- audio playback support on more boards
- add GPU DVFS
* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS
arm64: dts: meson: add support for the WeTek Core 2
dt-bindings: arm: amlogic: add support for the WeTek Core 2
arm64: dts: meson: add audio playback to khadas-vim3l
arm64: dts: meson: add audio playback to odroid-c4
arm64: dts: meson: update spifc node name on Khadas VIM3/VIM3L
ARM: dts: meson: Align L2 cache-controller nodename with dtschema
arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
arm64: dts: meson: add missing gxl rng clock
soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's
Link: https://lore.kernel.org/r/7h8sf8671u.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Forbid splitting VVAR VMA resulting in a stricter ABI and reducing the
amount of corner-cases to consider while working further on VDSO time
namespace support.
As the offset from timens to VVAR page is computed compile-time, the pages
in VVAR should stay together and not being partically mremap()'ed.
Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Link: https://lore.kernel.org/r/20200624083321.144975-6-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
If a task belongs to a time namespace then the VVAR page which contains
the system wide VDSO data is replaced with a namespace specific page
which has the same layout as the VVAR page.
Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Link: https://lore.kernel.org/r/20200624083321.144975-5-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Add SMMU support for the Marvell AP806 based SoCs (Armada 70xx and
Armada 80xx)
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXxqifwAKCRALBhiOFHI7
1XNMAJ9hlYGp/3IgnOsGzobwdPcCzEPwAQCeO1PB6THGuxV/SMgRCgAnXTCQV3E=
=xYe1
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt64 for 5.9 (part 1)
Add SMMU support for the Marvell AP806 based SoCs (Armada 70xx and
Armada 80xx)
* tag 'mvebu-dt64-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: add SMMU support
- Add platforms chipid nodes for am65x and j721e
- Update latest data sheet values for MMC on am65x
- Add serdes and usb3 support for j721e
- Add analog audio support for j721e
- Add SD card support for am65x
- Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e
- HTTP links replaced with HTTPS ones
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEEtQ6szHmfiBT7fujkyvq9MXlQGhEFAl8aj4cQHHQta3Jpc3Rv
QHRpLmNvbQAKCRDK+r0xeVAaEfxHD/4kE90nx+EyiSGQ5ZCNfoXs/0JB95KAGGcv
23PGvjYBfD/GFGvbL+4F7GTptqEJrkJXMcfCIR2Nv5fjhA+OjjPMzj73octytasN
iRc+ESXLgD07bLdTWEvGvMqBaslfLOajs2PSu7LOMGK6NihRiqCGR5urk6e8h0Jt
gY4gb1EFN01VIYB7n3xy7CgpHx/G6g0VJ1TjpEZVyM5G3K50/qrKzJmxX9MIiVBm
o9E85dveFe3yxvI6BepwQpfrrVg5j6xlJCHrQ0xepPiKAjCzlTaxOdTm2omGemES
h7DQ2CAD23SJ+SnF4bCltoNw/1GOfw1CoslB9X4FdvSBknp61VjrfeGp9PKZHxFI
EvEV1tmpAFAhxSlY4zcyhmpMcBiKzGojGExK0COt5hHm7ssbTIaDKNTTJByzI1cJ
FkHr609ktYmSyfg9JVejiCPa9D/8etYqkgy/9edM4iYLss4TkPGHHD+C0iqMQaCA
mcOsquOaTnbiATQuqAaoLzZbUKSO4R57DgXAO7+XzOgaQutBRJ5VMgREM8apNYUa
baE779XQfCMiOpgEpEpwQMVVgt6S/PUXis6yZy2BpP3npbKVKI53f0wpZc0FvM8e
9J5cpWBLX1qK0lO8KinGRfW09+EcSlbWe2Byh1EKfqogRsfJlsPYyAuEg3BwDr1o
XMQS/p1aPQ==
=0bPs
-----END PGP SIGNATURE-----
Merge tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt
Texas Instruments K3 SoC DT updates for v5.9
- Add platforms chipid nodes for am65x and j721e
- Update latest data sheet values for MMC on am65x
- Add serdes and usb3 support for j721e
- Add analog audio support for j721e
- Add SD card support for am65x
- Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e
- HTTP links replaced with HTTPS ones
* tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line
arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0
arm64: dts: ti: k3-j721e-main.dtsi: Add USB to SERDES MUX
arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux
arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes
dt-bindings: mfd: ti,j721e-system-controller.yaml: Add J721e system controller
arm64: dts: ti: k3-am65/j721e-main: rename gic-its node to msi-controller
arm64: dts: ti: k3-j721e-main: rename smmu node to iommu
arm64: dts: ti: k3-*: Replace HTTP links with HTTPS ones
arm64: dts: ti: k3-am654-base-board: Add support for SD card
arm64: dts: ti: k3-am65-main: Add support for sdhci1
arm64: dts: ti: j721e-common-proc-board: Analog audio support
arm64: dts: ti: k3-j721e-common-proc-board: Remove duplicated main_i2c1_exp4_pins_default
arm64: dts: ti: k3-am654-main: Update otap-del-sel values
arm64: dts: ti: k3-j721e-mcu-wakeup: add k3 platforms chipid module node
arm64: dts: ti: k3-am65-wakeup: add k3 platforms chipid module node
Link: https://lore.kernel.org/r/3b3b9214-769d-ba1b-db5e-44414a8c5756@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds the initial support for the Amazon's Annapurna Labs
Alpine v3 Soc and Evaluation Platform (EVP).
Link: https://lore.kernel.org/r/20200724132654.16549-7-hhhawa@amazon.com
Signed-off-by: Ronen Krupnik <ronenk@amazon.com>
Signed-off-by: Talel Shenhar <talel@amazon.com>
Signed-off-by: Hanna Hawa <hhhawa@amazon.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As preparation to add device tree binding for Amazon's Annapurna Labs
Alpine v3 support. Rename al device tree folder to be amazon.
Link: https://lore.kernel.org/r/20200724132654.16549-3-hhhawa@amazon.com
Signed-off-by: Hanna Hawa <hhhawa@amazon.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allocate the time namespace page among VVAR pages. Provide
__arch_get_timens_vdso_data() helper for VDSO code to get the
code-relative position of VVARs on that special page.
If a task belongs to a time namespace then the VVAR page which contains
the system wide VDSO data is replaced with a namespace specific page
which has the same layout as the VVAR page. That page has vdso_data->seq
set to 1 to enforce the slow path and vdso_data->clock_mode set to
VCLOCK_TIMENS to enforce the time namespace handling path.
The extra check in the case that vdso_data->seq is odd, e.g. a concurrent
update of the VDSO data is in progress, is not really affecting regular
tasks which are not part of a time namespace as the task is spin waiting
for the update to finish and vdso_data->seq to become even again.
If a time namespace task hits that code path, it invokes the corresponding
time getter function which retrieves the real VVAR page, reads host time
and then adds the offset for the requested clock which is stored in the
special VVAR page.
The time-namespace page isn't allocated on !CONFIG_TIME_NAMESPACE, but
vma is the same size, which simplifies criu/vdso migration between
different kernel configs.
Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200624083321.144975-4-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The order of vvar pages depends on whether a task belongs to the root
time namespace or not. In the root time namespace, a task doesn't have a
per-namespace page. In a non-root namespace, the VVAR page which contains
the system-wide VDSO data is replaced with a namespace specific page
that contains clock offsets.
Whenever a task changes its namespace, the VVAR page tables are cleared
and then they will be re-faulted with a corresponding layout.
A task can switch its time namespace only if its ->mm isn't shared with
another task.
Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Reviewed-by: Christian Brauner <christian.brauner@ubuntu.com>
Link: https://lore.kernel.org/r/20200624083321.144975-3-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Currently the vdso has no awareness of time namespaces, which may
apply distinct offsets to processes in different namespaces. To handle
this within the vdso, we'll need to expose a per-namespace data page.
As a preparatory step, this patch separates the vdso data page from
the code pages, and has it faulted in via its own fault callback.
Subsquent patches will extend this to support distinct pages per time
namespace.
The vvar vma has to be installed with the VM_PFNMAP flag to handle
faults via its vma fault callback.
Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Link: https://lore.kernel.org/r/20200624083321.144975-2-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
While MTE is not supported in the upstream kernel yet, add a comment
that HWCAP2_MTE as (1 << 18) is reserved. Glibc makes use of it for the
resolving (ifunc) of the MTE-safe string routines.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
SOM and it's Rock Pi N8 icarnation. This brings some arm64 dts-changes
with it as the underlying Dalang carrier board is shared by both
an arm32 rk3288 SOM and an arm64 rk3399 SOM (Rock Pi N10).
Other than that rk3288 gets its ohci node added that only works
on the fixed rk3288w variant of the soc and some asorted fixes
and improvements for dt-binding-check.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl8YzOAQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgY9aB/0folCAovUA97bILQR/62PspVGR1i/S2GJe
sQqKuWDyBtJNM3IYNVMd/AtcrP+U0ZD4MX6TKbabs+ZuIc4EksXRroMTMm2azme1
rOrQuGSKcdhPobJOHlpbSC/QPWWi5GGGWDnwXY8T68NedeYLP/o8sOmZQtUi80R9
ueP5ZwiviwMrVzRITPb8sB89WEyRqaas2H0fc/4OjGRY/jeTKwCk9sP/JytA6gUB
/GXn+uUk5WcRkekujBi1LVi4BIhm7PMW9kM1AHWAV6+2Yd8uFyG4ut9MB7SmaQt8
QfEoPpLvQicpZCVB3VFOPJ38z4YuOXsqo85u8T3ZkgpLdInoa/J9
=GUhq
-----END PGP SIGNATURE-----
Merge tag 'v5.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Biggest part is the addition of the rk3288 variant of the VMARC
SOM and it's Rock Pi N8 icarnation. This brings some arm64 dts-changes
with it as the underlying Dalang carrier board is shared by both
an arm32 rk3288 SOM and an arm64 rk3399 SOM (Rock Pi N10).
Other than that rk3288 gets its ohci node added that only works
on the fixed rk3288w variant of the soc and some asorted fixes
and improvements for dt-binding-check.
* tag 'v5.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Add PCIe for RockPI N10
ARM: dts: rockchip: Add HDMI out for RockPI N8/N10
ARM: dts: rockchip: Add USB for RockPI N8/N10
ARM: dts: rockchip: Add usb host0 ohci node for rk3288
ARM: dts: rockchip: Fix VBUS on rk3288-vyasa
ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
dt-bindings: arm: rockchip: Add Rock Pi N8 binding
arm64: dts: rk3399pro: vmarc-som: Move common properties into Carrier
arm64: dts: rk3399pro: vmarc-som: Move supply regulators into Carrier
arm64: dts: rk3399pro: vmarc-som: Fix sorting nodes, properties
ARM: dts: rockchip: dalang-carrier: Move i2c nodes into SOM
ARM: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac
ARM: dts: rockchip: Add marvell BT irq config
ARM: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio
Link: https://lore.kernel.org/r/2472314.kD9Egx1jfM@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
first tiny part of the rk3399 camera infrastructure and cleanups + making
dt-binding-check even happier.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl8YxwgQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgdXnB/0eoNoz+ZmX7L3gvPVejBiBBwSUVC21OW+A
c3TtumCUGbHk3lXhb91j+s+qN1sMjOn6tdEAcCVO7gm/FcASXwKcqyKa+/dhLzt5
3/FaXye6THGV/QNk9tZr/hd2XQsg5hwA9Rl3DYJzB4WVWmBiOV3JuwmRlvLqRh7m
AztbZiRvy9f3awWF1XVEW7MYDwVIPmeiGQh6voBYBjTfJyYKCKZDZPcPi4FmRP94
IIlG1NaH3jP8wZVD7yOhxtemY/IPsjFSoSinC7ZksAnRLEUax/AfMsBJQovEfL9M
pkkkI3dxDZ+TokWcGtIaxZSTguV7X2bf5Fxv9UfWCfZ1pvtPB38i
=47gX
-----END PGP SIGNATURE-----
Merge tag 'v5.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Fuel gauge for Pinebook Pro, the newly added periph-burst flag for pl330s,
first tiny part of the rk3399 camera infrastructure and cleanups + making
dt-binding-check even happier.
* tag 'v5.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac
arm64: dts: rockchip: remove bus-width from mmc nodes in px30 dts files
arm64: dts: rockchip: add rx0 mipi-phy for rk3399
arm64: dts: rockchip: rename and label gpio-led subnodes part 2
arm64: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio
arm64: dts: rockchip: fix rk3399-puma gmac reset gpio
arm64: dts: rockchip: fix rk3399-puma vcc5v0-host gpio
arm64: dts: rockchip: fix rk3368-lion gmac reset gpio
arm64: dts: rockchip: set rockpro64 usbc dr_mode as host
arm64: dts: rockchip: add fuel gauge to Pinebook Pro dts
Link: https://lore.kernel.org/r/2221560.KYr1Tee2JR@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Factor the 12 copies of the SW PAN entry and exit code into callable
subroutines, and use alternatives patching to either emit a 'bl'
instruction to call them, or a NOP if h/w PAN is found to be available
at runtime.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20200721083315.4816-1-ardb@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Newer versions of clang only look for $(COMPAT_GCC_TOOLCHAIN_DIR)as [1],
rather than $(COMPAT_GCC_TOOLCHAIN_DIR)$(CROSS_COMPILE_COMPAT)as,
resulting in the following build error:
$ make -skj"$(nproc)" ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- \
CROSS_COMPILE_COMPAT=arm-linux-gnueabi- LLVM=1 O=out/aarch64 distclean \
defconfig arch/arm64/kernel/vdso32/
...
/home/nathan/cbl/toolchains/llvm-binutils/bin/as: unrecognized option '-EL'
clang-12: error: assembler command failed with exit code 1 (use -v to see invocation)
make[3]: *** [arch/arm64/kernel/vdso32/Makefile:181: arch/arm64/kernel/vdso32/note.o] Error 1
...
Adding the value of CROSS_COMPILE_COMPAT (adding notdir to account for a
full path for CROSS_COMPILE_COMPAT) fixes this issue, which matches the
solution done for the main Makefile [2].
[1]: 3452a0d8c1
[2]: https://lore.kernel.org/lkml/20200721173125.1273884-1-maskray@google.com/
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Cc: stable@vger.kernel.org
Link: https://github.com/ClangBuiltLinux/linux/issues/1099
Link: https://lore.kernel.org/r/20200723041509.400450-1-natechancellor@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
handler, so that system can be waked up when MU IRQ arrives.
- Move i.MX SCU soc driver into imx firmware folder to get it
initialized from i.MX SCU firmware driver.
- Clean up soc-imx-scu driver a bit by using devm_kasprintf().
- Correct postfix setting for cm40 power domain in scu-pd driver.
- Add resource management support for IMX_SCU firmware driver.
- Add more cm4 resources to i.MX SCU power domain driver.
- Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
in AARCH32 mode Linux on AARCH64 hardware.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl8VPiUUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5L9wf/VY0Q2oZ+gaJRNhSfVSf7O7QpscHV
mtQZPHg81jv3D2NkOpycJ1vaJEo118Ho6vb5IfeheChyZ2eWEJKkaPpVuhyKjPhK
B+nUmFnsTm8MTL+GKA1W7g6Gg+lJN3wT/mOITNmGMW0NID4/rse/XeM18+28nNb/
2svVyc1+4uTM5m+4i+scBCdnxgBK2H71/DQYLfDvNtZesWzas1PNN1nJh10D/PMM
X6d7AZ92c//pf5eR3wpm/JKZ+hubefBNWkrpw50pNlAASbgOogXWL1GU9q3r/VAV
9dS0dW9mIlpqlONEO+2zv9v1/RnoUypkCe/FFTUsA1bJ7ZGqhxWmrYwyfg==
=7Pd6
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers change for 5.9:
- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
handler, so that system can be waked up when MU IRQ arrives.
- Move i.MX SCU soc driver into imx firmware folder to get it
initialized from i.MX SCU firmware driver.
- Clean up soc-imx-scu driver a bit by using devm_kasprintf().
- Correct postfix setting for cm40 power domain in scu-pd driver.
- Add resource management support for IMX_SCU firmware driver.
- Add more cm4 resources to i.MX SCU power domain driver.
- Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
in AARCH32 mode Linux on AARCH64 hardware.
* tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: select ARM_GIC_V3 for i.MX8M
firmware: imx: Move i.MX SCU soc driver into imx firmware folder
firmware: imx: scu-pd: add more cm4 resources
firmware: imx: add resource management api
firmware: imx: scu-pd: fix cm40 power domain
soc: imx: scu: use devm_kasprintf
firmware: imx: make sure MU irq can wake up system from suspend mode
Link: https://lore.kernel.org/r/20200720085536.24138-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This add pinctrl support to the Microchip Sparx5 SoC.
Link: https://lore.kernel.org/r/20200615133242.24911-5-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds the basic DT structure for the Microchip Sparx5 SoC, and the
reference boards, pcb125, pcb134 and pcb135. The two latter have a
NAND vs a eMMC centric variant (as a mount option).
Link: https://lore.kernel.org/r/20200615133242.24911-4-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds support for the Microchip Sparx5 ARMv8-based SoC family of
TSN-capable gigabit switches.
Link: https://lore.kernel.org/r/20200615133242.24911-3-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Enable UFS (Universal Flash Storage) on Exynos7 Espresso board.
2. Fix silent hang after boot off Exynos7 Espresso board.
3. Minor DTS fixes and adjustments with dtschema.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl8XLRMQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+74EACDnknpO6m4o9nIqjaUaUW/JU1nk0/IVDBe
ShFz3eBVd0l203ObwTa2MCBLKY18VBSeKzOF/9UTmkC/lJpz7chV9THyY7B18Som
rtcI4QLNiZnBGmyuiHL28NR7Fzwig3Kj1rI+3PZtKx2SFS5H3eOEdsfdl/vTYhK3
B48Uy/0OO/e1Xq2V3Qzv/FNniLuYYswoaeUObvdFsXochBjT8ytLBZhrAGxKGEy4
d64DJKd7qC8D34RHJbRNaRdurk+QjKj7t/xyWjnv2uJk+QKU31fEOKqkxvU0hfBG
DxGKaItLS+iIrhO0vwBtvVbomUroTRPcsDhINuv8IYi7XfDtfAHqaeDKlxkdzwDr
ikx9BAVSr7XsZFkhTDxe/MosfRqZaphwoG+jusiTRHz0DgZGFEy8fiiBh3ru8oNV
br9QeJGXuyBL3Mj2M3PPjhCJ0tqEWOZDi0Ec2FPy1wlUsjHVaIiZGjMs93TVpOxl
c6+8XKyv2EnQQZeB76Lw8jIpgpusDHWjMHENW+kLAB1OFp7lSYsHOnUofbyFhwUb
iCKddqayawF57l5Ez78CjyW6DCBsChod/TE0TpPdVXf+4zq8EzQXDE/k4FNm0M/b
sqivk2lEh8u/2dun5Zo1E84oyytT86ffiIeML0U56cE3CeqQ+q8K9xMTHJN6xYlF
59fjM0+hHw==
=1MC3
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.9
1. Enable UFS (Universal Flash Storage) on Exynos7 Espresso board.
2. Fix silent hang after boot off Exynos7 Espresso board.
3. Minor DTS fixes and adjustments with dtschema.
* tag 'samsung-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add unit address to soc node and move thermal zones on Exynos7
arm64: dts: exynos: Add unit address to soc node on Exynos5433
arm64: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
arm64: dts: exynos: Keep LDO12 always-on on Espresso
arm64: dts: exynos: Fix silent hang after boot on Espresso
arm64: dts: exynos: Remove generic arm,armv8-pmuv3 compatible
arm64: dts: exynos: Describe PWM interrupts on Exynos7
arm64: dts: exynos: Add UFS node to Exynos7
Link: https://lore.kernel.org/r/20200721180900.13844-3-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
