104044 Commits

Author SHA1 Message Date
Tobias Klauser
ac8ab8dd95 nios2: Use IS_ENABLED instead of #ifdefs to check config symbols
Make the checking for div/mul/mulx instruction config symbols easier to
read by using IS_ENABLED instead of #ifdefs.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Acked-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:07 +08:00
Ley Foon Tan
2fc8483fdc nios2: Build infrastructure
This patch adds Makefile and Kconfig files required for building a
nios2 kernel.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:06 +08:00
Ley Foon Tan
106174d0d8 nios2: ptrace support
Add ptrace support for nios2.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:04 +08:00
Ley Foon Tan
42381bf1f2 nios2: Module support
This patch adds support for loadable modules.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:04 +08:00
Ley Foon Tan
b31ebd8055 nios2: Nios2 registers
This file contains constants for the instruction macros, cpu registers,
fields and bits.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:03 +08:00
Ley Foon Tan
97da0d62d4 nios2: Miscellaneous header files
This patch introduces a few nios2-specific header files.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:03 +08:00
Ley Foon Tan
2612b87959 nios2: Cpuinfo handling
Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:02 +08:00
Ley Foon Tan
4182de9e63 nios2: Time keeping
Add time keeping code for nios2.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
2014-12-08 12:56:01 +08:00
Ley Foon Tan
95acd4c7b6 nios2: Device tree support
Add device tree support to arch/nios2.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:01 +08:00
Ley Foon Tan
eea9507a69 nios2: Library functions
Add optimised library functions for nios2.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:56:00 +08:00
Ley Foon Tan
b53e906d25 nios2: Signal handling support
This patch adds support for signal handling.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:59 +08:00
Ley Foon Tan
1000197d80 nios2: System calls handling
This patch adds support for system calls from userspaces. It uses the
asm-generic/unistd.h definitions with architecture spcific syscall.
The sys_call_table is just an array defined in a C file and it contains
pointers to the syscall functions.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:58 +08:00
Ley Foon Tan
19f4c6b5af nios2: ELF definitions
This patch adds definitions for the ELF format

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:58 +08:00
Ley Foon Tan
e23c621f98 nios2: DMA mapping API
This patch adds support for the DMA mapping API.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:56 +08:00
Ley Foon Tan
f27ffc751c nios2: Interrupt handling
This patch adds the support for IRQ handling.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
2014-12-08 12:55:55 +08:00
Ley Foon Tan
c983e92fcb nios2: TLB handling
This patch adds the TLB maintenance functions.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:54 +08:00
Ley Foon Tan
93c91cb228 nios2: Cache handling
This patch adds functionality required for cache maintenance.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:54 +08:00
Ley Foon Tan
71995e4d00 nios2: Process management
This patch adds support for thread creation and context switching.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:53 +08:00
Ley Foon Tan
cbd15b3fad nios2: Page table management
This patch adds support for page table management.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:53 +08:00
Ley Foon Tan
862674d424 nios2: MMU Fault handling
This patch adds support for the handling of the MMU faults (exception
entry code introduced by a previous patch, kernel/entry.S).

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:52 +08:00
Ley Foon Tan
6b8baec4d6 nios2: I/O Mapping
This patch adds several definitions for I/O accessors and ioremap().

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:52 +08:00
Ley Foon Tan
5ccc6af5e8 nios2: Memory management
This patch contains the initialisation of the memory blocks, MMU
attributes and the memory map.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:51 +08:00
Ley Foon Tan
771a0163c0 nios2: Traps exception handling
This patch contains traps exception handling.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:50 +08:00
Ley Foon Tan
82ed08dd1b nios2: Exception handling
This patch contains the exception entry code (kernel/entry.S) and
misaligned exception.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:50 +08:00
Ley Foon Tan
27d22413e6 nios2: Kernel booting and initialization
This patch adds the kernel booting and the initial setup code.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:49 +08:00
Ley Foon Tan
39b505cb79 nios2: Assembly macros and definitions
This patch add assembly macros and definitions used in
the .S files across arch/nios2/ and together with asm-offsets.c.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
2014-12-08 12:55:49 +08:00
Paul Mackerras
56548fc0e8 powerpc/powernv: Return to cpu offline loop when finished in KVM guest
When a secondary hardware thread has finished running a KVM guest, we
currently put that thread into nap mode using a nap instruction in
the KVM code.  This changes the code so that instead of doing a nap
instruction directly, we instead cause the call to power7_nap() that
put the thread into nap mode to return.  The reason for doing this is
to avoid having the KVM code having to know what low-power mode to
put the thread into.

In the case of a secondary thread used to run a KVM guest, the thread
will be offline from the point of view of the host kernel, and the
relevant power7_nap() call is the one in pnv_smp_cpu_disable().
In this case we don't want to clear pending IPIs in the offline loop
in that function, since that might cause us to miss the wakeup for
the next time the thread needs to run a guest.  To tell whether or
not to clear the interrupt, we use the SRR1 value returned from
power7_nap(), and check if it indicates an external interrupt.  We
arrange that the return from power7_nap() when we have finished running
a guest returns 0, so pending interrupts don't get flushed in that
case.

Note that it is important a secondary thread that has finished
executing in the guest, or that didn't have a guest to run, should
not return to power7_nap's caller while the kvm_hstate.hwthread_req
flag in the PACA is non-zero, because the return from power7_nap
will reenable the MMU, and the MMU might still be in guest context.
In this situation we spin at low priority in real mode waiting for
hwthread_req to become zero.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-12-08 13:16:31 +11:00
Borislav Petkov
fbae4ba8c4 x86, microcode: Reload microcode on resume
Normally, we do reapply microcode on resume. However, in the cases where
that microcode comes from the early loader and the late loader hasn't
been utilized yet, there's no easy way for us to go and apply the patch
applied during boot by the early loader.

Thus, reuse the patch stashed by the early loader for the BSP.

Signed-off-by: Borislav Petkov <bp@suse.de>
2014-12-06 13:03:03 +01:00
Boris Ostrovsky
a18a0f6850 x86, microcode: Don't initialize microcode code on paravirt
Paravirtual guests are not expected to load microcode into processors
and therefore it is not necessary to initialize microcode loading
logic.

In fact, under certain circumstances initializing this logic may cause
the guest to crash. Specifically, 32-bit kernels use __pa_nodebug()
macro which does not work in Xen (the code path that leads to this macro
happens during resume when we call mc_bp_resume()->load_ucode_ap()
->check_loader_disabled_ap())

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Link: http://lkml.kernel.org/r/1417469264-31470-1-git-send-email-boris.ostrovsky@oracle.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2014-12-06 12:59:03 +01:00
Borislav Petkov
47768626c6 x86, microcode, intel: Drop unused parameter
apply_microcode_early() doesn't use mc_saved_data, kill it.

Signed-off-by: Borislav Petkov <bp@suse.de>
2014-12-06 12:58:56 +01:00
Alexei Starovoitov
89aa075832 net: sock: allow eBPF programs to be attached to sockets
introduce new setsockopt() command:

setsockopt(sock, SOL_SOCKET, SO_ATTACH_BPF, &prog_fd, sizeof(prog_fd))

where prog_fd was received from syscall bpf(BPF_PROG_LOAD, attr, ...)
and attr->prog_type == BPF_PROG_TYPE_SOCKET_FILTER

setsockopt() calls bpf_prog_get() which increments refcnt of the program,
so it doesn't get unloaded while socket is using the program.

The same eBPF program can be attached to multiple sockets.

User task exit automatically closes socket which calls sk_filter_uncharge()
which decrements refcnt of eBPF program

Signed-off-by: Alexei Starovoitov <ast@plumgrid.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-05 21:47:32 -08:00
Alexei Starovoitov
769e0de647 bpf: x86: fix epilogue generation for eBPF programs
classic BPF has a restriction that last insn is always BPF_RET.
eBPF doesn't have BPF_RET instruction and this restriction.
It has BPF_EXIT insn which can appear anywhere in the program
one or more times and it doesn't have to be last insn.
Fix eBPF JIT to emit epilogue when first BPF_EXIT is seen
and all other BPF_EXIT instructions will be emitted as jump.

Since jump offset to epilogue is computed as:
jmp_offset = ctx->cleanup_addr - addrs[i]
we need to change type of cleanup_addr to signed to compute the offset as:
(long long) ((int)20 - (int)30)
instead of:
(long long) ((unsigned int)20 - (int)30)

Fixes: 622582786c9e ("net: filter: x86: internal BPF JIT")
Signed-off-by: Alexei Starovoitov <ast@plumgrid.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-05 21:23:54 -08:00
Linus Torvalds
beb5af4033 Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
 "Two final fixlets for 3.18:
   - Prevent microcode reload wreckage on 32bit
   - Unbreak cross compilation"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, microcode: Limit the microcode reloading to 64-bit for now
  x86: Use $(OBJDUMP) instead of plain objdump
2014-12-05 10:47:19 -08:00
Sonny Rao
e2405a59e5 ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured
This will enable use of physical arch timers on rk3288, where each
core comes out of reset with a different virtual offset.  Using
physical timers will help with SMP booting on coreboot and older
u-boot and should also allow suspend-resume and cpu-hotplug to work on
all firmwares.

Firmware which does initialize the cpu registers properly at boot and
cpu-hotplug can remove this property from the device tree.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-05 10:27:16 -08:00
Felipe Balbi
d04169870b ARM: omap2plus_defconfig: enable ECAP and EHRPWM
Many of AM335x and AM437x hook backlight to
one of these two devices. By enabling their
drivers we make sure pwm-backlight can do
its thing.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-05 17:38:04 +01:00
Felipe Balbi
03472fe8df ARM: omap2plus_defconfig: enable XHCI
AM437x devices have a DWC3 IP inside of them.

The host side implementation of DWC3 is XHCI
compliant. By enabling XHCI driver, we get
the USB host port on AM437x Starter Kit working
out of the box.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-05 17:38:03 +01:00
Felipe Balbi
866d1808e7 ARM: omap2plus_defconfig: enable AM33XX SoC sound
Without this, sound on AM437x Starter Kit will
not work.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-05 17:38:03 +01:00
Felipe Balbi
8996a0bc62 ARM: omap2plus_defconfig: enable EDT FT5X06 touchscreen
AM437x Starter Kit ships with EDT FT5306 touchscreen
device. By enabling the driver we make sure touchscreen
will work out of the box.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-05 17:38:02 +01:00
Felipe Balbi
79f428f7fd ARM: omap2plus_defconfig: remove unwanted ethernet drivers
None of these drivers are known to be used on
any platform supported by omap2plus_defconfig,
by removing them we get a slight smaller kernel.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-12-05 17:38:01 +01:00
Ding Tianhong
eb8a653137 arm64: remove the unnecessary arm64_swiotlb_init()
The commit 3690951fc6d42f3a0903987677d0e592c49dd8db
(arm64: Use swiotlb late initialisation)
switches the DMA mapping code to swiotlb_tlb_late_init_with_default_size(),
the arm64_swiotlb_init() will not used anymore, so remove this function.

Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-12-05 12:19:52 +00:00
Olof Johansson
08bcc754c3 Revert "ARM: dts: rockchip: temporarily disable smp on rk3288"
We now have the physical-timers patches lined up as a dependency in this same
branch, so we can revert the temporary disablement.

This reverts commit b77d43943ea83997c6c37b8831d1561981d499c5.

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:34:06 -08:00
Olof Johansson
fb3268b008 Merge branch 'clocksource/physical-timers' into next/dt
These are a pre-req to get rk3288 SMP to work with some firmwares, so merge
it in here as well as in next/drivers.

* clocksource/physical-timers:
  clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
  clocksource: arch_timer: Fix code to use physical timers when requested
2014-12-04 23:33:16 -08:00
Olof Johansson
6b34df9e30 Merge branch 'clocksource/physical-timers' into next/drivers
* clocksource/physical-timers:
  clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
  clocksource: arch_timer: Fix code to use physical timers when requested
2014-12-04 23:32:16 -08:00
Sonny Rao
0b46b8a718 clocksource: arch_timer: Fix code to use physical timers when requested
This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false.  It restores the
arch_counter_get_cntpct() function after removal in

0d651e4e "clocksource: arch_timer: use virtual counters"

We need this on certain ARMv7 systems which are architected like this:

* The firmware doesn't know and doesn't care about hypervisor mode and
  we don't want to add the complexity of hypervisor there.

* The firmware isn't involved in SMP bringup or resume.

* The ARCH timer come up with an uninitialized offset between the
  virtual and physical counters.  Each core gets a different random
  offset.

* The device boots in "Secure SVC" mode.

* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
  CNTHCTL.PL1PCTEN (both default to 1 at reset)

One example of such as system is RK3288 where it is much simpler to
use the physical counter since there's nobody managing the offset and
each time a core goes down and comes back up it will get reinitialized
to some other random value.

Fixes: 0d651e4e65e9 ("clocksource: arch_timer: use virtual counters")
Cc: stable@vger.kernel.org
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:30:26 -08:00
Marc Zyngier
65bb688aab ARM: imx6: fix bogus use of irq_get_irq_data
The imx6 PM code seems to be quite creative in its use of irq_data,
using something that is very much a hardware interrupt number where
we expect a virtual one.  Yes, it worked so far, but that's only
luck, and it will definitely explode in 3.19.

Fix it by using a pair of helper functions that deal with the
actual hardware.

Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:24:51 -08:00
Marc Zyngier
e2fd06f6be ARM: imx: irq: fix buggy usage of irq_data irq field
mach-imx directly references to the irq field in
struct irq_data, and uses this to directly poke hardware register.

But irq is the *virtual* irq number, something that has nothing
to do with the actual HW irq (stored in the hwirq field). And once
we put the stacked domain code in action, the whole thing explodes,
as these two values are *very* different.

Just replacing all instances of irq with hwirq fixes the issue.

Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:24:48 -08:00
Olof Johansson
83b63c699b ARM: BCM5301X: dts updates
This adds the IRQ number to the main dts file and some new dts files
 for newly added devices.
 
 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUgL4rAAoJEIZ0px9YPRMyMgUP/1/kVmJ9096lA8L3QP8U29Ij
 ODqhQpNsJbqZZObdw1mrijN+sgpp3nmYvhtBNuQM7t4Ov0i2QFiOwRZ264G7ti9D
 i24n1vHMqOqN8rMpbcQ3G1beF3TLagWsMx9O7EE9GHjyKOYBJAi+QjOV6ajxmoPB
 sAmT+qzIwz45jDTXwky7/+W8ntrQHSKj6nNQcoknnkEpdYoFPmkxoKMDD9pdU6y2
 77Om7rLAwqWRQt/gdMB3qO4lQubDuRgeyNjH7n6C4scgi4odKJEjtsDmqoPL1gu1
 cEMvU06hTlLkgN6lQSrNny7OqXuVONxZU4ymm9TGcNC3xwXVeVwHBEVfBvwIgjKa
 JsQ1pdAjQiKSVXlDe65AMNnPordy4misfB0j20kRKGVD/ODPHgxNEQ95Q1zuHRZc
 sXz0OMuO+WZSvERDsUx3f1orfBwhCmsWWVRzAaX2O/AMprP5HIKibDtUNAbV04rS
 DR8DNEYvUL7K+Sd9xByzVN4YmXoedpjZDE3rwdNzP1bBOZiLFncdgERXBuQKjZXP
 63z6gHnVpwMMfZ3IJ3/WLiNgv+9ddngBgAJ+oO9zecMlGR9iqLTlFnInxaQjhwLz
 wIaC4lTKze/Xhb6yX0zhkEuUiwnICjczSoyRRNefaOPdJHHvOopo7l09ObTNa275
 TgdVerQ+JLltla0IbnjB
 =epqY
 -----END PGP SIGNATURE-----

Merge tag 'bcm5301x-dt-2014-12-04' of https://github.com/hauke/linux into next/dt

Merge "ARM: BCM5301X: DT changes for v3.19 #2" from Hauke Mehrtens:

ARM: BCM5301X: dts updates

This adds the IRQ number to the main dts file and some new dts files
for newly added devices.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

* tag 'bcm5301x-dt-2014-12-04' of https://github.com/hauke/linux:
  ARM: BCM5301X: Add DT for Buffalo WZR-600DHP2
  ARM: BCM5301X: Add DT for Asus RT-N18U
  ARM: BCM5301X: Add DT for Buffalo WZR-1750DHP
  ARM: BCM5301X: Add DT for Netgear R6300 V2
  ARM: BCM5301X: Add buttons for Netgear R6250
  ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:19:08 -08:00
Tyler Baker
bb2dfcbdcc ARM: multi_v7_defconfig: enable MAX77686 PMIC drivers for exynos4412-prime based SoCs
This patch enables the MAX77686 PMIC drivers in the multi_v7_defconfig used
on exynos4412-prime family of SoCs [1]. The exynos4412-prime based boards
are producing the following runtime errors only on the multi_v7_defconfig [2]:

kern.err: deviceless supply vdd_arm not found, using dummy regulator
kern.err: exynos-cpufreq exynos-cpufreq: failed to set cpu voltage to 1287500
kern.err: cpufreq: __target_index: Failed to change cpu frequency: -22

I reviewed the exynos_defconfig, which does not produce these runtime
errors. It was obvious that the exynos_defconfig has the PMIC drivers
enabled, whereas the multi_v7_defconfig does not. This patch has been tested
on a odroid-u2 and a odroid-u3 board. It has resolved the runtime errors.
Therefore, I purpose we enabled these drivers in the multi_v7_defconfig.

[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G135270682824
[2] http://storage.armcloud.us/kernel-ci/mainline/v3.18-rc7-48-g7cc78f8/arm-multi_v7_defconfig/lab-tbaker-00/boot-exynos4412-odroidu3.html

Signed-off-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-12-04 23:16:21 -08:00
Mahesh Salgaonkar
682e77c861 powerpc/book3s: Fix partial invalidation of TLBs in MCE code.
The existing MCE code calls flush_tlb hook with IS=0 (single page) resulting
in partial invalidation of TLBs which is not right. This patch fixes
that by passing IS=0xc00 to invalidate whole TLB for successful recovery
from TLB and ERAT errors.

Cc: stable@vger.kernel.org
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-12-05 16:26:21 +11:00
Aneesh Kumar K.V
aefa5688c0 powerpc/mm: don't do tlbie for updatepp request with NO HPTE fault
upatepp can get called for a nohpte fault when we find from the linux
page table that the translation was hashed before. In that case
we are sure that there is no existing translation, hence we could
avoid doing tlbie.

We could possibly race with a parallel fault filling the TLB. But
that should be ok because updatepp is only ever relaxing permissions.
We also look at linux pte permission bits when filling hash pte
permission bits. We also hold the linux pte busy bits while
inserting/updating a hashpte entry, hence a paralle update of
linux pte is not possible. On the other hand mprotect involves
ptep_modify_prot_start which cause a hpte invalidate and not updatepp.

Performance number:
We use randbox_access_bench written by Anton.

Kernel with THP disabled and smaller hash page table size.

    86.60%  random_access_b  [kernel.kallsyms]                [k] .native_hpte_updatepp
     2.10%  random_access_b  random_access_bench              [.] doit
     1.99%  random_access_b  [kernel.kallsyms]                [k] .do_raw_spin_lock
     1.85%  random_access_b  [kernel.kallsyms]                [k] .native_hpte_insert
     1.26%  random_access_b  [kernel.kallsyms]                [k] .native_flush_hash_range
     1.18%  random_access_b  [kernel.kallsyms]                [k] .__delay
     0.69%  random_access_b  [kernel.kallsyms]                [k] .native_hpte_remove
     0.37%  random_access_b  [kernel.kallsyms]                [k] .clear_user_page
     0.34%  random_access_b  [kernel.kallsyms]                [k] .__hash_page_64K
     0.32%  random_access_b  [kernel.kallsyms]                [k] fast_exception_return
     0.30%  random_access_b  [kernel.kallsyms]                [k] .hash_page_mm

With Fix:

    27.54%  random_access_b  random_access_bench              [.] doit
    22.90%  random_access_b  [kernel.kallsyms]                [k] .native_hpte_insert
     5.76%  random_access_b  [kernel.kallsyms]                [k] .native_hpte_remove
     5.20%  random_access_b  [kernel.kallsyms]                [k] fast_exception_return
     5.12%  random_access_b  [kernel.kallsyms]                [k] .__hash_page_64K
     4.80%  random_access_b  [kernel.kallsyms]                [k] .hash_page_mm
     3.31%  random_access_b  [kernel.kallsyms]                [k] data_access_common
     1.84%  random_access_b  [kernel.kallsyms]                [k] .trace_hardirqs_on_caller

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2014-12-05 16:26:15 +11:00