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Moving sram code from plat-omap got the attention of the kernel test robot.
I found a few more places with related warnings because the sram
references are a mix of kernel pointers and __iomem pointers:
mach-omap1/sram-init.c:56:17: warning: cast removes address space '__iomem' of expression
mach-omap1/board-ams-delta.c:667:9: warning: incorrect type in argument 1 (different base types)
mach-omap2/sram.c:78:17: warning: cast removes address space '__iomem' of expression
mach-omap2/omap4-common.c:142:27: warning: incorrect type in assignment (different address spaces)
mach-omap2/omap4-common.c:142:27: expected void [noderef] __iomem *static [toplevel] sram_sync
mach-omap2/omap4-common.c:142:27: got void *
mach-omap2/pm34xx.c:113:45: warning: incorrect type in argument 1 (different address spaces)
mach-omap2/pm34xx.c:113:45: expected void [noderef] __iomem *save_regs
mach-omap2/pm34xx.c:113:45: got void *extern [addressable] [toplevel] omap3_secure_ram_storage
There is no good solution here, as sram is a bit special in this
regard. Change the annotations to at least shut up the warnings.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The sram initialization code is the only shared omap1/2 code that
is not a standalone driver, but it is very short. Having two copies
of this code means some duplication of the sources, but actually
saves object code size as it can be inlined better.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Remove the OMAP3 core DPLL re-program code, and the associated SRAM
code that does the low-level programming of the DPLL divider, idling
of the SDRAM etc.
This code was never fully implemented in the kernel; things missing
were driver side handling of core clock changes (they need to account
for their functional clock rate being changed on-the-fly), and the whole
framework required for handling this. Thus, there is not much point
to keep carrying the low-level support code either.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In order to handle errata I688, a page of sram was reserved by doing a
static iotable map. Now that we use gen_pool to manage sram, we can
completely remove all of these static mappings and use gen_pool_alloc()
to get the one page of sram space needed to implement errata I688.
omap_bus_sync will be NOP until SRAM initialization happens.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use drivers/misc/sram.c driver to manage SRAM on all DT only
OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
the existing private plat-omap/sram.c
Address and size related data is removed from mach-omap2/sram.c
and now passed to drivers/misc/sram.c from DT.
Users can hence use general purpose allocator apis instead of
OMAP private ones to manage and use SRAM.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.
Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This definition corresponds to the L3_OCMC0,
as in case of AM33XX.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
[tony@atomide.com: updated to remove default y]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's make the omap2+ specific parts private to mach-omap2.
This leaves just a minimal shared code into plat-omap like
it should be.
Signed-off-by: Tony Lindgren <tony@atomide.com>
