50654 Commits

Author	SHA1	Message	Date
Ingo Molnar	ed3cd45f8c	Linux 5.11 ... -----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmAppPgeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGeXYH/imZPBd4A1jIMehN 5HV2A53Z+MXmmaMuGj9X1KV6vsf55/xB+IhOoFdtRAIsO8c2yYSCO8i4+4R0XfYA +/YFJeq672rojQnmh6XbpR8dugaAV7CUHy6n7KDsyvtT6EOCpwFSwkOb4X3tBRX6 TlYgm2d/xgV/wRHSgLVugK0MdFCLMAnyb7mkPfar9QrMgG1BiDKLq07xmwnS23On TkqpJ9yZ/rJpUrrUqQYPShSO/FmA+fSfWs0CDv7EIrJ40LUScD6PZxSHWTIHtjLk E4jFda6wuqLRVWsBwaBzUIdD0zk7X5quHRzEpbC5ga16SK6yrWvE5YJJXCguIEuZ f3FMRYs= =CAjn -----END PGP SIGNATURE----- Merge tag 'v5.11' into sched/core, to pick up fixes & refresh the branch Signed-off-by: Ingo Molnar <mingo@kernel.org>	2021-02-17 14:04:39 +01:00
Ben Widawsky	583fa5e71c	cxl/mem: Add basic IOCTL interface ... Add a straightforward IOCTL that provides a mechanism for userspace to query the supported memory device commands. CXL commands as they appear to userspace are described as part of the UAPI kerneldoc. The command list returned via this IOCTL will contain the full set of commands that the driver supports, however, some of those commands may not be available for use by userspace. Memory device commands first appear in the CXL 2.0 specification. They are submitted through a mailbox mechanism specified in the CXL 2.0 specification. The send command allows userspace to issue mailbox commands directly to the hardware. The list of available commands to send are the output of the query command. The driver verifies basic properties of the command and possibly inspect the input (or output) payload to determine whether or not the command is allowed (or might taint the kernel). Reported-by: kernel test robot <lkp@intel.com> # bug in earlier revision Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> (v2) Cc: Al Viro <viro@zeniv.linux.org.uk> Link: https://lore.kernel.org/r/20210217040958.1354670-5-ben.widawsky@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>	2021-02-16 20:36:38 -08:00
Dan Williams	b39cb1052a	cxl/mem: Register CXL memX devices ... Create the /sys/bus/cxl hierarchy to enumerate: * Memory Devices (per-endpoint control devices) * Memory Address Space Devices (platform address ranges with interleaving, performance, and persistence attributes) * Memory Regions (active provisioned memory from an address space device that is in use as System RAM or delegated to libnvdimm as Persistent Memory regions). For now, only the per-endpoint control devices are registered on the 'cxl' bus. However, going forward it will provide a mechanism to coordinate cross-device interleave. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> (v2) Link: https://lore.kernel.org/r/20210217040958.1354670-4-ben.widawsky@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>	2021-02-16 20:36:38 -08:00
Ben Widawsky	8adaf747c9	cxl/mem: Find device capabilities ... Provide enough functionality to utilize the mailbox of a memory device. The mailbox is used to interact with the firmware running on the memory device. The flow is proven with one implemented command, "identify". Because the class code has already told the driver this is a memory device and the identify command is mandatory. CXL devices contain an array of capabilities that describe the interactions software can have with the device or firmware running on the device. A CXL compliant device must implement the device status and the mailbox capability. Additionally, a CXL compliant memory device must implement the memory device capability. Each of the capabilities can [will] provide an offset within the MMIO region for interacting with the CXL device. The capabilities tell the driver how to find and map the register space for CXL Memory Devices. The registers are required to utilize the CXL spec defined mailbox interface. The spec outlines two mailboxes, primary and secondary. The secondary mailbox is earmarked for system firmware, and not handled in this driver. Primary mailboxes are capable of generating an interrupt when submitting a background command. That implementation is saved for a later time. Reported-by: Colin Ian King <colin.king@canonical.com> (coverity) Reported-by: Dan Carpenter <dan.carpenter@oracle.com> (smatch) Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> (v2) Link: https://www.computeexpresslink.org/download-the-specification Link: https://lore.kernel.org/r/20210217040958.1354670-3-ben.widawsky@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>	2021-02-16 20:36:38 -08:00
Dan Williams	4cdadfd5e0	cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints ... The CXL.mem protocol allows a device to act as a provider of "System RAM" and/or "Persistent Memory" that is fully coherent as if the memory was attached to the typical CPU memory controller. With the CXL-2.0 specification a PCI endpoint can implement a "Type-3" device interface and give the operating system control over "Host Managed Device Memory". See section 2.3 Type 3 CXL Device. The memory range exported by the device may optionally be described by the platform firmware memory map, or by infrastructure like LIBNVDIMM to provision persistent memory capacity from one, or more, CXL.mem devices. A pre-requisite for Linux-managed memory-capacity provisioning is this cxl_mem driver that can speak the mailbox protocol defined in section 8.2.8.4 Mailbox Registers. For now just land the initial driver boiler-plate and Documentation/ infrastructure. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: David Rientjes <rientjes@google.com> (v1) Cc: Jonathan Corbet <corbet@lwn.net> Link: https://www.computeexpresslink.org/download-the-specification Link: https://lore.kernel.org/r/20210217040958.1354670-2-ben.widawsky@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>	2021-02-16 20:36:38 -08:00
David S. Miller	d489ded1a3	Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net	2021-02-16 17:51:13 -08:00
Pavana Sharma	7331d1d462	net: phy: Add 5GBASER interface mode ... Add 5GBASE-R phy interface mode Signed-off-by: Pavana Sharma <pavana.sharma@digi.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>	2021-02-16 14:15:12 -08:00
Pavana Sharma	4b08de9090	dt-bindings: net: Add 5GBASER phy interface ... Add 5gbase-r PHY interface mode. Signed-off-by: Pavana Sharma <pavana.sharma@digi.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>	2021-02-16 14:15:12 -08:00
Stephen Boyd	4d5c4ae329	Merge branches 'clk-socfpga', 'clk-mstar', 'clk-qcom' and 'clk-warnings' into clk-next ... - PLL support on MStar/SigmaStar ARMv7 SoCs - CPU clks for Qualcomm SDX55 - GCC and RPMh clks for Qualcomm SC8180x and SC7280 SoCs - GCC clks for Qualcomm SM8350 - Video clk fixups on Qualcomm SM8250 - GPU clks for Qualcomm SDM660/SDM630 - Improvements for multimedia clks on Qualcomm MSM8998 - Fix many warnings with W=1 enabled builds under drivers/clk/ * clk-socfpga: clk: socfpga: agilex: add clock driver for eASIC N5X platform dt-bindings: documentation: add clock bindings information for eASIC N5X * clk-mstar: clk: mstar: msc313-mpll: Fix format specifier clk: mstar: Allow MStar clk drivers to be compile tested clk: mstar: MStar/SigmaStar MPLL driver clk: fixed: add devm helper for clk_hw_register_fixed_factor() dt-bindings: clk: mstar msc313 mpll binding description dt-bindings: clk: mstar msc313 mpll binding header * clk-qcom: (42 commits) clk: qcom: Add Global Clock controller (GCC) driver for SC7280 dt-bindings: clock: Add SC7280 GCC clock binding clk: qcom: rpmh: Add support for RPMH clocks on SC7280 dt-bindings: clock: Add RPMHCC bindings for SC7280 clk: qcom: gcc-sm8350: add gdsc dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver clk: qcom: gcc-sdm660: Mark GPU CFG AHB clock as critical clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc clk: qcom: gdsc: Implement NO_RET_PERIPH flag clk: qcom: mmcc-msm8998: Set bimc_smmu_gdsc always on clk: qcom: mmcc-msm8998: Add hardware clockgating registers to some clks clk: qcom: gcc-msm8998: Fix Alpha PLL type for all GPLLs clk: qcom: gcc-msm8998: Mark gpu_cfg_ahb_clk as critical ... * clk-warnings: (27 commits) clk: zynq: clkc: Remove various instances of an unused variable 'clk' clk: versatile: clk-icst: Fix worthy struct documentation block clk: ti: gate: Fix possible doc-rot in 'omap36xx_gate_clk_enable_with_hsdiv_restore' clk: ti: dpll: Fix misnaming of '_register_dpll()'s 'user' parameter clk: ti: clockdomain: Fix description for 'omap2_init_clk_clkdm's hw param clk: st: clkgen-fsyn: Fix worthy struct documentation demote partially filled one clk: st: clkgen-pll: Demote unpopulated kernel-doc header clk: mvebu: ap-cpu-clk: Demote non-conformant kernel-doc header clk: socfpga: clk-pll-a10: Remove set but unused variable 'rc' clk: socfpga: clk-pll: Remove unused variable 'rc' clk: sifive: fu540-prci: Declare static const variable 'prci_clk_fu540' where it's used clk: bcm: clk-iproc-pll: Demote kernel-doc abuse clk: zynqmp: divider: Add missing description for 'max_div' clk: spear: Move prototype to accessible header clk: qcom: clk-rpm: Remove a bunch of superfluous code clk: clk-xgene: Add description for 'mask' and fix formatting for 'flags' clk: qcom: mmcc-msm8974: Remove unused static const tables 'mmcc_xo_mmpll0_1_2_gpll0{map}' clk: clk-npcm7xx: Remove unused static const tables 'npcm7xx_gates' and 'npcm7xx_divs_fx' clk: clk-fixed-mmio: Demote obvious kernel-doc abuse clk: qcom: gcc-ipq4019: Remove unused variable 'ret' ...	2021-02-16 14:09:24 -08:00
Stephen Boyd	11f83102d8	Merge branches 'clk-vc5', 'clk-silabs', 'clk-aspeed', 'clk-qoriq' and 'clk-rohm' into clk-next ... - Support crystal load capacitance for Versaclock VC5 - Add a "skip recall" DT binding for Silicon Labs' si570 to avoid glitches at boot * clk-vc5: clk: vc5: Add support for optional load capacitance dt-bindings: clk: versaclock5: Add optional load capacitance property * clk-silabs: clk: si570: Skip NVM to RAM recall operation if an optional property is set dt-bindings: clock: si570: Add 'silabs,skip-recall' property * clk-aspeed: clk: aspeed: Fix APLL calculate formula from ast2600-A2 * clk-qoriq: clk: qoriq: use macros to generate pll_mask * clk-rohm: clk: BD718x7: Do not depend on parent driver data	2021-02-16 14:09:12 -08:00
Stephen Boyd	242d8cf626	Merge branches 'clk-mediatek', 'clk-imx', 'clk-amlogic' and 'clk-at91' into clk-next ... * clk-mediatek: clk: mediatek: mux: Update parent at enable time clk: mediatek: mux: Drop unused clock ops clk: mediatek: Select all the MT8183 clocks by default * clk-imx: dt-bindings: clock: imx: Switch to my personal address MAINTAINERS: Add section for NXP i.MX clock drivers clk: imx: Move 'imx6sl_set_wait_clk()'s prototype out to accessible header clk: imx8mn: add clkout1/2 support clk: imx8mm: add clkout1/2 support clk: imx8mq: add PLL monitor output clk: imx: clk-imx31: Remove unused static const table 'uart_clks' clk: imx6q: demote warning about pre-boot ldb_di_clk reparenting clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS subsystems clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2() clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 bypass clocks clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 PLL clocks * clk-amlogic: clk: meson: axg: Remove MIPI enable clock gate clk: meson-axg: remove CLKID_MIPI_ENABLE dt-bindings: clock: meson8b: remove non-existing clock macros clk: meson: meson8b: remove compatibility code for old .dtbs clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate() clk: meson: clk-pll: make "ret" a signed integer clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL * clk-at91: clk: at91: Fix the declaration of the clocks	2021-02-16 14:09:08 -08:00
Stephen Boyd	ee6b84a3fc	Merge branch 'clk-unused' into clk-next ... - Remove efm32 clk driver - Remove tango4 clk driver - Remove zte zx clk driver - Remove sirf prima2/atlast clk drivers - Remove u300 clk driver * clk-unused: clk: remove u300 driver clk: remove sirf prima2/atlas drivers clk: remove zte zx driver clk: remove tango4 driver clk: Drop unused efm32gg driver	2021-02-16 14:08:51 -08:00
Stephen Boyd	0d7a660bfe	Merge branches 'clk-doc', 'clk-renesas', 'clk-allwinner', 'clk-rockchip' and 'clk-xilinx' into clk-next ... - Convert Xilinx VCU clk driver to a proper clk provider driver - Expose Xilinx ZynqMP clk driver to more platforms * clk-doc: linux/clk.h: use correct kernel-doc notation for 2 functions * clk-renesas: (21 commits) clk: renesas: cpg-mssr: Fix formatting issues for 'smstpcr_saved's documentation clk: renesas: r8a779a0: Add RAVB clocks clk: renesas: r8a779a0: Add I2C clocks dt-bindings: clock: renesas: rcar-usb2-clock-sel: Add support for RZ/G2 M/N/H clk: renesas: r8a779a0: Add SYS-DMAC clocks clk: renesas: r8a779a0: Add SDHI support clk: renesas: rcar-gen3: Factor out CPG library clk: renesas: rcar-gen3: Remove cpg_quirks access when registering SD clock clk: renesas: r8a779a0: Add MSIOF clocks clk: renesas: r8a779a0: Add PFC/GPIO clocks clk: renesas: r8a779a0: Fix parent of CBFUSA clock clk: renesas: r8a779a0: Remove non-existent S2 clock clk: renesas: r8a779a0: Add HSCIF support clk: renesas: r8a779a0: Add RWDT clocks clk: renesas: r8a779a0: Add VSPX clock support clk: renesas: r8a779a0: Add VSPD clock support clk: renesas: r8a779a0: Add FCPVD clock support clk: renesas: r8a77995: Add TMU clocks clk: renesas: r8a77990: Add TMU clocks clk: renesas: r8a77965: Add TMU clocks ... * clk-allwinner: clk: sunxi-ng: Add support for the Allwinner H616 CCU clk: sunxi-ng: Add support for the Allwinner H616 R-CCU dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616 clk: sunxi-ng: h6: Fix clock divider range on some clocks clk: sunxi: clk-mod0: Demote non-conformant kernel-doc header clk: sunxi: clk-a10-ve: Demote obvious kernel-doc abuse clk: sunxi: clk-sunxi: Demote a bunch of non-conformant kernel-doc headers clk: sunxi-ng: h6: Fix CEC clock clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset * clk-rockchip: clk: rockchip: fix DPHY gate locations on rk3368 clk: rockchip: use clock id for SCLK_VIP_OUT on rk3368 clk: rockchip: add clock id for SCLK_VIP_OUT on rk3368 clk: rockchip: use clock ids for PCLK_DPHYRX and PCLK_DPHYTX0 on rk3368 clk: rockchip: add clock ids for PCLK_DPHYRX and PCLK_DPHYTX0 on rk3368 clk: rockchip: Demote non-conformant kernel-doc header in half-divider clk: rockchip: Demote kernel-doc abuses to standard comment blocks in plls clk: rockchip: Remove unused/undocumented struct members from clk-cpu clk: rockchip: Demote non-conformant kernel-doc headers in main clock code * clk-xilinx: clk: xilinx: move xlnx_vcu clock driver from soc soc: xilinx: vcu: fix alignment to open parenthesis soc: xilinx: vcu: fix repeated word the in comment soc: xilinx: vcu: use bitfields for register definition soc: xilinx: vcu: remove calculation of PLL configuration soc: xilinx: vcu: make the PLL configurable soc: xilinx: vcu: make pll post divider explicit soc: xilinx: vcu: implement clock provider for output clocks soc: xilinx: vcu: register PLL as fixed rate clock soc: xilinx: vcu: implement PLL disable soc: xilinx: vcu: add helpers for configuring PLL soc: xilinx: vcu: add helper to wait for PLL locked soc: xilinx: vcu: drop coreclk from struct xlnx_vcu clk: divider: fix initialization with parent_hw ARM: dts: vcu: define indexes for output clocks clk: axi-clkgen: use devm_platform_ioremap_resource() short-hand dt-bindings: clock: adi,axi-clkgen: add compatible string for ZynqMP support clk: clk-axiclkgen: add ZynqMP PFD and VCO limits clk: axi-clkgen: replace ARCH dependencies with driver deps	2021-02-16 14:06:43 -08:00
David S. Miller	b8af417e4d	Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next ... Daniel Borkmann says: ==================== pull-request: bpf-next 2021-02-16 The following pull-request contains BPF updates for your *net-next* tree. There's a small merge conflict between 7eeba1706eba ("tcp: Add receive timestamp support for receive zerocopy.") from net-next tree and 9cacf81f8161 ("bpf: Remove extra lock_sock for TCP_ZEROCOPY_RECEIVE") from bpf-next tree. Resolve as follows: [...] lock_sock(sk); err = tcp_zerocopy_receive(sk, &zc, &tss); err = BPF_CGROUP_RUN_PROG_GETSOCKOPT_KERN(sk, level, optname, &zc, &len, err); release_sock(sk); [...] We've added 116 non-merge commits during the last 27 day(s) which contain a total of 156 files changed, 5662 insertions(+), 1489 deletions(-). The main changes are: 1) Adds support of pointers to types with known size among global function args to overcome the limit on max # of allowed args, from Dmitrii Banshchikov. 2) Add bpf_iter for task_vma which can be used to generate information similar to /proc/pid/maps, from Song Liu. 3) Enable bpf_{g,s}etsockopt() from all sock_addr related program hooks. Allow rewriting bind user ports from BPF side below the ip_unprivileged_port_start range, both from Stanislav Fomichev. 4) Prevent recursion on fentry/fexit & sleepable programs and allow map-in-map as well as per-cpu maps for the latter, from Alexei Starovoitov. 5) Add selftest script to run BPF CI locally. Also enable BPF ringbuffer for sleepable programs, both from KP Singh. 6) Extend verifier to enable variable offset read/write access to the BPF program stack, from Andrei Matei. 7) Improve tc & XDP MTU handling and add a new bpf_check_mtu() helper to query device MTU from programs, from Jesper Dangaard Brouer. 8) Allow bpf_get_socket_cookie() helper also be called from [sleepable] BPF tracing programs, from Florent Revest. 9) Extend x86 JIT to pad JMPs with NOPs for helping image to converge when otherwise too many passes are required, from Gary Lin. 10) Verifier fixes on atomics with BPF_FETCH as well as function-by-function verification both related to zero-extension handling, from Ilya Leoshkevich. 11) Better kernel build integration of resolve_btfids tool, from Jiri Olsa. 12) Batch of AF_XDP selftest cleanups and small performance improvement for libbpf's xsk map redirect for newer kernels, from Björn Töpel. 13) Follow-up BPF doc and verifier improvements around atomics with BPF_FETCH, from Brendan Jackman. 14) Permit zero-sized data sections e.g. if ELF .rodata section contains read-only data from local variables, from Yonghong Song. 15) veth driver skb bulk-allocation for ndo_xdp_xmit, from Lorenzo Bianconi. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>	2021-02-16 13:14:06 -08:00
Steve French	731ddc09c2	cifs: documentation cleanup ... Various minor changes to the admin-guide for cifs Signed-off-by: Steve French <stfrench@microsoft.com>	2021-02-16 15:03:04 -06:00
Ed Tsai	092af2eb18	Documentation: f2fs: fix typo s/automaic/automatic ... Fix typo in f2fs documentation. Signed-off-by: Ed Tsai <ed.tsai@mediatek.com> Reviewed-by: Chao Yu <yuchao0@huawei.com> Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>	2021-02-16 07:58:35 -08:00
James Bottomley	52d0848e1d	ABI: add sysfs description for tpm exports of PCR registers ... Adds the ABI entries for the new /sys/class/tpm/tpm<n>/pcr-<hash>/<m> files which are added to export the PCR hash values on a one value per file basis. Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>	2021-02-16 10:40:27 +02:00
Masahiro Yamada	2047ace966	kbuild: use always-y instead of extra-y ... As commit d0e628cd817f ("kbuild: doc: clarify the difference between extra-y and always-y") explained, extra-y should be used for listing the prerequisites of vmlinux. These targets are not related to vmlinux. always-y is a better fix. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org>	2021-02-16 12:01:45 +09:00
Masahiro Yamada	3d277907c2	kbuild: doc: remove "Objects which export symbols" section ... EXPORT_SYMBOL is unrelated to makefiles. No need to mention it. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>	2021-02-16 12:01:45 +09:00
Heiner Kallweit	93e8990c24	net: phy: rename PHY_IGNORE_INTERRUPT to PHY_MAC_INTERRUPT ... Some internal PHY's have their events like link change reported by the MAC interrupt. We have PHY_IGNORE_INTERRUPT to deal with this scenario. I'm not too happy with this name. We don't ignore interrupts, typically there is no interrupt exposed at a PHY level. So let's rename it to PHY_MAC_INTERRUPT. This is in line with phy_mac_interrupt(), which is called from the MAC interrupt handler to handle PHY events. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>	2021-02-15 15:20:49 -08:00
Nobuhiro Iwamatsu	e6a395061c	dt-bindings: net: Add DT bindings for Toshiba Visconti TMPV7700 SoC ... Add device tree bindings for ethernet controller of Toshiba Visconti TMPV7700 SoC series. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Signed-off-by: David S. Miller <davem@davemloft.net>	2021-02-15 14:59:35 -08:00
Dmitry Baryshkov	e8ffd6c075	dt-bindings: thermal: qcom: add adc-thermal monitor bindings ... Add bindings for thermal monitor, part of Qualcomm PMIC5 chips. It is a close counterpart of VADC part of those PMICs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210205000118.493610-2-dmitry.baryshkov@linaro.org	2021-02-15 21:28:52 +01:00
Andy Shevchenko	4590d98f5a	sfi: Remove framework for deprecated firmware ... SFI-based platforms are gone. So does this framework. This removes mention of SFI through the drivers and other code as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>	2021-02-15 20:09:46 +01:00
Rafael J. Wysocki	a9a939cb34	Merge branches 'powercap' and 'pm-misc' ... * powercap: powercap: intel_rapl: Use topology interface in rapl_init_domains() powercap: intel_rapl: Use topology interface in rapl_add_package() powercap/intel_rapl: add support for AlderLake Mobile powercap/drivers/dtpm: Fix size of object being allocated powercap/drivers/dtpm: Fix an IS_ERR() vs NULL check powercap/drivers/dtpm: Fix some missing unlock bugs powercap/drivers/dtpm: Fix a double shift bug powercap/drivers/dtpm: Fix __udivdi3 and __aeabi_uldivmod unresolved symbols powercap/drivers/dtpm: Add CPU energy model based support powercap/drivers/dtpm: Add API for dynamic thermal power management Documentation/powercap/dtpm: Add documentation for dtpm units: Add Watt units * pm-misc: PM: Kconfig: remove unneeded "default n" options PM: EM: update Kconfig description and drop "default n" option	2021-02-15 18:50:01 +01:00
Rafael J. Wysocki	2d4eb33172	Merge branch 'acpi-messages' ... * acpi-messages: ACPI: OSL: Clean up printing messages ACPI: OSL: Rework acpi_check_resource_conflict() ACPI: thermal: Clean up printing messages ACPI: video: Clean up printing messages ACPI: button: Clean up printing messages ACPI: battery: Clean up printing messages ACPI: AC: Clean up printing messages ACPI: bus: Drop ACPI_BUS_COMPONENT which is not used any more ACPI: utils: Clean up printing messages ACPI: scan: Clean up printing messages ACPI: bus: Clean up printing messages ACPI: PM: Clean up printing messages ACPI: power: Clean up printing messages	2021-02-15 17:04:53 +01:00
Rafael J. Wysocki	6e60afb22c	Merge branches 'acpi-misc', 'acpi-cppc', 'acpi-docs', 'acpi-config' and 'acpi-apei' ... * acpi-misc: ACPI: Test for ACPI_SUCCESS rather than !ACPI_FAILURE ACPI: Use DEVICE_ATTR_<RW|RO|WO> macros * acpi-cppc: ACPI: CPPC: initialise vaddr pointers to NULL ACPI: CPPC: add __iomem annotation to generic_comm_base pointer ACPI: CPPC: remove __iomem annotation for cpc_reg's address * acpi-docs: Documentation: ACPI: add new rule for gpio-line-names * acpi-config: ACPI: configfs: add missing check after configfs_register_default_group() * acpi-apei: ACPI: APEI: ERST: remove unneeded semicolon ACPI: APEI: Add is_generic_error() to identify GHES sources	2021-02-15 17:04:40 +01:00
Rafael J. Wysocki	8af4d37844	Merge branches 'acpi-scan', 'acpi-properties' and 'acpi-platform' ... * acpi-scan: ACPI: scan: Rearrange code related to acpi_get_device_data() ACPI: scan: Adjust white space in acpi_device_add() ACPI: scan: Rearrange memory allocation in acpi_device_add() * acpi-properties: ACPI: property: Satisfy kernel doc validator (part 2) ACPI: property: Satisfy kernel doc validator (part 1) ACPI: property: Make acpi_node_prop_read() static ACPI: property: Remove dead code ACPI: property: Fix fwnode string properties matching * acpi-platform: ACPI: platform-profile: Fix possible deadlock in platform_profile_remove() ACPI: platform-profile: Introduce object pointers to callbacks ACPI: platform-profile: Drop const qualifier for cur_profile ACPI: platform: Add platform profile support Documentation: Add documentation for new platform_profile sysfs attribute	2021-02-15 17:04:04 +01:00
Rafael J. Wysocki	6621cd2db5	Merge branches 'pm-sleep', 'pm-core', 'pm-domains' and 'pm-clk' ... * pm-sleep: PM: sleep: Constify static struct attribute_group PM: sleep: Use dev_printk() when possible PM: sleep: No need to check PF_WQ_WORKER in thaw_kernel_threads() * pm-core: PM: runtime: Fix typos and grammar PM: runtime: Fix resposible -> responsible in runtime.c * pm-domains: PM: domains: Simplify the calculation of variables PM: domains: Add "performance" column to debug summary PM: domains: Make of_genpd_add_subdomain() return -EPROBE_DEFER PM: domains: Make set_performance_state() callback optional PM: domains: use device's next wakeup to determine domain idle state PM: domains: inform PM domain of a device's next wakeup * pm-clk: PM: clk: make PM clock layer compatible with clocks that must sleep	2021-02-15 17:01:11 +01:00
Thomas Gleixner	0b6d70e571	irqchip updates for Linux 5.12: ... - New driver for the MIPS-based Realtek RTL838x/RTL839x SoC - Conversion of the sun6i-r support code to a hierarchical setup - Fix wake-up interrupts for the ls-extirq driver - Fix MSI allocation for the loongson-pch-msi driver - Add compatible strings for new Qualcomm SoCs - Tidy up a few Kconfig entries (IMX, CSKY) - Spelling phyksiz - Remove the sirfsoc and tango drivers -----BEGIN PGP SIGNATURE----- iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAmApGDMPHG1hekBrZXJu ZWwub3JnAAoJECPQ0LrRPXpDcucP/RXS6lW9uTfTUudLIib/YTHNZ7uTuVZrfX+K 4OEAPZKkRDlsSuWvr5i98da0DM0yw0B06c62oNuw7sex6JXsO/2FYISDskUZnlYZ +ApdQGHhVL+kAOHubepYrZLXf7hPX6N/kZotnq1GU0VY1JhxBkVj6sVFJKEnOwf/ sUwDO2+XvmjgrdXRyZgjsyz71SXQ8OosAIsLAI9UHIB/mHi9R3oItEJD7xANeunp IsNelUAnqBPN7/OuyeThh2SGxVXVBtja9mRd+AN7HrDmocxnYnsgMQDR/cEO2aTw xdeKQbEnViUK0JXkofIPwkck58ceUkAl8LLqe0tHPfQgkoPVE9diBrqrP4df7999 NIhPYe2kjZ3+DDNK0zAkvKHiHXC7VPl2qGoqqIUX10x1M+BNxfMSYXgjM4PNK7p7 Ey0w43hnvNKQp7y7ubf+BMStXEOPd4pwyt1P713mSbxeX9sSwGwffI26o58tVpHA zmoaL5MULWQPFCnznN3yaoBf57hNrkCmXR5lZLwD30VN8m5pJshduvO+rE+6LUgI DMQPWpCNToKDd0xxnrnMuf/XjOunNSrX0wt9xtuwmpw5gwlpJp2m9TyZ6Xa5M3rl PYwnVr9gWwGSMw9+G0Ky+C2s+SBzRrPDLfkDOODaGflP/t1b0S8K+1vuIqUHH8fz 2DBWttJp =hhRV -----END PGP SIGNATURE----- Merge tag 'irqchip-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core Pull irqchip updates from Marc Zyngier - New driver for the MIPS-based Realtek RTL838x/RTL839x SoC - Conversion of the sun6i-r support code to a hierarchical setup - Fix wake-up interrupts for the ls-extirq driver - Fix MSI allocation for the loongson-pch-msi driver - Add compatible strings for new Qualcomm SoCs - Tidy up a few Kconfig entries (IMX, CSKY) - Spelling phyksiz - Remove the sirfsoc and tango drivers Link: https://lore.kernel.org/r/20210214124015.3333457-1-maz@kernel.org	2021-02-15 15:41:56 +01:00
Baruch Siach	ea6fe47f3e	dt-bindings: ap806: document gpio marvell,pwm-offset property ... Update the example as well. Add the '#pwm-cells' and 'clocks' properties for a complete working example. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:31 +01:00
Arnd Bergmann	f0a2c77eb8	gpio: remove zte zx driver ... The zte zx platform is getting removed, so this driver is no longer needed. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:29 +01:00
Uwe Kleine-König	9067b3014d	dt-bindings: gpio: pca953x: Increase allowed length for gpio-line-names ... Some supported chips (e.g. pca9505) support 40 lines. To be able to give each line a name the length of the gpio-line-names property must be allowed to contain up to 40 entries. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:28 +01:00
Uwe Kleine-König	600be6522a	dt-bindings: gpio: pca953x: Document new supported chip pca9506 ... The previous patch added support for this chip. Add its name to the list of allowed compatibles. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:28 +01:00
Geert Uytterhoeven	2a84708c2f	dt-bindings: gpio: rcar: Add r8a779a0 support ... Document the compatible value for the GPIO block in the Renesas R-Car V3U (R8A779A0) SoC. While this GPIO block is mostly compatible with GPIO blocks on R-Car Gen3 SoCs, there are small differences, and one of the new registers needs to be configured differently from its initial reset state. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:27 +01:00
Nobuhiro Iwamatsu	858093f736	dt-bindings: gpio: Add bindings for Toshiba Visconti GPIO Controller ... Add bindings for the Toshiba Visconti GPIO Controller. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:26 +01:00
Aswath Govindraju	c233912f6b	dt-bindings: gpio: Add compatible string for AM64 SoC ... Add compatible string for AM64 SoC in device tree binding of davinci GPIO modules as the same IP is used. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:26 +01:00
Jonathan Neuschäfer	e1d4d66338	docs: gpio: intro: Improve HTML formatting ... Currently the HTML output for Documentation/driver-api/gpio/intro.rst doesn't look right. The lines that start with LOW or HIGH are formatted in bold, while the next line after each is not bold. With this patch, the HTML looks better. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:26 +01:00
Jonathan Neuschäfer	db63c0953c	docs: gpio: Fix formatting in description of gpiod_*_array_* functions ... The gpiod_*_array_* functions take four arguments, not three. Additionally, the formatting of the "value_bitmap" line results in misformatted HTML, so fix that. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>	2021-02-15 11:43:25 +01:00
Timur Tabi	5ead723a20	lib/vsprintf: no_hash_pointers prints all addresses as unhashed ... If the no_hash_pointers command line parameter is set, then printk("%p") will print pointers as unhashed, which is useful for debugging purposes. This change applies to any function that uses vsprintf, such as print_hex_dump() and seq_buf_printf(). A large warning message is displayed if this option is enabled. Unhashed pointers expose kernel addresses, which can be a security risk. Also update test_printf to skip the hashed pointer tests if the command-line option is set. Signed-off-by: Timur Tabi <timur@kernel.org> Acked-by: Petr Mladek <pmladek@suse.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Acked-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: Marco Elver <elver@google.com> Signed-off-by: Petr Mladek <pmladek@suse.com> Link: https://lore.kernel.org/r/20210214161348.369023-4-timur@kernel.org	2021-02-15 11:08:32 +01:00
Manivannan Sadhasivam	0d17014e91	dt-bindings: mailbox: Add binding for SDX55 APCS ... Add devicetree YAML binding for SDX55 APCS GCC block. The APCS block acts as the mailbox controller and also provides a clock output and takes 3 clock sources (pll, aux, ref) as input. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>	2021-02-14 23:25:06 -06:00
Suman Anna	7a4647bdc2	dt-bindings: mailbox: omap: Update binding for AM64x SoCs ... Update the existing OMAP Mailbox binding to include the info for AM64x SoCs. There are some minor IP integration differences between the AM64x SoCs and the previous AM65x and J721E SoC families. Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>	2021-02-14 23:23:14 -06:00
Bjorn Andersson	114c93bf28	dt-bindings: mailbox: qcom: Add SC8180X APCS compatible ... Add compatible for the Qualcomm SC8180x APCS block to the Qualcomm APCS binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>	2021-02-14 23:21:39 -06:00
Taniya Das	87a3d523b3	dt-bindings: clock: Add SC7280 GCC clock binding ... Add device tree bindings for global clock subsystem clock controller for Qualcomm Technology Inc's SC7280 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1612981579-17391-2-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2021-02-14 12:56:55 -08:00
Taniya Das	75a81288db	dt-bindings: clock: Add RPMHCC bindings for SC7280 ... Add bindings and update documentation for clock rpmh driver on SC7280. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1612977230-11566-2-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2021-02-14 12:56:55 -08:00
AngeloGioacchino Del Regno	e16831bf40	dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings ... Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SDM630 and SDM660 SoCs. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Link: https://lore.kernel.org/r/20210113183817.447866-10-angelogioacchino.delregno@somainline.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2021-02-14 12:56:55 -08:00
AngeloGioacchino Del Regno	9502d488b1	dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc ... Document the multimedia clock controller found on SDM630/660. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Link: https://lore.kernel.org/r/20210113183817.447866-5-angelogioacchino.delregno@somainline.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2021-02-14 12:56:54 -08:00
Daniel Palmer	4f83b5233f	dt-bindings: clk: mstar msc313 mpll binding description ... Add a binding description for the MStar/SigmaStar MPLL clock block. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20210211052206.2955988-3-daniel@0x0f.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2021-02-14 12:37:45 -08:00
Marek Vasut	198be9898b	rtc: pcf8563: Add NXP PCA8565 compatible ... The NXP PCA8565 is software compatible with the NXP PCF8563, add DT and ACPI compatible entries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> To: linux-rtc@vger.kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210210220623.23233-1-marex@denx.de	2021-02-13 21:51:05 +01:00
Linus Torvalds	ac30d8ce28	Merge branch 'for-5.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup ... Pull cgroup fixes from Tejun Heo: "Two cgroup fixes: - fix a NULL deref when trying to poll PSI in the root cgroup - fix confusing controller parsing corner case when mounting cgroup v1 hierarchies And doc / maintainer file updates" * 'for-5.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup: cgroup: update PSI file description in docs cgroup: fix psi monitor for root cgroup MAINTAINERS: Update my email address MAINTAINERS: Remove stale URLs for cpuset cgroup-v1: add disabled controller check in cgroup1_parse_param()	2021-02-13 12:25:42 -08:00
Robert Hancock	eceac9d259	dt-bindings: net: xilinx_axienet: add xlnx,switch-x-sgmii attribute ... Document the new xlnx,switch-x-sgmii attribute which is used to indicate that the Ethernet core supports dynamic switching between 1000BaseX and SGMII. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: David S. Miller <davem@davemloft.net>	2021-02-12 17:38:53 -08:00