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The DesignWare PCIe driver requires MSI support, so we get a warning for
the artpec6 glue driver if that is not enabled:
warning: (PCIE_ARTPEC6) selects PCIE_DW which has unmet direct dependencies (PCI && PCI_MSI_IRQ_DOMAIN)
Add the same dependency that all other such drivers have.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Niklas Cassel <niklas.cassel@axis.com>
Add a driver for the Aardvark PCIe controller used on the Marvell Armada
3700 ARM64 SoC.
Based on work done by Hezi Shahmoon <hezi.shahmoon@marvell.com> and Marcin
Wojtas <mw@semihalf.com>.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The value that should be programmed into the PADS_REFCLK register varies
per SoC. Fix the Tegra PCIe driver to program the correct values. Future
SoCs will require different values in cfg0/1, so the two values are stored
separately in the per-SoC data structures.
For reference, the values are all documented in NV bug 1771116 comment 20.
The ASIC team has validated all these values, except for the Tegra20 value
which is simply left unchanged in this patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thierry Reding <treding@nvidia.com>
tegra_pcie_phy_power_on() calls tegra_pcie_phy_enable() only for legacy
SoCs. However, part of tegra_pcie_phy_enable() needs to happen in all
cases. Move that code up one level into tegra_pcie_phy_power_on().
[bhelgaas: changelog]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
pcibios_min_mem only exists on 32-bit ARM, so using it in pci-tegra.c
prevents the driver from being used on other arches.
In __pci_assign_resource(), we clip the available area based on
PCIBIOS_MIN_MEM. On 32-bit ARM, this is pcibios_min_mem, with a default
value of 0x01000000. For Tegra, we discover the space available for PCI
resource allocation from the device tree, and the lowest address that will
ever be available is 0x12000000 (on Tegra124).
The Tegra windows are always higher than the default pcibios_min_mem, so
the __pci_assign_resource() has no effect, so there's no need to adjust
pcibios_min_mem here.
[bhelgaas: changelog]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use the pci_remap_iospace() function provided by the PCI core, rather
than the 32-bit ARM-specific pci_ioremap_io().
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Most of the register definitions use lowercase hexadecimal values, with a
few exceptions using uppercase. Convert the latter to be more in line with
the former.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
SR-IOV disabled from the host causes a memory leak. pci-hyperv usually
first receives a PCI_EJECT notification and then proceeds to delete the
hpdev list entry in hv_eject_device_work(). Later in hv_msi_free() since
the device is no longer on the device list hpdev is NULL and hv_msi_free
returns without freeing int_desc as part of hv_int_desc_free().
Signed-off-by: Cathy Avery <cavery@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jake Oshins <jakeo@microsoft.com>
In dra7xx_pcie_init_irq_domain(), the pattern used to check and return
error is:
if (!var) {
dev_err(...);
return PTR_ERR(var);
}
So the returned value in case of error is always 0, which means 'success'.
Change it to return -ENODEV instead.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
In xilinx_pcie_init_irq_domain(), the pattern used to check and return
error is:
if (!var) {
dev_err(...);
return PTR_ERR(var);
}
So the returned value in case of error is always 0, which means 'success'.
Change it to return -ENODEV instead.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Some PCIe devices take a long time to reach link up state after retrain.
Poll for link up status after retraining the link. This is to make sure
the link is up before we access configuration space.
[bhelgaas: changelog]
Signed-off-by: Ley Foon Tan <lftan@altera.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Check the link status before retraining. If the link is not up, don't
bother trying to retrain it.
[bhelgaas: split code move to separate patch, changelog]
Signed-off-by: Ley Foon Tan <lftan@altera.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Move cra_writel(), cra_readl(), and altera_pcie_link_is_up() so a future
patch can use them in altera_pcie_retrain(). No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch. Simplify
checking for the required non-prefetchable memory aperture.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
41534e53786d ("PCI: tegra: Implement a proper resource hierarchy") did two
things:
1) It added a top-level resource that encloses all resources declared in
the DT description, including registers and bridge apertures, and
2) It requested the bridge apertures, which means the PCI core can track
the resources used by PCI devices below the bridge.
The latter is necessary, but the former is questionable because there's no
guarantee that the bridge registers and the apertures are contiguous. In
this example:
# cat /proc/iomem
00000000-3fffffff : /pcie-controller@00003000
00000000-00000fff : /pcie-controller@00003000/pci@1,0
00003000-000037ff : pads
00003800-000039ff : afi
10000000-1fffffff : cs
the resource tree claims that [mem 0x00003a00-0x0fffffff] is consumed by
/pcie-controller@00003000, but it's not mentioned in the DT, and it might
actually be used by other devices.
Remove the top-level resource so we don't claim more than the device
actually consumes.
This reintroduces the problem that we can't match the resources, e.g.,
"pads", "afi", "cs", etc., to the DT device. I think this should be solved
by having the DT core request all resources of all devices in the DT (it
does not do that today). If a driver claims the device, it can request the
resources it uses. For example:
# cat /proc/iomem
00000000-00000fff : /pcie-controller@00003000
00000000-00000fff : /pcie-controller@00003000/pci@1,0
00003000-000037ff : /pcie-controller@00003000
00003000-000037ff : pads
00003800-000039ff : /pcie-controller@00003000
00003800-000039ff : afi
10000000-1fffffff : /pcie-controller@00003000
10000000-1fffffff : cs
...
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary cases and "continue" statements in the switch.
Inline rcar_pcie_release_of_pci_ranges(), which is only called once.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Previously we added a dummy I/O port region even though the R-Car
controller doesn't support PCI port I/O. This resulted in bogus root bus
resources like this:
pci_bus 0000:00: root bus resource [io 0xee080000-0xee0810ff]
pci_bus 0000:00: root bus resource [mem 0xee080000-0xee0810ff]
Drop the unused dummy I/O port region and set struct hw_pci.io_optional so
the ARM PCI code doesn't add a default one for us.
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
We claim PCI BAR and bridge window resources in pci_bus_assign_resources(),
but when PCI_PROBE_ONLY is set, we treat those resources as immutable and
don't call pci_bus_assign_resources(), so the resources aren't put in the
resource tree.
When the resources aren't in the tree, they don't show up in /proc/iomem,
we can't detect conflicts, and we need special cases elsewhere for
PCI_PROBE_ONLY or resources without a parent pointer.
Claim all PCI BAR and window resources in the PCI_PROBE_ONLY case.
If a PCI_PROBE_ONLY platform assigns conflicting resources, Linux can't fix
the conflicts. Previously we didn't notice the conflicts, but now we will,
which may expose new failures.
[bhelgaas: changelog, summarize comment]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Will Deacon <will.deacon@arm.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: David Daney <david.daney@cavium.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch. Remove
unnecessary "goto" statements and label. Simplify checking for the
required non-prefetchable memory aperture.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch. Simplify
checking for the required non-prefetchable memory aperture. Inline
altera_pcie_release_of_pci_ranges(), which is only called once.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use devm_request_pci_bus_resources() to request host bridge window
resources instead of doing it by hand in the driver.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows. If we fail after allocating that list, free it before we
return error.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows. If we fail after allocating that list, free it before we
return error.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.
For example, the following entries did not previously appear in /proc/iomem:
e180000000-e1ffffffff : /soc/pcie@1f2b0000
e180000000-e182ffffff : PCI Bus 0000:01
e180000000-e181ffffff : 0000:01:00.0
e182000000-e1820fffff : 0000:01:00.0
e182100000-e1821fffff : 0000:01:00.0
f000000000-ffffffffff : /soc/pcie@1f2b0000
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows. If we fail after allocating that list, free it before we
return error.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The switch is the only statement in the resource_list_for_each_entry()
loop, so remove unnecessary "continue" statements in the switch.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Request host bridge window resources so they appear in ioport_resource and
iomem_resource and are reflected in /proc/ioports and /proc/iomem.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
of_pci_get_host_bridge_resources() allocates a list of resources for host
bridge windows. If we fail after allocating that list, free it before we
return error.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
When we have an interrupt from the host we have a bit set in event page
indicating there are messages for the particular channel. We need to read
them all as we won't get signaled for what was on the queue before we
cleared the bit in vmbus_on_event(). This applies to all Hyper-V drivers
and the pass-through driver should do the same.
I did not meet any bugs; the issue was found by code inspection. We don't
have many events going through hv_pci_onchannelcallback(), which explains
why nobody reported the issue before.
While on it, fix handling non-zero vmbus_recvpacket_raw() return values by
dropping out. If the return value is not zero, it is wrong to inspect
buffer or bytes_recvd as these may contain invalid data.
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jake Oshins <jakeo@microsoft.com>
We don't free buffer on several code paths in hv_pci_onchannelcallback(),
put kfree() to the end of the function to fix the issue. Direct { kfree();
return; } can now be replaced with a simple 'break';
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jake Oshins <jakeo@microsoft.com>
The PCI_MSI symbol is used inconsistently throughout the tree, with some
drivers using 'select' and others using 'depends on', or using conditional
selects. This keeps causing problems; the latest one is a result of
ARCH_ALPINE using a 'select' statement to enable its platform-specific MSI
driver without enabling MSI:
warning: (ARCH_ALPINE) selects ALPINE_MSI which has unmet direct dependencies (PCI && PCI_MSI)
drivers/irqchip/irq-alpine-msi.c:104:15: error: variable 'alpine_msix_domain_info' has initializer but incomplete type
static struct msi_domain_info alpine_msix_domain_info = {
^~~~~~~~~~~~~~~
drivers/irqchip/irq-alpine-msi.c:105:2: error: unknown field 'flags' specified in initializer
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
^
drivers/irqchip/irq-alpine-msi.c:105:11: error: 'MSI_FLAG_USE_DEF_DOM_OPS' undeclared here (not in a function)
.flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
^~~~~~~~~~~~~~~~~~~~~~~~
There is little reason to enable PCI support for a platform that uses MSI
but then leave MSI disabled at compile time.
Select PCI_MSI from irqchips that implement MSI, and make PCI host bridges
that use MSI on ARM depend on PCI_MSI_IRQ_DOMAIN.
For all three architectures that support PCI_MSI_IRQ_DOMAIN (ARM, ARM64,
X86), enable it by default whenever MSI is enabled.
[bhelgaas: changelog, omit crypto config change]
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
The Axis ARTPEC-6 SoC integrates a PCIe controller from Synopsys. Add a
new driver that provides the small glue needed to use the existing
DesignWare driver to make it work on the Axis ARTPEC-6 SoC.
[bhelgaas: return errors directly without gotos, fold in section mismatch
fix]
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The generic PCI host controller calls of_irq_parse_and_map_pci() in its IRQ
fixup, but that function is only available when CONFIG_IRQ_DOMAIN is set:
drivers/pci/built-in.o: In function `pci_host_common_probe':
drivers/pci/host/pci-host-common.c:181: undefined reference to `of_irq_parse_and_map_pci'
There is no downside in enabling the domains here, so use a Kconfig
select statement to ensure it's always available to this driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Add a parent device field to struct pci_config_window. The parent is not
saved now, but will be useful to save it in some cases. For ACPI on ARM64,
it can be used to setup ACPI companion and domain.
Since the parent dev is in struct pci_config_window now, we need not pass
it to the init function as a separate argument.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
This header will be used from arch/arm64 for ACPI PCI implementation so it
needs to be moved out of drivers/pci.
Update users of the header file to use the new name. No functional
changes.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Here's the big char and misc driver update for 4.7-rc1.
Lots of different tiny driver subsystems have updates here with new
drivers and functionality. Details in the shortlog.
All have been in linux-next with no reported issues for a while.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char / misc driver updates from Greg KH:
"Here's the big char and misc driver update for 4.7-rc1.
Lots of different tiny driver subsystems have updates here with new
drivers and functionality. Details in the shortlog.
All have been in linux-next with no reported issues for a while"
* tag 'char-misc-4.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (125 commits)
mcb: Delete num_cells variable which is not required
mcb: Fixed bar number assignment for the gdd
mcb: Replace ioremap and request_region with the devm version
mcb: Implement bus->dev.release callback
mcb: export bus information via sysfs
mcb: Correctly initialize the bus's device
mei: bus: call mei_cl_read_start under device lock
coresight: etb10: adjust read pointer only when needed
coresight: configuring ETF in FIFO mode when acting as link
coresight: tmc: implementing TMC-ETF AUX space API
coresight: moving struct cs_buffers to header file
coresight: tmc: keep track of memory width
coresight: tmc: make sysFS and Perf mode mutually exclusive
coresight: tmc: dump system memory content only when needed
coresight: tmc: adding mode of operation for link/sinks
coresight: tmc: getting rid of multiple read access
coresight: tmc: allocating memory when needed
coresight: tmc: making prepare/unprepare functions generic
coresight: tmc: splitting driver in ETB/ETF and ETR components
coresight: tmc: cleaning up header file
...
Enumeration
Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger)
Provide common functions for ECAM mapping (Jayachandran C)
Allow all PCIe services on non-ACPI host bridges (Jon Derrick)
Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick)
Widen portdrv service type from 4 bits to 8 bits (Keith Busch)
Add Downstream Port Containment portdrv service type (Keith Busch)
Add Downstream Port Containment driver (Keith Busch)
Resource management
Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson)
Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas)
alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas)
Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava)
Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava)
Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki)
PCI device hotplug
acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter)
Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner)
Virtualization
Mark Intel i40e NIC INTx masking as broken (Alex Williamson)
Reverse standard ACS vs device-specific ACS enabling (Alex Williamson)
Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson)
IOMMU
Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas)
Move informational printk to pci_add_dma_alias() (Bjorn Helgaas)
Add support for multiple DMA aliases (Jacek Lawrynowicz)
Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz)
Thunderbolt
Fix double free of drom buffer (Andreas Noever)
Add Intel Thunderbolt device IDs (Lukas Wunner)
Fix typos and magic number (Lukas Wunner)
Support 1st gen Light Ridge controller (Lukas Wunner)
Generic host bridge driver
Use generic ECAM API (Jayachandran C)
Cavium ThunderX host bridge driver
Don't clobber read-only bits in bridge config registers (David Daney)
Use generic ECAM API (Jayachandran C)
Freescale i.MX6 host bridge driver
Use enum instead of bool for variant indicator (Andrey Smirnov)
Implement reset sequence for i.MX6+ (Andrey Smirnov)
Factor out ref clock enable (Bjorn Helgaas)
Add initial imx6sx support (Christoph Fritz)
Add reset-gpio-active-high boolean property to DT (Petr Štetiar)
Add DT property for link gen, default to Gen1 (Tim Harvey)
dts: Specify imx6qp version of PCIe core (Andrey Smirnov)
dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar)
Marvell Armada host bridge driver
add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni)
Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni)
Marvell MVEBU host bridge driver
Constify mvebu_pcie_pm_ops structure (Jisheng Zhang)
Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang)
Microsoft Hyper-V host bridge driver
Report resources release after stopping the bus (Vitaly Kuznetsov)
Add explicit barriers to config space access (Vitaly Kuznetsov)
Renesas R-Car host bridge driver
Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann)
Synopsys DesignWare host bridge driver
Remove incorrect RC memory base/limit configuration (Gabriele Paoloni)
Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang)
TI Keystone host bridge driver
Add error IRQ handler (Murali Karicheri)
Remove unnecessary goto statement (Murali Karicheri)
Miscellaneous
Fix spelling errors (Colin Ian King)
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Merge tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"Enumeration:
- Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger)
- Provide common functions for ECAM mapping (Jayachandran C)
- Allow all PCIe services on non-ACPI host bridges (Jon Derrick)
- Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick)
- Widen portdrv service type from 4 bits to 8 bits (Keith Busch)
- Add Downstream Port Containment portdrv service type (Keith Busch)
- Add Downstream Port Containment driver (Keith Busch)
Resource management:
- Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson)
- Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas)
- alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas)
- Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava)
- Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava)
- Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki)
PCI device hotplug:
- acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter)
- Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner)
Virtualization:
- Mark Intel i40e NIC INTx masking as broken (Alex Williamson)
- Reverse standard ACS vs device-specific ACS enabling (Alex Williamson)
- Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson)
IOMMU:
- Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas)
- Move informational printk to pci_add_dma_alias() (Bjorn Helgaas)
- Add support for multiple DMA aliases (Jacek Lawrynowicz)
- Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz)
Thunderbolt:
- Fix double free of drom buffer (Andreas Noever)
- Add Intel Thunderbolt device IDs (Lukas Wunner)
- Fix typos and magic number (Lukas Wunner)
- Support 1st gen Light Ridge controller (Lukas Wunner)
Generic host bridge driver:
- Use generic ECAM API (Jayachandran C)
Cavium ThunderX host bridge driver:
- Don't clobber read-only bits in bridge config registers (David Daney)
- Use generic ECAM API (Jayachandran C)
Freescale i.MX6 host bridge driver:
- Use enum instead of bool for variant indicator (Andrey Smirnov)
- Implement reset sequence for i.MX6+ (Andrey Smirnov)
- Factor out ref clock enable (Bjorn Helgaas)
- Add initial imx6sx support (Christoph Fritz)
- Add reset-gpio-active-high boolean property to DT (Petr Štetiar)
- Add DT property for link gen, default to Gen1 (Tim Harvey)
- dts: Specify imx6qp version of PCIe core (Andrey Smirnov)
- dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar)
Marvell Armada host bridge driver:
- add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni)
- Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni)
Marvell MVEBU host bridge driver:
- Constify mvebu_pcie_pm_ops structure (Jisheng Zhang)
- Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang)
Microsoft Hyper-V host bridge driver:
- Report resources release after stopping the bus (Vitaly Kuznetsov)
- Add explicit barriers to config space access (Vitaly Kuznetsov)
Renesas R-Car host bridge driver:
- Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann)
Synopsys DesignWare host bridge driver:
- Remove incorrect RC memory base/limit configuration (Gabriele Paoloni)
- Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang)
TI Keystone host bridge driver:
- Add error IRQ handler (Murali Karicheri)
- Remove unnecessary goto statement (Murali Karicheri)
Miscellaneous:
- Fix spelling errors (Colin Ian King)"
* tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits)
PCI: Disable all BAR sizing for devices with non-compliant BARs
x86/PCI: Mark Broadwell-EP Home Agent 1 as having non-compliant BARs
PCI: Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs
PCI, of: Move PCI I/O space management to PCI core code
PCI: generic, thunder: Use generic ECAM API
PCI: Provide common functions for ECAM mapping
PCI: hv: Add explicit barriers to config space access
PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit
PCI: Add Downstream Port Containment driver
PCI: Add Downstream Port Containment portdrv service type
PCI: Widen portdrv service type from 4 bits to 8 bits
PCI: designware: Remove incorrect RC memory base/limit configuration
PCI: hv: Report resources release after stopping the bus
ARM: dts: imx6qp: Specify imx6qp version of PCIe core
PCI: imx6: Implement reset sequence for i.MX6+
PCI: imx6: Use enum instead of bool for variant indicator
PCI: thunder: Don't clobber read-only bits in bridge config registers
thunderbolt: Fix double free of drom buffer
PCI: rcar: Select PCI_MSI_IRQ_DOMAIN
PCI: armada: Add driver for Marvell Armada 7K/8K PCIe controller
...
Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons. For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to
get done.
Finally, reset controller handling as always gets merged through here
as well.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons.
For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to get
done.
Finally, reset controller handling as always gets merged through here
as well"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
arm-ccn: Enable building as module
soc/tegra: pmc: Add generic PM domain support
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
drivers: firmware: psci: make two helper functions inline
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
...
As usual, a bunch of commits, mostly adding drivers and other options to
defconfigs.
We are adding three new defconfig files for the newly added 32-bit
machines (aspeed and mps2), the rest is mainly housekeeping.
The changes outside of arch/arm/config/ are for a Kconfig symbol
that got renamed.
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Merge tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC defconfig updates from Arnd Bergmann:
"As usual, a bunch of commits, mostly adding drivers and other options
to defconfigs.
We are adding three new defconfig files for the newly added 32-bit
machines (aspeed and mps2), the rest is mainly housekeeping.
The changes outside of arch/arm/config/ are for a Kconfig symbol that
got renamed"
* tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (63 commits)
ARM: aspeed: adapt defconfigs for new CONFIG_PRINTK_TIME
ARM: u8500_defconfig: update sensor config
ARM: u8500_defconfig: remove staging from defconfig
ARM: multi_v7_defconfig: Remove unused Kconfig option MACH_UX500_DT
ARM: at91/defconfig: sama5: add CONFIG_FHANDLE
arm/configs: Add Aspeed defconfig
arm/configs/multi_v5: Add Aspeed ast2400
ARM: at91: sama5: Update defconfig
ARM: imx_v6_v7_defconfig: add CONFIG_MICREL_PHY
ARM: imx_v6_v7_defconfig: add CONFIG_I2C_GPIO
ARM: multi_v7: Enable Tegra XUSB controller in defconfig
ARM: tegra: Enable XUSB controller in defconfig
ARM: omap2plus_defconfig: Enable PWM and ir-rx51 as loadable modules
ARM: multi_v7_defconfig: add the Atmel sama5d2-compatible ADC driver
ARM: multi_v7_defconfig: add the Atmel Audio microphone interface PDMIC
ARM: multi_v7_defconfig: add Atmel ISI (Image Sensor Interface) driver
ARM: multi_v7_defconfig: add Atmel watchdog timers
ARM: multi_v7_defconfig: add HLCDC drivers as modules
ARM: at91/defconfig: add PDMIC driver to sama5_defconfig
ARM: at91/defconfig: add HLCDC driver to sama5_defconfig
...
* pci/arm64:
PCI, of: Move PCI I/O space management to PCI core code
PCI: generic, thunder: Use generic ECAM API
PCI: Provide common functions for ECAM mapping
* pci/host-hv:
PCI: hv: Add explicit barriers to config space access
