5 Commits

Author	SHA1	Message	Date
Linus Walleij	e3aeca1d74	ARM: dts: add PCI to the Gemini device trees ... The Cortina Gemini has an internal PCI root bus, add this to the device tree, and add interrupt mapping (swizzling) to the relevant systems device trees. Cc: Janos Laube <janos.dev@gmail.com> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Feng-Hsin Chiang <john453@faraday-tech.com> Cc: Greentime Hu <green.hu@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2017-03-24 19:08:03 +01:00
Linus Walleij	552c804afe	ARM: dts: augment Gemini GPIO nodes ... The binding should state "cortina,gemini-gpio", "faraday,ftgpio010" stating the full name of the IP part. Cc: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2017-03-22 12:13:29 +01:00
Linus Walleij	e9f2c2aeb5	ARM: dts: add power controller to the Gemini DTS ... This adds the Gemini power controller to the SoC DTSI file. Cc: Janos Laube <janos.dev@gmail.com> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2017-03-18 21:56:32 +01:00
Linus Walleij	6ae4d211ab	ARM: dts: add watchdog to the Gemini ... This adds watchdog support to the Gemini SoC DTSI file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2017-03-12 12:18:29 +01:00
Linus Walleij	9be0d7f87e	ARM: dts: add device tree for Gemini SoC and SQ201 ... This adds a device tree for the Gemini SoC and the ITian Square One SQ201 board that has been my testing target for Gemini device tree support. Cc: Janos Laube <janos.dev@gmail.com> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2017-03-12 12:18:04 +01:00