817 Commits

Author	SHA1	Message	Date
Stephen Boyd	a339bdf64a	Merge branches 'clk-stratix10', 'clk-imx', 'clk-bcm', 'clk-cs2000' and 'clk-imx6sll' into clk-next ... * clk-stratix10: clk: socfpga: stratix10: add clock driver for Stratix10 platform dt-bindings: documentation: add clock bindings information for Stratix10 * clk-imx: clk: imx7d: Move clks_init_on before any clock operations clk: imx7d: Correct ahb clk parent select clk: imx7d: Correct dram pll type clk: imx7d: Add USB clock information clk: imx: pllv2: avoid using uninitialized values clk: imx6ull: Add epdc_podf instead of sim_podf clk: imx: imx7d: correct video pll clock tree clk: imx: imx7d: add the Keypad Port module clock clk: imx7d: add CAAM clock clk: imx: imx7d: add the snvs clock clk: imx: imx6sx: update cko mux options * clk-bcm: clk: bcm2835: De-assert/assert PLL reset signal when appropriate * clk-cs2000: clk: cs2000: set pm_ops in hibernate-compatible way * clk-imx6sll: clk: imx: add clock driver for imx6sll dt-bindings: imx: update clock doc for imx6sll clk: imx: add new gate/gate2 wrapper funtion clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux	2018-04-06 13:22:12 -07:00
Stephen Boyd	a83fdfae5a	Merge branches 'clk-davinci', 'clk-si544', 'clk-rockchip', 'clk-uniphier' and 'clk-ti-flag-fix' into clk-next ... * clk-davinci: clk: davinci: Remove redundant dev_err calls clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks clk: davinci: New driver for TI DA8XX CFGCHIP clocks dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks clk: davinci: Add platform information for TI DM646x PSC clk: davinci: Add platform information for TI DM644x PSC clk: davinci: Add platform information for TI DM365 PSC clk: davinci: Add platform information for TI DM355 PSC clk: davinci: Add platform information for TI DA850 PSC clk: davinci: Add platform information for TI DA830 PSC clk: davinci: New driver for davinci PSC clocks dt-bindings: clock: New bindings for TI Davinci PSC clk: davinci: Add platform information for TI DM646x PLL clk: davinci: Add platform information for TI DM644x PLL clk: davinci: Add platform information for TI DM365 PLL clk: davinci: Add platform information for TI DM355 PLL clk: davinci: Add platform information for TI DA850 PLL clk: davinci: Add platform information for TI DA830 PLL clk: davinci: New driver for davinci PLL clocks dt-bindings: clock: Add new bindings for TI Davinci PLL clocks * clk-si544: clk: Add driver for the si544 clock generator chip * clk-rockchip: clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399 clk: rockchip: Fix error return in phase clock registration clk: rockchip: Correct the behaviour of restoring cached phase clk: rockchip: Fix wrong parents for MMC phase clock for rk3328 clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 clk: rockchip: Add 1.6GHz PLL rate for rk3399 clk: rockchip: Restore the clock phase after the rate was changed clk: rockchip: Prevent calculating mmc phase if clock rate is zero clk: rockchip: Free the memory on the error path clk: rockchip: document hdmi_phy external input for rk3328 clk: rockchip: add flags for rk3328 dclk_lcdc clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks clk: rockchip: protect all remaining rk3328 interconnect clocks clk: rockchip: export sclk_hdmi_sfc on rk3328 clk: rockchip: remove HCLK_VIO from rk3328 dt header clk: rockchip: fix hclk_vio_niu on rk3328 * clk-uniphier: clk: uniphier: add additional ethernet clock lines for Pro4 clk: uniphier: add SATA clock control support clk: uniphier: add PCIe clock control support clk: uniphier: add ethernet clock control support for PXs3 clk: uniphier: add Pro4/Pro5/PXs2 audio system clock * clk-ti-flag-fix: clk: ti: fix flag space conflict with clkctrl clocks clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag	2018-04-06 13:22:06 -07:00
Stephen Boyd	b03781920c	Merge branches 'clk-mediatek', 'clk-hisi', 'clk-allwinner', 'clk-ux500' and 'clk-renesas' into clk-next ... * clk-mediatek: clk: mediatek: add audsys support for MT2701 clk: mediatek: add devm_of_platform_populate() for MT7622 audsys dt-bindings: clock: mediatek: add audsys support for MT2701 dt-bindings: clock: mediatek: update audsys documentation to adapt MFD device clk: mediatek: update missing clock data for MT7622 audsys clk: mediatek: fix PWM clock source by adding a fixed-factor clock dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4 * clk-hisi: clk: hisilicon: fix potential NULL dereference in hisi_clk_alloc() clk: hisilicon: mark wdt_mux_p[] as const clk: hisilicon: Mark phase_ops static clk: hi3798cv200: add emmc sample and drive clock clk: hisilicon: add hisi phase clock support clk: hi3798cv200: add COMBPHY0 clock support clk: hi3798cv200: fix define indentation clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK clk: hi3798cv200: correct IR clock parent clk: hi3798cv200: fix unregister call sequence in error path * clk-allwinner: clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU clk: sunxi-ng: add support for the Allwinner H6 CCU dt-bindings: add device tree binding for Allwinner H6 main CCU clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate clk: sunxi-ng: h3: h5: Add minimal rate for video PLL clk: sunxi-ng: Add check for minimal rate to NM PLLs clk: sunxi-ng: Use u64 for calculation of nkmp rate clk: sunxi-ng: Mask nkmp factors when setting register clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig name * clk-ux500: clk: ux500: Drop AB8540/9540 support * clk-renesas: (27 commits) clk: renesas: cpg-mssr: Adjust r8a77980 ifdef clk: renesas: rcar-gen3: Always use readl()/writel() clk: renesas: sh73a0: Always use readl()/writel() clk: renesas: rza1: Always use readl()/writel() clk: renesas: rcar-gen2: Always use readl()/writel() clk: renesas: r8a7740: Always use readl()/writel() clk: renesas: r8a73a4: Always use readl()/writel() clk: renesas: mstp: Always use readl()/writel() clk: renesas: div6: Always use readl()/writel() clk: fix false-positive Wmaybe-uninitialized warning clk: renesas: r8a77965: Replace DU2 clock clk: renesas: cpg-mssr: Add support for R-Car M3-N clk: renesas: cpg-mssr: add R8A77980 support dt-bindings: clock: add R8A77980 CPG core clock definitions clk: renesas: r8a7792: Add rwdt clock clk: renesas: r8a7794: Add rwdt clock clk: renesas: r8a7791/r8a7793: Add rwdt clock clk: renesas: r8a7790: Add rwdt clock clk: renesas: r8a7745: Add rwdt clock clk: renesas: r8a7743: Add rwdt clock ...	2018-04-06 13:21:57 -07:00
Stephen Boyd	e8121d9867	Merge branches 'clk-spreadtrum', 'clk-stm32f', 'clk-stm32mp1', 'clk-hi655x' and 'clk-gpio' into clk-next ... * clk-spreadtrum: clk: sprd: add RTC gate for SC9860 dt-bindings: clocks: add APB RTC gate for SC9860 * clk-stm32f: clk: stm32: Add clk entry for SDMMC2 on stm32F769 clk: stm32: Add DSI clock for STM32F469 Board clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK * clk-stm32mp1: clk: stm32: add configuration flags for each of the stm32 drivers clk: stm32mp1: add Debug clocks clk: stm32mp1: add MCO clocks clk: stm32mp1: add RTC clock clk: stm32mp1: add Peripheral & Kernel Clocks clk: stm32mp1: add Kernel timers clk: stm32mp1: add Sub System clocks clk: stm32mp1: add Post-dividers for PLL clk: stm32mp1: add PLL clocks clk: stm32mp1: add Source Clocks for PLLs clk: stm32mp1: add MP1 gate for hse/hsi/csi oscillators clk: stm32mp1: Introduce STM32MP1 clock driver dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings * clk-hi655x: clk: enable hi655x common clk automatically * clk-gpio: clk: clk-gpio: Allow GPIO to sleep in set/get_parent	2018-04-06 13:21:45 -07:00
Bai Ping	0c123a4fbb	dt-bindings: imx: update clock doc for imx6sll ... Add clock binding doc update for imx6sll. Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-04-06 11:27:26 -07:00
Dinh Nguyen	89727949ea	dt-bindings: documentation: add clock bindings information for Stratix10 ... Document that Stratix10 clock bindings, and add the clock header file. The clock header is an enumeration of all the different clocks on the Stratix10 platform. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-04-06 09:54:59 -07:00
Mike Looijmans	953cc3e811	clk: Add driver for the si544 clock generator chip ... This patch adds the driver and devicetree documentation for the Silicon Labs SI544 clock generator chip. This is an I2C controlled oscillator capable of generating clock signals ranging from 200kHz to 1500MHz. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> [sboyd: assign max_freq to 0 in is_valid_frequency() to squelch warning] Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-03-23 10:05:25 -07:00
David Lechner	0c92c71770	dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks ... This adds a new binding for the clocks present in the CFGCHIP syscon registers in TI DA8XX SoCs. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-03-20 10:16:26 -07:00
David Lechner	21cdf7269f	dt-bindings: clock: New bindings for TI Davinci PSC ... This adds a new binding for the Power Sleep Controller (PSC) for the mach-davinci family of processors. Note: Although TI Keystone has a very similar PSC, we are not using the existing bindings. Keystone is using a legacy one-node-per-clock binding (actually two nodes if you count the separate reset binding for the same IP block). Also, some davinci LPSCs have quirks that aren't handled by the keystone bindings, so we would be adding one compatible string per clock with quirks instead of just a new compatible string for each controller. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-03-20 10:16:26 -07:00
David Lechner	b6e37ce237	dt-bindings: clock: Add new bindings for TI Davinci PLL clocks ... This adds a new binding for the PLL IP blocks in the mach-davinci family of processors. Currently, only da850 has device tree support but these bindings can also work for other SoCs in this family just by adding new compatible strings. Note: Although these PLL controllers are very similar to the TI Keystone SoCs, we are not re-using those bindings. The Keystone bindings use a legacy one-node-per-clock binding. Furthermore, the mach-davinici SoCs have a slightly different PLL register layout and a number of quirks that can't be handled by the existing bindings, so the keystone bindings could not be used as-is anyway. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-03-20 09:33:08 -07:00
Icenowy Zheng	2e08e4d2ff	dt-bindings: add device tree binding for Allwinner H6 main CCU ... The Allwinner H6 main CCU uses the internal oscillator of the SoC, which is different with old SoCs' main CCU. Add device tree binding for the Allwinner H6 main CCU. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>	2018-03-18 21:16:59 +01:00
Gabriel Fernandez	605add0c7b	dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings ... The RCC block is responsible of the management of the clock and reset generation for the complete circuit. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com>	2018-03-11 15:40:32 -07:00
Tero Kristo	be02637f6b	dt-bindings: clock: ti: add latching support to mux and divider clocks ... Certain hardware configurations, like dra76x, have some of the clock registers partitioned in a funky manner that requires the clock control setup to be latched for PRCM to be notified of the change. This is accomplished with a separate control bit under the register. Add support for this clock latching support to divider and mux clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reviewed-by: Rob Herring <robh@kernel.org>	2018-03-08 11:42:04 +02:00
Jacopo Mondi	7ce36da900	clk: renesas: cpg-mssr: Add support for R-Car M3-N ... Initial support for R-Car M3-N (r8a77965), including core and module clocks. Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.80, Oct 31, 2017)". Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>	2018-02-26 09:13:29 +01:00
Sergei Shtylyov	ce15783c51	clk: renesas: cpg-mssr: add R8A77980 support ... Add R-Car V3H (R8A77980) Clock Pulse Generator / Module Standby and Software Reset support, using the CPG/MSSR driver core and the common R-Car Gen3 code. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>	2018-02-20 13:39:07 +01:00
Heiko Stuebner	dd5bdb797f	clk: rockchip: document hdmi_phy external input for rk3328 ... The hdmi-phy block inside the soc also loops its pll output back into the clock controller, so document that already used input clock. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Rob Herring <robh@kernel.org>	2018-02-12 15:00:58 +01:00
Linus Torvalds	3879ae653a	The core framework has a handful of patches this time around, mostly due ... to the clk rate protection support added by Jerome Brunet. This feature will allow consumers to lock in a certain rate on the output of a clk so that things like audio playback don't hear pops when the clk frequency changes due to shared parent clks changing rates. Currently the clk API doesn't guarantee the rate of a clk stays at the rate you request after clk_set_rate() is called, so this new API will allow drivers to express that requirement. Beyond this, the core got some debugfs pretty printing patches and a couple minor non-critical fixes. Looking outside of the core framework diff we have some new driver additions and the removal of a legacy TI clk driver. Both of these hit high in the dirstat. Also, the removal of the asm-generic/clkdev.h file causes small one-liners in all the architecture Kbuild files. Overall, the driver diff seems to be the normal stuff that comes all the time to fix little problems here and there and to support new hardware. Core: - Clk rate protection - Symbolic clk flags in debugfs output - Clk registration enabled clks while doing bookkeeping updates New Drivers: - Spreadtrum SC9860 - HiSilicon hi3660 stub - Qualcomm A53 PLL, SPMI clkdiv, and MSM8916 APCS - Amlogic Meson-AXG - ASPEED BMC Removed Drivers: - TI OMAP 3xxx legacy clk (non-DT) support - asm*/clkdev.h got removed (not really a driver) Updates: - Renesas FDP1-0 module clock on R-Car M3-W - Renesas LVDS module clock on R-Car V3M - Misc fixes to pr_err() prints - Qualcomm MSM8916 audio fixes - Qualcomm IPQ8074 rounded out support for more peripherals - Qualcomm Alpha PLL variants - Divider code was using container_of() on bad pointers - Allwinner DE2 clks on H3 - Amlogic minor data fixes and dropping of CLK_IGNORE_UNUSED - Mediatek clk driver compile test support - AT91 PMC clk suspend/resume restoration support - PLL issues fixed on si5351 - Broadcom IProc PLL calculation updates - DVFS support for Armada mvebu CPU clks - Allwinner fixed post-divider support - TI clkctrl fixes and support for newer SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJac5vRAAoJEK0CiJfG5JUlUaIP/Riq0tbApfc4k4GMvSvaieR/ AwZFIMCxOxO+KGdUsBWj7UUoDfBYmxyknHZkVUA/m+Lm7cRH/YHHMghEceZLaBYW zPQmDfkTl/QkwysXZMCw9vg4vO0tt5gWbHljQnvVhxVVTCkIRpaE8Vkktj1RZzpY WU/TkvPbVGY3SNm504TRXKWC9KpMTEXVvzqlg6zLDJ/jE7PGzBKtewqMoLDCBH2L q6b50BSXDo2Hep0vm6e5xneXKjLNR4kgN4PkbM4Yoi4iWLLbgAu79NfyOvvr/imS HxOHRms9tejtyaiR6bQSF0pbLOERZ3QSbMFEbxdxnCTuPEfy3Nw/2W7mNJlhJa8g EGLMnLL4WdloL4Z83dAcMrj9OmxYf7Yobf5dMidLrQT5EYuafdj0ParbI8TQpWSB eTqaffSUGPE/7xuKouYBcbvocpXXWCcokrP/mEn3OEHXkIeeut1Jd3RmEvsi3gtJ pNraJTIpvt4c05rj6yLUOhWfyqlA+fH3p4Fx3rrH1tmKEiG+lrhKoxF26uALZe0V OvarhG+LPIE10pCIYlQjZjQVnYLGCxsGAIoK1uz7VYvFPh2T0cxQlzzeqFgrlTyN 32hMj3LhkQw82FG9xZqjTX1935R35mySRlx63x7HStI1YFief2X9+RHjJR/lofG0 nC0JWTp5sC/pKf54QBXj =bGPp -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The core framework has a handful of patches this time around, mostly due to the clk rate protection support added by Jerome Brunet. This feature will allow consumers to lock in a certain rate on the output of a clk so that things like audio playback don't hear pops when the clk frequency changes due to shared parent clks changing rates. Currently the clk API doesn't guarantee the rate of a clk stays at the rate you request after clk_set_rate() is called, so this new API will allow drivers to express that requirement. Beyond this, the core got some debugfs pretty printing patches and a couple minor non-critical fixes. Looking outside of the core framework diff we have some new driver additions and the removal of a legacy TI clk driver. Both of these hit high in the dirstat. Also, the removal of the asm-generic/clkdev.h file causes small one-liners in all the architecture Kbuild files. Overall, the driver diff seems to be the normal stuff that comes all the time to fix little problems here and there and to support new hardware. Summary: Core: - Clk rate protection - Symbolic clk flags in debugfs output - Clk registration enabled clks while doing bookkeeping updates New Drivers: - Spreadtrum SC9860 - HiSilicon hi3660 stub - Qualcomm A53 PLL, SPMI clkdiv, and MSM8916 APCS - Amlogic Meson-AXG - ASPEED BMC Removed Drivers: - TI OMAP 3xxx legacy clk (non-DT) support - asm*/clkdev.h got removed (not really a driver) Updates: - Renesas FDP1-0 module clock on R-Car M3-W - Renesas LVDS module clock on R-Car V3M - Misc fixes to pr_err() prints - Qualcomm MSM8916 audio fixes - Qualcomm IPQ8074 rounded out support for more peripherals - Qualcomm Alpha PLL variants - Divider code was using container_of() on bad pointers - Allwinner DE2 clks on H3 - Amlogic minor data fixes and dropping of CLK_IGNORE_UNUSED - Mediatek clk driver compile test support - AT91 PMC clk suspend/resume restoration support - PLL issues fixed on si5351 - Broadcom IProc PLL calculation updates - DVFS support for Armada mvebu CPU clks - Allwinner fixed post-divider support - TI clkctrl fixes and support for newer SoCs" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (125 commits) clk: aspeed: Handle inverse polarity of USB port 1 clock gate clk: aspeed: Fix return value check in aspeed_cc_init() clk: aspeed: Add reset controller clk: aspeed: Register gated clocks clk: aspeed: Add platform driver and register PLLs clk: aspeed: Register core clocks clk: Add clock driver for ASPEED BMC SoCs clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built clk: fix reentrancy of clk_enable() on UP systems clk: meson-axg: fix potential NULL dereference in axg_clkc_probe() clk: Simplify debugfs registration clk: Fix debugfs_create_*() usage clk: Show symbolic clock flags in debugfs clk: renesas: r8a7796: Add FDP clock clk: Move __clk_{get,put}() into private clk.h API clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks clk: Improve flags doc for of_clk_detect_critical() arch: Remove clkdev.h asm-generic from Kbuild clk: sunxi-ng: a83t: Add M divider to TCON1 clock clk: Prepare to remove asm-generic/clkdev.h ...	2018-02-01 16:56:07 -08:00
Linus Torvalds	537433b624	ARM: SoC device tree updates for 4.16 ... We get a moderate number of new machines this time, and only one new SoC variant (Actions S700): Actions: S700 Soc and CubieBoard7 development board Allo.com Sparky Single-board-computer Allwinner: Orange Pi R1 development board Libre Computer Board ALL-H3-CC H3 single-board computer ASpeed ast2x00: Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500 Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500 Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400 AT91: Axentia Nattis/Natte digital signage sama5d2 PTC-ek Evaluation board Freescale/NXP i.MX: SolidRun Humminboard2 development board Variscite DART-MX6 SoM and Carrier-board Technologic TS-4600 and TS-7970 development board Toradex Colibri iMX7D SoM board v1.5 variant of Solidrun Cubox-i and Hummingboard Freescale/NXP Layerscape: Moxa UC-8410A Series industrial computer Gemini: D-Link DNS-313 NAS enclosure OMAP: LogicPD OMAP35xx SOM-LV devkit LogicPD OMAP35xx Torpedo devkit Renesas: r8a77970 (V3M) Starter Kit board r8a7795 (M3-W) Salvator-XS board We finally managed to get the dtc warnings under control, with no more build-time warnings for bad device tree files. This includes fixes for the majority of platforms, including nomadik, samsung, lpc32xx, STi, spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood, renesas, hisilicon, and broadcom. Files get rearranged on a few platforms, in particular the Marvell Armada 7K/8K device tree files are changed in preparation for future SoC support, based on more than two of the same chips in one package, and some boards get renamed for oxnas for consistency. Finally, many existing SoCs gain descriptions for additional on-chip devices that we can now support with kernel drivers: Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG) Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi) Aspeed clk controller support Freescale LS1088A, LS1021A device support Gemini Ethernet, PCI, TVE, panel Keystone gpio, qspi, more uarts Mediatek cpufreq, regulator, clock, reset Marvell thermal, cpufreq, nand Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu Rockchip Mipi, GPU, display Samsung Exynos5433 PMU, power domain, nfc Spreadtrum: sc9860 clocks Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ... -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJac0fiAAoJEGCrR//JCVInGUYP/ikTcjrmtQxmMINdsy88gmN3 lPk3jGoViyRzc9Y6hGUUXn1YNdK8+IqRkqLnhtVX3cOLS5pP2HwsvSgPmSSB3eQe NOhXUNRQaTbeS/eBGZxJbxEKSowQHU+43M2kRNQOht7UQzS8NnBj/1RGaxcFyNSw gIixWDZLgVTNCSloPaSrZmiwSa7rSM2q0ncBzzeafAZiTRNeOb6IUpnqu/n0Qnot er6VoEyxp6ThFqRB7O8bCAIwgqlyB9xSGBPNR/JI0e0xXo3KVE/2AjHYDHVP/Ttx X8vtb3m+RED7tX4oCmlrHb1SAAKpNi1Vzdg4PxmKCa7yb5xPog7OEr3rnpijzCL0 y8IJLlVSPyx31yB7mIIzCjrcISrT7tOXp0ha88/NgNsGXw5Ln0GVEqTkmSrz/JWo z1G2tNwnstS64KK+chHOZfUto4Rzbrpmr9L1ziKIpSQtiNyOmiSu1c3EjHim7x4I Mfiv6+8J71faUYuKVK1oaX0gi43oSZHu4NuniQy8dg/OIpgPpHHpG1qCyAzgC6Pa r1Am2w33CXrJI78b4zG2pIDx0HghIjFUtjX9tijoFiMs1EZgbV6cJ2meep6Sy+XV RBxHXPU8obdcuBfhgjEygwLI0HSe0R78B15qPP/SNxAFeAvE950xfPrGAoZg7qo/ o6B2iQSfsYQJbD8rUHaA =qN1F -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates from Arnd Bergmann: "We get a moderate number of new machines this time, and only one new SoC variant (Actions S700): Actions: - S700 Soc and CubieBoard7 development board - Allo.com Sparky Single-board-computer Allwinner: - Orange Pi R1 development board - Libre Computer Board ALL-H3-CC H3 single-board computer ASpeed ast2x00: - Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500 - Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500 - Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400 AT91: - Axentia Nattis/Natte digital signage - sama5d2 PTC-ek Evaluation board Freescale/NXP i.MX: - SolidRun Humminboard2 development board - Variscite DART-MX6 SoM and Carrier-board - Technologic TS-4600 and TS-7970 development board - Toradex Colibri iMX7D SoM board - v1.5 variant of Solidrun Cubox-i and Hummingboard Freescale/NXP Layerscape: - Moxa UC-8410A Series industrial computer Gemini: - D-Link DNS-313 NAS enclosure OMAP: - LogicPD OMAP35xx SOM-LV devkit - LogicPD OMAP35xx Torpedo devkit Renesas: - r8a77970 (V3M) Starter Kit board - r8a7795 (M3-W) Salvator-XS board We finally managed to get the dtc warnings under control, with no more build-time warnings for bad device tree files. This includes fixes for the majority of platforms, including nomadik, samsung, lpc32xx, STi, spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood, renesas, hisilicon, and broadcom. Files get rearranged on a few platforms, in particular the Marvell Armada 7K/8K device tree files are changed in preparation for future SoC support, based on more than two of the same chips in one package, and some boards get renamed for oxnas for consistency. Finally, many existing SoCs gain descriptions for additional on-chip devices that we can now support with kernel drivers: - Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG) - Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi) - Aspeed clk controller support - Freescale LS1088A, LS1021A device support - Gemini Ethernet, PCI, TVE, panel - Keystone gpio, qspi, more uarts - Mediatek cpufreq, regulator, clock, reset - Marvell thermal, cpufreq, nand - Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu - Rockchip Mipi, GPU, display - Samsung Exynos5433 PMU, power domain, nfc - Spreadtrum: sc9860 clocks - Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ..." * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (690 commits) arm64: dts: stratix10: fix SPI settings ARM: dts: socfpga: add i2c reset signals arm64: dts: stratix10: add USB ECC reset bit arm64: dts: stratix10: enable USB on the devkit ARM: dts: socfpga: disable over-current for Arria10 USB devkit ARM: dts: Nokia N9: add support for up/down keys in the dts ARM: dts: nomadik: add interrupt-parent for clcd ARM: dts: Add ethernet to a bunch of platforms ARM: dts: Add ethernet to the Gemini SoC ARM: dts: rename oxnas dts files ARM: dts: s5pv210: add interrupt-parent for ohci ARM: lpc3250: fix uda1380 gpio numbers ARM: dts: STi: Add gpio polarity for "hdmi,hpd-gpio" property ARM: dts: dra7: Reduce shut down temperature of non-cpu thermal zones ARM: dts: n900: Add aliases for lcd and tvout displays ARM: dts: Update ti-sysc data for existing users ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance arm64: dts: marvell: armada-80x0: Fix pinctrl compatible string arm: spear13xx: Fix spics gpio controller's warning arm: spear13xx: Fix dmas cells ...	2018-02-01 16:07:54 -08:00
Stephen Boyd	c43a52cfd2	Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner' into clk-next ... * clk-aspeed: clk: aspeed: Handle inverse polarity of USB port 1 clock gate clk: aspeed: Fix return value check in aspeed_cc_init() clk: aspeed: Add reset controller clk: aspeed: Register gated clocks clk: aspeed: Add platform driver and register PLLs clk: aspeed: Register core clocks clk: Add clock driver for ASPEED BMC SoCs dt-bindings: clock: Add ASPEED constants * clk-lock-UP: clk: fix reentrancy of clk_enable() on UP systems * clk-mediatek: clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being built clk: mediatek: Fix all warnings for missing struct clk_onecell_data clk: mediatek: fixup test-building of MediaTek clock drivers clk: mediatek: group drivers under indpendent menu * clk-allwinner: clk: sunxi-ng: a83t: Add M divider to TCON1 clock clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU clk: sunxi-ng: add support for Allwinner H3 DE2 CCU dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3 clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLL clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLL clk: sunxi-ng: Support fixed post-dividers on NM style clocks clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks clk: sunxi-ng: Support fixed post-dividers on MP style clocks clk: sunxi: Use PTR_ERR_OR_ZERO()	2018-01-26 16:43:39 -08:00
Stephen Boyd	4d1d13a5ae	Merge branches 'clk-remove-asm-clkdev', 'clk-debugfs-fixes', 'clk-renesas' and 'clk-meson' into clk-next ... * clk-remove-asm-clkdev: clk: Move __clk_{get,put}() into private clk.h API clk: sunxi: Use CLK_IS_CRITICAL flag for critical clks arch: Remove clkdev.h asm-generic from Kbuild clk: Prepare to remove asm-generic/clkdev.h blackfin: Use generic clkdev.h header * clk-debugfs-fixes: clk: Simplify debugfs registration clk: Fix debugfs_create_*() usage clk: Show symbolic clock flags in debugfs clk: Improve flags doc for of_clk_detect_critical() * clk-renesas: clk: renesas: r8a7796: Add FDP clock clk: renesas: cpg-mssr: Keep wakeup sources active during system suspend clk: renesas: mstp: Keep wakeup sources active during system suspend clk: renesas: r8a77970: Add LVDS clock * clk-meson: clk: meson-axg: fix potential NULL dereference in axg_clkc_probe() clk: meson-axg: make local symbol axg_gp0_params_table static clk: meson-axg: fix return value check in axg_clkc_probe() clk: meson: mpll: use 64-bit maths in params_from_rate clk: meson-axg: add clock controller drivers clk: meson-axg: add clocks dt-bindings required header dt-bindings: clock: add compatible variant for the Meson-AXG clk: meson: make the spinlock naming more specific clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocks clk: meson: gxbb: fix wrong clock for SARADC/SANA	2018-01-26 16:43:32 -08:00
Stephen Boyd	0003046477	Merge branches 'clk-iproc', 'clk-mvebu' and 'clk-qcom-a53' into clk-next ... * clk-iproc: clk: iproc: Minor tidy up of iproc pll data structures clk: iproc: Allow plls to do minor rate changes without reset clk: iproc: Fix error in the pll post divider rate calculation clk: iproc: Allow iproc pll to runtime calculate vco parameters * clk-mvebu: clk: mvebu: armada-37xx-periph: Use PTR_ERR_OR_ZERO() * clk-qcom-a53: clk: qcom: Add APCS clock controller support clk: qcom: Add regmap mux-div clocks support clk: qcom: Add A53 PLL support	2018-01-26 16:41:58 -08:00
Stephen Boyd	a2c09c12d4	Merge branches 'clk-at91', 'clk-imx7ulp', 'clk-axigen', 'clk-si5351' and 'clk-pxa' into clk-next ... * clk-at91: clk: at91: pmc: Support backup for programmable clocks clk: at91: pmc: Save SCSR during suspend clk: at91: pmc: Wait for clocks when resuming * clk-imx7ulp: clk: Don't touch hardware when reparenting during registration * clk-axigen: clk: axi-clkgen: Round closest in round_rate() and recalc_rate() clk: axi-clkgen: Correctly handle nocount bit in recalc_rate() * clk-si5351: clk: si5351: _si5351_clkout_reset_pll() can be static clk: si5351: Do not enable parent clocks on probe clk: si5351: Rename internal plls to avoid name collisions clk: si5351: Apply PLL soft reset before enabling the outputs clk: si5351: Add DT property to enable PLL reset clk: si5351: implement remove handler * clk-pxa: clk: pxa: unbreak lookup of CLK_POUT	2018-01-26 16:41:52 -08:00
Stephen Boyd	21170e3bda	Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and 'clk-qcom-ipq8074' into clk-next ... * clk-spreadtrum: clk: sprd: add clocks support for SC9860 clk: sprd: Add dt-bindings include file for SC9860 dt-bindings: Add Spreadtrum clock binding documentation clk: sprd: add adjustable pll support clk: sprd: add composite clock support clk: sprd: add divider clock support clk: sprd: add mux clock support clk: sprd: add gate clock support clk: sprd: Add common infrastructure clk: move clock common macros out from vendor directories * clk-mvebu-dvfs: clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS clk: mvebu: armada-37xx-periph: cosmetic changes * clk-qoriq: clk: qoriq: add more divider clocks support * clk-imx: clk: imx51: uart4, uart5 gates only exist on imx50, imx53 * clk-qcom-ipq8074: clk: qcom: ipq8074: add misc resets for PCIE and NSS dt-bindings: clock: qcom: add misc resets for PCIE and NSS clk: qcom: ipq8074: add GP and Crypto clocks clk: qcom: ipq8074: add NSS ethernet port clocks clk: qcom: ipq8074: add NSS clocks clk: qcom: ipq8074: add PCIE, USB and SDCC clocks clk: qcom: ipq8074: add remaining PLL’s dt-bindings: clock: qcom: add remaining clocks for IPQ8074 clk: qcom: ipq8074: fix missing GPLL0 divider width clk: qcom: add parent map for regmap mux clk: qcom: add read-only divider operations	2018-01-26 16:41:47 -08:00
Olof Johansson	ba05173afe	Another round of 64-bit DT changes for the new Amlogic SoCs. These ... include IR, SPI and ethernet MAC support for the new AXG family SoCs. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlpQC6wACgkQWTcYmtP7 xmVazBAAh/riNhKvUEoHCa1TQ8f0ELfGkZ7ckOBtTEBE9DoQQXZ08jU+LwEEy1N3 /5Uby3lquAYZiJzMuXfaJ63V+07OzIDt9hYzFBToMPf2ZLxSyGS8ZTWsUveBRXep tAY8ETtK8u3tq1pQH0A5lGc84yR8MM74We91GwuCA4S6whYqVbO1dInSb0mVqX50 vVKChc+jUgXwy4zaazgSUKcjZmexSCF7zA9ZXnGM3wg3s4K3HhzLZwCm30GU30mC Of5uCT02cR+HkRC1fDfo3mY9oRr19krYz9hJIsMk3mnmQS0XeI+HJ1DX+5K8l4YP 2ayVueBCLvqG7a1T4MLV6Hb7B1//Ejz6dT6UfTSSQszKXA3FQKIER7vt4Hg9IcCW rH5hXnPCko5yfjMpym3yr4+97fi6U1iJccc+DYRs0dq1Wrth40BwZH6tCrQVHfOQ jY6c2Ha5GDPTHbsW39vb7JvsFGYN2wlmmC1ThqG4e9kF8l1ZW+m433dJOicWMk2m 55SqCkbmkboVy9bYC6Tgrx6/KAa6vqMK0oXHADSJgNeccEZZeiTttlVwAiF9b1/f 1umUwKSfRhAvtvHD+ynoZIQ64oEnWGeGyc5EEJIdY+q7T6csT2E+pi75+y4q6jI2 xMTuK5iwXNr7PF612Tmr5NMaB+59Abdshp9IXxsNDPJiNBTLagA= =lk2H -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Another round of 64-bit DT changes for the new Amlogic SoCs. These include IR, SPI and ethernet MAC support for the new AXG family SoCs. * tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-axg: enable ethernet for A113D S400 board ARM64: dts: meson-axg: add ethernet mac controller ARM64: dts: meson-axg: add the SPICC controller ARM64: dts: meson-axg: enable IR controller arm64: dts: meson-axg: switch uart_ao clock to CLK81 clk: meson-axg: add clocks dt-bindings required header dt-bindings: clock: add compatible variant for the Meson-AXG Signed-off-by: Olof Johansson <olof@lixom.net>	2018-01-11 16:50:50 -08:00
Georgi Djakov	0c6ab1b8f8	clk: qcom: Add A53 PLL support ... The CPUs on Qualcomm MSM8916-based platforms are clocked by two PLLs, a primary (A53) CPU PLL and a secondary fixed-rate GPLL0. These sources are connected to a mux and half-integer divider, which is feeding the CPU cores. This patch adds support for the primary CPU PLL which generates the higher range of frequencies above 1GHz. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Amit Kucheria <amit.kucheria@linaro.org> [sboyd@codeaurora.org: Move to devm provider registration, NUL terminate frequency table, made tristate/modular] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2018-01-02 10:00:24 -08:00
Icenowy Zheng	3525c7c3bd	dt-bindings: fix the binding of Allwinner DE2 CCU of A83T and H3 ... The DE2 CCU is different on A83T and H3 -- the parent of the clocks on A83T is PLL_DE but on H3 it's the DE module clock. This is not noticed when I develop the DE2 CCU driver. Fix the binding by using different compatibles for A83T and H3, adding notes for the PLL_DE usage on A83T, and change the binding example's compatible from A83T to H3 (as it specifies the DE module clock). Fixes: ed74f8a8a6 ("dt-bindings: add binding for the Allwinner DE2 CCU") Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>	2017-12-29 16:10:17 +08:00
Rob Herring	afc3bca4cf	dt-bindings: Use lower case hex in unit-addresses ... DT unit addresses should be lower case hex. Fix all the binding examples. Converted with the following command from Krzysztof Kozlowski: sed -e 's/@\([a-fA-F0-9_-]*\) {/@\L\1 {/' -i $(find Documentation/devicetree/bindings -name '*.txt') Signed-off-by: Rob Herring <robh@kernel.org>	2017-12-26 10:37:05 -06:00
Sergej Sawazki	51279ef9f6	clk: si5351: Add DT property to enable PLL reset ... Add optional output clock DT property to enable PLL reset when a clock output is enabled. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Sergej Sawazki <sergej@taudac.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-12-21 18:09:18 -08:00
Yuantian Tang	36ab046715	clk: qoriq: add more divider clocks support ... More divider clocks are needed by IP. So enlarge the PLL divider array to accommodate more divider clocks. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-12-21 15:57:28 -08:00
Chunyan Zhang	96e9dd55eb	dt-bindings: Add Spreadtrum clock binding documentation ... Introduce a new binding with its documentation for Spreadtrum clock sub-framework. Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-12-21 15:00:53 -08:00
Yixun Lan	f8d0dfed51	dt-bindings: clock: add compatible variant for the Meson-AXG ... Update the documentation to support clock driver for the Amlogic's Meson-AXG SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>	2017-12-14 10:14:12 +01:00
Stephen Boyd	a1b71a3083	Merge branch 'clk-hi3660-stub' into clk-next ... * clk-hi3660-stub: clk: hisilicon: Add support for Hi3660 stub clocks dt-bindings: clk: Hi3660: Document stub clock	2017-12-06 23:06:22 -08:00
Leo Yan	a4a124c349	dt-bindings: clk: Hi3660: Document stub clock ... Document the DT binding for stub clock which is used for CPU, GPU and DDR frequency scaling. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-12-06 22:54:37 -08:00
Tirupathi Reddy	e3447a67c9	dt-bindings: Add qcom spmi_pmic clock divider bindings ... This patch adds device tree bindings for Qualcomm SPMI PMIC clock divider module. Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org> [sboyd: Moved file to match compatible of binding] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-12-06 22:29:48 -08:00
Mathieu Malaterre	4c9847b737	dt-bindings: Remove leading 0x from bindings notation ... Improve the binding example by removing all the leading 0x to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading "0x" Converted using the following command: find Documentation/devicetree/bindings -name "*.txt" -exec sed -i -e 's/([^ ])\@0x([0-9a-f])/$1\@$2/g' {} + This is a follow up to commit 48c926cd34 Signed-off-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: Rob Herring <robh@kernel.org>	2017-12-06 14:56:33 -06:00
Linus Torvalds	fc35c1966e	We have two changes to the core framework this time around. The first being a ... large change that introduces runtime PM support to the clk framework. Now we properly call runtime PM operations on the device providing a clk when the clk is in use. This helps on SoCs where the clks provided by a device need something to be powered on before using the clks, like power domains or regulators. It also helps power those things down when clks aren't in use. The other core change is a devm API addition for clk providers so we can get rid of a bunch of clk driver remove functions that are just doing of_clk_del_provider(). Outside of the core, we have the usual addition of clk drivers and smattering of non-critical fixes to existing drivers. The biggest diff is support for Mediatek MT2712 and MT7622 SoCs, but those patches really just add a bunch of data. By the way, we're trying something new here where we build the tree up with topic branches. We plan to work this into our workflow so that we don't step on each other's toes, and so the fixes branch can be merged on an as-needed basis. Core: - Runtime PM support for clk providers - devm API for of_clk_add_hw_provider() New Drivers: - Mediatek MT2712 and MT7622 - Renesas R-Car V3M SoC Updates: - Runtime PM support for Samsung exynos5433/exynos4412 providers - Removal of clkdev aliases on Samsung SoCs - Convert clk-gpio to use gpio descriptors - Various driver cleanups to match kernel coding style - Amlogic Video Processing Unit VPU and VAPB clks - Sigma-delta modulation for Allwinner audio PLLs - Allwinner A83t Display clks - Support for the second display unit clock on Renesas RZ/G1E - Suspend/resume support for Renesas R-Car Gen3 CPG/MSSR - New clock ids for Rockchip rk3188 and rk3368 SoCs - Various 'const' markings on clk_ops structures - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABCAAGBQJaD3qRAAoJEK0CiJfG5JUlOLgQAKWekgG/IYgcPzPWDYfg8Hwr sVVUK7+q7TVfbHsbYVikJuUaxutKZ0onnrYmOalTTyyxqL2E1/rYScnxdYHfcwX8 cyfHebRHsbh/Xg45ktwjzBkO49nwuppkpXd/V80GSBUZ+lsIVl5DUrrFAZdRUEdr CEsAsF9tEWIl+0gqXYNuiKBV7QAYv5BUPrbJQf0PwL6jX0OAhLv+ukfN8BdmYsOb rdoqhdgmyHkTuIMqsC/H2yP59aAKBse7wxIYebDiTdbPWfTkC9q927fTs4A02F6L sHfLvCpfuB4rOjXy6LSd1gMGWIcjotZai+idHBqtNLLVz6exF1QpUCp+pZjEULbA /Sx9lk8A3cYoa8pTu1NrrZbZX17iHkFswqMF3T20nhUN9+Ti597ZEbRcWDcoEZtw v2NznOTJ7Mm2SrNHOvDklstggNIGcwiAEePGMo7rJNEQZChpDjQj/gJWKzn0UwL4 zfk+0EzoejPdvZ5FJUfmlr8Tqk53uw+y7/0xQ6gf8lDviTrzzoeXtJUyumGBiuGx RxFywf8n02oLYRJm5hu+0NkC+/bX0Lxg/kwiR6FLBFbBFgkWyp7FGcxhlm6ZiBfe 0KkPciWslNavn5KhljIkZDbXymbvhhSr9uBEFsyeJueA5q7sSghWloL8Ag1cac3W e6swD1ngXtM/t5gjOLhR =hC7z -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have two changes to the core framework this time around. The first being a large change that introduces runtime PM support to the clk framework. Now we properly call runtime PM operations on the device providing a clk when the clk is in use. This helps on SoCs where the clks provided by a device need something to be powered on before using the clks, like power domains or regulators. It also helps power those things down when clks aren't in use. The other core change is a devm API addition for clk providers so we can get rid of a bunch of clk driver remove functions that are just doing of_clk_del_provider(). Outside of the core, we have the usual addition of clk drivers and smattering of non-critical fixes to existing drivers. The biggest diff is support for Mediatek MT2712 and MT7622 SoCs, but those patches really just add a bunch of data. By the way, we're trying something new here where we build the tree up with topic branches. We plan to work this into our workflow so that we don't step on each other's toes, and so the fixes branch can be merged on an as-needed basis. Summary: Core: - runtime PM support for clk providers - devm API for of_clk_add_hw_provider() New Drivers: - Mediatek MT2712 and MT7622 - Renesas R-Car V3M SoC Updates: - runtime PM support for Samsung exynos5433/exynos4412 providers - removal of clkdev aliases on Samsung SoCs - convert clk-gpio to use gpio descriptors - various driver cleanups to match kernel coding style - Amlogic Video Processing Unit VPU and VAPB clks - sigma-delta modulation for Allwinner audio PLLs - Allwinner A83t Display clks - support for the second display unit clock on Renesas RZ/G1E - suspend/resume support for Renesas R-Car Gen3 CPG/MSSR - new clock ids for Rockchip rk3188 and rk3368 SoCs - various 'const' markings on clk_ops structures - RPM clk support on Qualcomm MSM8996/MSM8660 SoCs" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: stm32h7: fix test of clock config clk: pxa: fix building on older compilers clk: sunxi-ng: a83t: Fix i2c buses bits clk: ti: dra7-atl-clock: fix child-node lookups clk: qcom: common: fix legacy board-clock registration clk: uniphier: fix DAPLL2 clock rate of Pro5 clk: uniphier: fix parent of miodmac clock data clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' clk: hisilicon: Delete an error message for a failed memory allocation in hisi_register_clkgate_sep() clk: hi3660: fix incorrect uart3 clock freqency clk: kona-setup: Delete error messages for failed memory allocations ARC: clk: fix spelling mistake: "configurarion" -> "configuration" clk: cdce925: remove redundant check for non-null parent_name clk: versatile: Improve sizeof() usage clk: versatile: Delete error messages for failed memory allocations clk: ux500: Improve sizeof() usage clk: ux500: Delete error messages for failed memory allocations clk: spear: Delete error messages for failed memory allocations clk: ti: Delete error messages for failed memory allocations clk: mmp: Adjust checks for NULL pointers ...	2017-11-17 20:04:24 -08:00
Linus Torvalds	527d147074	ARM: Device-tree updates for 4.15 ... We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaDhcfAAoJEGCrR//JCVIngu0QAI2ntVotaOAOaCurNCnoVwI1 j+eKwHGTawQRcSHWN8C+p4FzzaOmw+vvbOyewky8PWaDOCkK6yWEHRf3hb2la2jw j9prht28R1RAHIRPuah4SxKHYoT4VW9q/2hMHJ2BiNDOMX54xE7j2cUvWSsIRz5o id2QqKsp2OIDNQAXAA4N25FjdBCYvSik80panSdJITtJODIj6UfmcXSgqkoQ3TTV rwVyFtryl9Si3eyZYcfB2/0ILKuaMC8gl7IX9z+PkRqu9XN7i6bZKZlMMtpJqX3u Ad89kLkFqNhiwZ77bIoRRl+0NEoSu5hTPLHRqghS6gPfDY2JT6igf0rGC8twjfea fzGOBWr6NlIlUmR4smS0GyE/3YsfOQvYWjE+zx5qkmay30TORVTZBzsBR+kQJzKK tnbO1zvst1ECtk9e8np0di4NAo9rwM37dxpu4aspP1Umxw1K68VSNE3RhGl8UUwW oNvHa8hD8Ck0QDBNltrkmKBVoIYKRU3XhXrRXVjRQdu6Xitml0XYBi80V0h33EE3 162UXDEMu1/aqRRZUtKw7+yozT8fqOHjH8Zrv2zCVGg0HEwVohcWv/BPXbrg0abJ wXYS8VocZJP6Nb4FQMe+cRbBUHoBgBQqbsF60tWiYsjv0zoc5hogLWcZYqzDcIO6 06OBR3HgUW27urUn/JBu =TnSo -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM device-tree updates from Arnd Bergmann: "We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits) arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3 dt-bindings: bus: Add documentation for the Technologic Systems NBUS arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock ARM: dts: owl-s500: Add CubieBoard6 dt-bindings: arm: actions: Add CubieBoard6 ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock ARM: dts: owl-s500: Set power domains for CPU2 and CPU3 arm: dts: mt7623: remove unused compatible string for pio node arm: dts: mt7623: update usb related nodes arm: dts: mt7623: update crypto node ARM: dts: sun8i: a711: Enable USB OTG ARM: dts: sun8i: a711: Add regulator support ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1 ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1 ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes ARM: dts: sunxi: Add dtsi for AXP81x PMIC arm64: dts: allwinner: H5: Restore EMAC changes ...	2017-11-16 15:48:26 -08:00
Linus Torvalds	37cb8e1f8e	DeviceTree for 4.15: ... - kbuild cleanups and improvements for dtbs - Code clean-up of overlay code and fixing for some long standing memory leak and race condition in applying overlays - Improvements to DT memory usage making sysfs/kobjects optional and skipping unflattening of disabled nodes. This is part of kernel tinification efforts. - Final piece of removing storing the full path for every DT node. The prerequisite conversion of printk's to use device_node format specifier happened in 4.14. - Sync with current upstream dtc. This brings additional checks to dtb compiling. - Binding doc tree wide removal of leading 0s from examples - RTC binding documentation adding missing devices and some consolidation of duplicated bindings - Vendor prefix documentation for nutsboard, Silicon Storage Technology, shimafuji, Tecon Microprocessor Technologies, DH electronics GmbH, Opal Kelly, and Next Thing -----BEGIN PGP SIGNATURE----- iQItBAABCAAXBQJaCwaSEBxyb2JoQGtlcm5lbC5vcmcACgkQ+vtdtY28YcNzeA/8 C8uQhSsX2+UQZvFzcEA8KQAMGT3kYdrcf+gidRKwCEUWg1qscUEpTb3n3Rm5NUbU RPD1s6GSlh6fJCMHDTQ6Tti/T59L7nZa2/AIGmUishGu4x4q1o18AobpFJmYP/EM SJPwnmm5RV9WcZFao1y+sY3Xtn8DStxHO4cS+dyF5/EvPN9D8nbLJfu7bgTBAZww HktIMB9kx+GTipRQZBvBwXoy5MJjthIZub4XwzesA4tGananj4cXlc0xaVxpdYy3 5bO6q5F7cbrZ2uyrF+oIChpCENK4VaXh80m0WHc8EzaG++shzEkR4he1vYkwnV+I OYo4vsUg9dP8rBksUG1eYhS8fJKPvEBRNP7ETT5utVBy5I/tDEbo/crmQZRTIDIC hZbhcdZlISZj0DzkMK2ZHQV9UYtRWzXrJbZHFIPP12GCyvXVxYJUIWb9iYnUYSon KugygsFSpZHMWmfAhemw5/ctJZ19qhM5UIl2KZk5tMBHAf466ILmZjg0me6fYkOp eADfwHJ1dLMdK79CVMHSfp+vArcZXp35B16c3sWpJB36Il97Mc/9siEufCL4GKX7 IBBnQBlbpSBKBejWVyI7Ip/Xp5u4qAQD+ZMJ9oLqBRqfWerHbDuOERlEOgwGqJYr 9v4HvP7V8eVUvAdqXka4EBfCyAgUzXDAxG2Dfmv9vGU= =jgpN -----END PGP SIGNATURE----- Merge tag 'devicetree-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: "A bigger diffstat than usual with the kbuild changes and a tree wide fix in the binding documentation. Summary: - kbuild cleanups and improvements for dtbs - Code clean-up of overlay code and fixing for some long standing memory leak and race condition in applying overlays - Improvements to DT memory usage making sysfs/kobjects optional and skipping unflattening of disabled nodes. This is part of kernel tinification efforts. - Final piece of removing storing the full path for every DT node. The prerequisite conversion of printk's to use device_node format specifier happened in 4.14. - Sync with current upstream dtc. This brings additional checks to dtb compiling. - Binding doc tree wide removal of leading 0s from examples - RTC binding documentation adding missing devices and some consolidation of duplicated bindings - Vendor prefix documentation for nutsboard, Silicon Storage Technology, shimafuji, Tecon Microprocessor Technologies, DH electronics GmbH, Opal Kelly, and Next Thing" * tag 'devicetree-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits) dt-bindings: usb: add #phy-cells to usb-nop-xceiv dt-bindings: Remove leading zeros from bindings notation kbuild: handle dtb-y and CONFIG_OF_ALL_DTBS natively in Makefile.lib MIPS: dts: remove bogus bcm96358nb4ser.dtb from dtb-y entry kbuild: clean up *.dtb and *.dtb.S patterns from top-level Makefile .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore .gitignore: sort normal pattern rules alphabetically dt-bindings: add vendor prefix for Next Thing Co. scripts/dtc: Update to upstream version v1.4.5-6-gc1e55a5513e9 of: dynamic: fix memory leak related to properties of __of_node_dup of: overlay: make pr_err() string unique of: overlay: pr_err from return NOTIFY_OK to overlay apply/remove of: overlay: remove unneeded check for NULL kbasename() of: overlay: remove a dependency on device node full_name of: overlay: simplify applying symbols from an overlay of: overlay: avoid race condition between applying multiple overlays of: overlay: loosen overly strict phandle clash check of: overlay: expand check of whether overlay changeset can be removed of: overlay: detect cases where device tree may become corrupt of: overlay: minor restructuring ...	2017-11-14 18:25:40 -08:00
Stephen Boyd	8f62040086	Merge branch 'clk-qcom' into clk-next ... * clk-qcom: clk: qcom: clk-smd-rpm: add msm8996 rpmclks clk: qcom: Implement RPM clocks for MSM8660/APQ8060 clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC clk: qcom: Elaborate on "active" clocks in the RPM clock bindings clk: qcom: Remove unused RCG ops	2017-11-14 10:07:42 -08:00
Marco Franchi	48c926cd34	dt-bindings: Remove leading zeros from bindings notation ... Improve the binding example by removing all the leading zeros to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading 0s Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"` Some unnecessary changes were manually fixed. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org>	2017-11-09 17:05:05 -06:00
Rajendra Nayak	7066fdd0d7	clk: qcom: clk-smd-rpm: add msm8996 rpmclks ... Add all RPM controlled clocks on msm8996 platform [srini: Fixed various issues with offsets and made names specific to msm8996] Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-11-02 00:08:12 -07:00
Linus Walleij	856e6bb91e	clk: qcom: Update DT bindings for the MSM8660/APQ8060 RPMCC ... These compatible strings need to be added to extend support for the RPM CC to cover MSM8660/APQ8060. We also need to add enumberators to the include file for a few clocks that were missing. Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-11-01 23:47:27 -07:00
Linus Walleij	5e70ca8753	clk: qcom: Elaborate on "active" clocks in the RPM clock bindings ... The concept of "active" clocks is just explained in a bried comment in the device driver, let's explain it a bit more in the device tree bindings so everyone understands this. Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-11-01 23:46:48 -07:00
Stephen Boyd	b177571b9d	clk: renesas: Updates for v4.15 (take two) ... - Add support for the second display unit clock on RZ/G1E, - Add git repository to MAINTAINERS, - Add suspend/resume support for R-Car Gen3 CPG/MSSR, - Small fixes and cleanups. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZ6cIgAAoJEEgEtLw/Ve77p20P/jGAE3EV3vWHmzjE3KenFv8O mxFMEIK0aCvP80BfbWrYUJqBD36hncTodT3k3drZ52HrkrKUE21CqkzS7sn4OpvG RbMssZWg6LntfqfJU4skQ3KeJsdz2Zz3L8MkbOqPO8bZSKCEKddU5buKjXhBzygJ zXXVqMLvMiUrq9JXqLQesxnkBOclsSyO9TyXrBNU9bTBA+wqGe4Ofk64i0wQrcNh Miz4VYgYL8ul1SjVCVu1vTe+l3/JoSCb9ZqrGA5r+8dQiTKMvQPiUEhnzloU2PRK ufZo7c3CWSQabVWONpttPrR81F/yn6ps6GVPN6Lm2QzXs3UQGzMdd55gnZqHq6T4 AxCrt38cE7VdrOwqnKAp37NBRH7hP2Fi4DXQwZJE2QTc6hlb8YYBbgRgYaNE1k3F WTKYCmd2VAqBYUw+SF+ZC+1/hJUgtOi09PFXwV9aH2WWnMuNMoOi2+CFPCg0jRkQ 9GKGbmy9cKMurBqb/29tW0EeCUbtQCxIuEiPBJx8lhlghc3jeEvtCdpvx8JiSjPg T68q9kI5H7/H9X6jUt0liOUBzZHhdWHdQ3+g2cnXFjgrQsBibzi3bC6YBx1u6ly1 x20inLXx5ZTQyVwAJN8SBdgkWgBPlHT6KQd2eiPnibtqZwVrGae2sWcMb587+d8n 9y9STlh6/xn+R78epvj2 =2sIL -----END PGP SIGNATURE----- Merge tag 'clk-renesas-for-v4.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next Pull Renesas clk driver updates from Geert Uytterhoeven: - Add support for the second display unit clock on RZ/G1E, - Add git repository to MAINTAINERS, - Add suspend/resume support for R-Car Gen3 CPG/MSSR, - Small fixes and cleanups. * tag 'clk-renesas-for-v4.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: rcar-gen3: Restore R clock during resume clk: renesas: rcar-gen3: Restore SDHI clocks during resume clk: renesas: div6: Restore clock state during resume clk: renesas: cpg-mssr: Add support to restore core clocks during resume clk: renesas: cpg-mssr: Restore module clocks during resume MAINTAINERS: Add git repository to Renesas clock driver section clk: renesas: cpg-mssr: Add du1 clock to R8A7745 clk: renesas: rz: clk-rz is meant for RZ/A1 clk: renesas: r8a77995: Correct parent clock of INTC-AP clk: renesas: r8a7796: Correct parent clock of INTC-AP clk: renesas: r8a7795: Correct parent clock of INTC-AP	2017-10-31 16:25:38 -07:00
Stephen Boyd	ae74ac0828	clk/samsung updates for v4.15, part 2 ... - An addition of separate driver for the Exynos 4412 ISP CMU, needed to model and properly handle the clock controller's dependencies on the ISP power domain. - Adding __maybe_unused attributes to the exynos5433_cmu_{suspend, resume} ops to suppress compiler warnings with CONFIG_PM disabled. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJZ5IjJAAoJEE1bIKeAnHqLsnIP/iPVWF3tkpKgc7v5cq3US+HW U7uU3/Di1A8jWgIVYyFVjAAceahz9xefu2rgCxsiUAkh1i+SdR9O9gAWq08AcmZu OMGWI7zMzH0GVvRXDbZsRGKVxtkrda519KnOTXorawhh1JnODuOzMBxMcAXm+zen bvPuqiXBvGXADFc18QtaR7JAd7sqd+rMFYCJ45RJAIf20Z9PPGJQPtkxfvkK2xRX nuB6ZaUfN9xrBVhWvjYq6WjKhkIO/j848B+0+l5GLi2au/a+nDN0qOYrMpFG8EQe k/6zu3xDTG/9UgKWNJN5fMon7QK82sOJTszDwDLLsttz5LhuUGV+oLHnAdt8rcgJ 7UuTNRc169t0tNtoep6m/5kHn81XARSQAgPVKs5xuOfTef4lP3kXhbDLoIENx/+H fCDq7GteFat1Shu/01HZJhBe4MOolZLHsFvu7+KawB6CmD3KzDSckgRRIrEFDqck AYqxDmqJLaNbnJeTBsNRQQ3uX5D1wAaGKJLNq4HSfNOL3ZeOHQ2nxp0GgIOk7CSB agelkdpMaN4uNTB8cENnEIBv99bEkbdd4o5unCbO8lu3JgqfgjqFm6FjQZRR0ZQi uu1rFK+w7G239B6eBpkRLuJ7h8v3FntQy6FJOHHm8fKkHtN+BpBEUgX9EkJsW1QG ii7VgIaLm7QLcFOupKeh =DlbQ -----END PGP SIGNATURE----- Merge tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next Pull Samsung clk driver updates from Sylwester Nawrocki: - An addition of separate driver for the Exynos 4412 ISP CMU, needed to model and properly handle the clock controller's dependencies on the ISP power domain. - Adding __maybe_unused attributes to the exynos5433_cmu_{suspend, resume} ops to suppress compiler warnings with CONFIG_PM disabled. * tag 'clk-v4.15-exynos-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk: clk: samsung: Add a separate driver for Exynos4412 ISP clocks clk: samsung: Add dt bindings for Exynos4412 ISP clock controller clk: samsung: Instantiate Exynos4412 ISP clocks only when available clk: samsung: exynos5433: mark PM functions as __maybe_unused	2017-10-30 17:59:10 -07:00
Arnd Bergmann	877b203e15	This pull request contains Broadcom ARM-based Device Tree changes for 4.15, ... please pull the following: - Eric adds support for the CLCD and PWM controller on Cygnus chis - Loic fixes the console path on the Raspberry Pi 3 (already submitted as fixes) and then proceeds with enabling the BCM43438 bluetooth chip on the Raspberry Pi 3 - Rafal specifies the USB ports on the Luxul XWR-1200 - Dan adds support for the Luxul ABR-4500 based on BCM47094, the Luxul XAP-810 and XAP-1440 both based on BCM53573 - Florian adds support for the Broadcom Hurricane 2 SoC by adding general machine binding, clock binding, SoC DTS include file and a DTS for the Ubiquiti Networks UniFi Switch 8 -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJZ6oyXAAoJEIfQlpxEBwcEZ9sQAIHxupdwbECNH1DJo0jWxqrC bMAfx2yHyr/snPXq46E91QjRIGJLk/E2lMUS0xYWpxC2MRp0pZPFAVTc3qYKgI/9 dGOuJNsk1ZUhbys1BhgVuryYbc6ZSfxz8h5uUxdZ5CLxs9beAsaKDXablsN8Th3O j5OEundSosZ1SPd+F9KNDURjRmfeUzhYlBuRZ2AfWvSJFYjn2cIDM9aCBnDSNYHh Pxs03CF4uGM6DBReIcuG99NKtlaTFoD4v7Empb5i4F0sUNCefcGvhXeMDUBGPeRo z0BDJ4LEBySDzTRd9NhekPC4DM7QsyTjGJz1JbW8FmsK+GnJx5uLMrEgXUtWbSou bup1RHRaxAcpoTv0BTiPK0chfU63RgAqrvDw7wo8O17d06BHtyt0Z5tlv3Oc7OBP 4XhkSj6TmkD6WtQCQWY81jMZ6ezzxeZ/5kOIASAvKc1bh3ocbxpdQkNoxd0pASsI o/CW14a0q0STEdYnF+Y6YGQziuAhRQH/8W6mBUeRfPxQQrG8NXPJoGArP9be1ikR 7mqUivV3pD1mA+3PiiD2fZ57hQRjTowr4bA+RarYxxg7TDu3kUFqkXm93aYXuBbm UzyAZZ4LLbhlcIXIuwfoigoSmQaqUbEIMOqSW8v74PKJDOcSqBS+iZDD+hDSpbPA XShAuXKwt3p6uSei3nib =DmZ2 -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.15/devicetree' of http://github.com/Broadcom/stblinux into next/dt Pull "Broadcom devicetree changes for 4.15" from Florian Fainelli: This pull request contains Broadcom ARM-based Device Tree changes for 4.15, please pull the following: - Eric adds support for the CLCD and PWM controller on Cygnus chis - Loic fixes the console path on the Raspberry Pi 3 (already submitted as fixes) and then proceeds with enabling the BCM43438 bluetooth chip on the Raspberry Pi 3 - Rafal specifies the USB ports on the Luxul XWR-1200 - Dan adds support for the Luxul ABR-4500 based on BCM47094, the Luxul XAP-810 and XAP-1440 both based on BCM53573 - Florian adds support for the Broadcom Hurricane 2 SoC by adding general machine binding, clock binding, SoC DTS include file and a DTS for the Ubiquiti Networks UniFi Switch 8 * tag 'arm-soc/for-4.15/devicetree' of http://github.com/Broadcom/stblinux: ARM: dts: Hurricane 2: Add basic support for Ubiquiti UniFi Switch 8 dt-bindings: Add Ubiquiti Networks vendor prefix ARM: dts: Add Broadcom Hurricane 2 DTS include file dt-bindings: Document Broadcom Hurricane 2 clocks dt-bindings: Add documentation for Broadcom Hurricane 2 SoCs ARM: dts: BCM53573: Add DT for Luxul XAP-1440 ARM: dts: BCM53573: Add DT for Luxul XAP-810 ARM: dts: BCM5301X: Add DT for Luxul ABR-4500 ARM: dts: BCM5301X: Add DT for Luxul XBR-4500 ARM: dts: BCM5301X: Specify USB ports for USB LED of Luxul XWR-1200 ARM: dts: bcm2837-rpi-3-b: Add bcm43438 serial slave ARM: dts: bcm283x: Fix console path on RPi3 ARM: dts: cygnus: Add the PWM node ARM: dts: cygnus: Add the CLCD controller	2017-10-30 12:43:54 +01:00
Stephen Boyd	f09a6b86fd	clk: renesas: Updates for v4.15 ... - Add support for the new R-Car V3M SoC, - Small fixes and cleanups. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZ1KotAAoJEEgEtLw/Ve77AdgP/23DpYzhjEO4AhCjSqoYRnAM Z6OS0a2IaUxmdDgj6czlD0cbILFx75TCFP3byMCjBThd4rQ5P5R0TjY/b+cPicyq rWMJc6az2Yh7XzqV/FPTn6t67U8Kqn8du9e99gEnaNUF9GLOjB2BfyIUN8azGY+K MuEUwNBXFkw30z7G/iSSWAjQe0CnND8HlU+AHWgeK/4MS9axmyVbHFJyTkgoKgct 2w3EnpQF+r3cb8whg/FpHF40rRdeU/KmgThPY5BkO+DaOfzDUxpYnZ5IsFY9zvUr dEaizgAN0D1Mw8k4peHyroM40Ju8o5t7o95NYNuvp38cfxYLWeox0bwblfJMNsrm l08u0NztjsgxGLUA/AAR78yMME0dr5MF/jk7UmIdhwL4KONUb7blCkVuKqWak9Hi uriUTO1velm7s7pMIlmLxdrLyE5UP2CtRO/973QsSS9lCjiVcLybJme8ICU0sklm 2vaqguNm/XDFyTM75nv8yglM9Ksm6ZoEvmgkgtDGlwxzMni9shKsX1f8nEAsiI+T gAWXsd0Qz/kkgX0BJiUDa1FgCPCM5BdBAMcmJsT2+ukeUU1KKevcpE5moqEIMl6x QboI/2v0XJimxU7lJ8pX2TGNYdY3yO3WQJDhrdyud6pkijPkVNqQOZMtAhy7Xzj4 pKTkswWsN9+ZSmXpWCs9 =PTM+ -----END PGP SIGNATURE----- Merge tag 'clk-renesas-for-v4.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next Pull Renesas clk driver updates from Geert Uytterhoeven: - Add support for the new R-Car V3M SoC, - Small fixes and cleanups. * tag 'clk-renesas-for-v4.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: rcar-gen2: Delete error message for failed memory allocation clk: renesas: mstp: Delete error messages for failed memory allocations clk: renesas: cpg-mssr: Add R8A77970 support dt-bindings: clock: Add R8A77970 CPG core clock definitions	2017-10-25 02:34:15 -07:00
Geert Uytterhoeven	d454cecc63	clk: renesas: rz: clk-rz is meant for RZ/A1 ... The RZ family of Renesas SoCs has several different subfamilies (RZ/A, RZ/G, RZ/N, and RZ/T). Clarify that the renesas,rz-cpg-clocks DT bindings and clk-rz driver apply to RZ/A1 only. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Rob Herring <robh@kernel.org>	2017-10-20 10:59:54 +02:00
Marek Szyprowski	8ca8ac1024	clk: samsung: Add dt bindings for Exynos4412 ISP clock controller ... Some registers for the Exynos 4412 ISP (Camera subsystem) clocks are located in the ISP power domain. Because those registers are also located in a different memory region than the main clock controller, support for them can be provided by a separate clock controller. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>	2017-10-16 11:25:35 +02:00
Florian Fainelli	c6d2efd127	dt-bindings: Document Broadcom Hurricane 2 clocks ... Add a Device Tree binding document for the Broadcom Hurricane 2 SoC which is an iProc based system. Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>	2017-10-12 11:30:41 -07:00