fbf6d8798f
drm/i915: Add locking to pll updates, v3.
...
With async modesets this is no longer protected with connection_mutex,
so ensure that each pll has its own lock. The pll configuration state
is still protected; it's only the pll updates that need locking against
concurrency.
Changes since v1:
- Rebased.
- Fix locking to protect all accesses. (Durgadoss)
Changes since v2:
- Make the dpll_lock global to protect concurrent updates to the
same register, for example DPLL_CTRL1 on skl. (Ander)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/56F29F50.1090708@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com >
2016-03-31 09:43:11 +02:00
52e2abb30c
drm/i915: fix sparse warning for using false as NULL
...
drivers/gpu/drm/i915/intel_dpll_mgr.c:1200:32: warning: Using plain integer as NULL pointer
Fixes: 304b65cbdcville.syrjala@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1458144418-20046-1-git-send-email-jani.nikula@intel.com
2016-03-17 11:12:07 +02:00
15e7ec29ce
drm/i915: Move pll power state to crtc power domains.
...
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457944075-14123-4-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com >
2016-03-17 09:27:55 +01:00
a1475e775e
drm/i915: Perform dpll commit first, v2.
...
Warn for the wrong mask in enable only. Disable will have the wrong mask now
because the new state is committed before disabling the old state.
Changes since v1:
- Use crtc_mask (Durgadoss)
- Rebase.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457944075-14123-3-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com >
2016-03-17 09:27:40 +01:00
2dd66ebde4
drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2.
...
This makes it easier to verify correct dpll setup with only a single crtc.
It is also useful to detect double dpll enable/disable.
Changes since v1:
- Rebase on top of Ander's dpll rework.
- Change debugfs active to a mask.
- Change enabled_crtcs and active_crtcs to unsigned.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457944075-14123-2-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com >
2016-03-17 09:27:28 +01:00
08250c4ba6
drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs
...
After the commit below the Broxton PLL IDs had an off-by-one error, so
fix this up. Also add a missing brace at intel_shared_dpll_init(), it
happened to compile only due to the way the IS_BROXTON macro is defined.
v2:
- remove debugging left-over
Fixes: a3c988ea06ander.conselvan.de.oliveira@intel.com >
CC: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457978134-12362-1-git-send-email-imre.deak@intel.com
2016-03-16 16:08:44 +02:00
a3c988ea06
drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll code
...
Include DPLL0 in the managed dplls for SKL/KBL. While it has to be kept
enabled because of it driving CDCLK, it is better to special case that
inside the DPLL code than in the higher level.
v2: Use INTEL_DPLL_ALWAYS_ON flag. (Ander)
v3: Remove extremely paranoid WARN_ONs. (Maarten)
Handle DPLL0 in skylake_get_ddi_pll() properly. (Ander)
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-14-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:32 +02:00
9d16da65bf
drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interface
...
Manage the LCPLLs used with DisplayPort, so that all the HSW/BDW DPLLs
are managed by the shared dpll code.
v2: Introduce INTEL_DPLL_ALWAYS_ON flag to please state checker. (Ander)
v3: Initialize pll->flags in intel_shared_dpll_init(). (Ander)
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-13-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:32 +02:00
34177c249a
drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.c
...
Move the code for configurating BXT plls into the shared dpll code, so
that the platform specific details are hidden behind that interface.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-12-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:31 +02:00
304b65cbdc
drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.c
...
Move the code for selecting plls for SKL/KLB into the shared dpll code,
so that the platform specific details are hidden behind that interface.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-11-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:31 +02:00
daedf20a4f
drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.c
...
Move the code for selecting and configuring HSW/BDW DDI PLLs into the
shared dpll infrastructure. With this most of the PLL selection logic
for those platforms is in one place. DisplayPort is handled separately,
but that should be fixed on a follow up patch. It also allows a small
clean up of the SPLL logic.
v2: Rebase.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-10-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:31 +02:00
f9476a6c6d
drm/i915: Refactor platform specifics out of intel_get_shared_dpll()
...
The function intel_get_shared_dpll() had a more or less generic
implementation with some platform specific checks to handle smaller
differences between platforms. However, the minimalist approach forces
bigger differences between platforms to be implemented outside of the
shared dpll code (see the *_ddi_pll_select() functions in intel_ddi.c,
for instance).
This patch changes the implementation of intel_get_share_dpll() so that
a completely platform specific version can be used, providing helpers to
reduce code duplication. This should allow the code from the ddi pll
select functions to be moved, and also make room for making more dplls
managed by the shared dpll infrastructure.
v2: WARN_ON(!dpll_mgr) in intel_get_shared_dpll(). (Maarten)
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-9-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:31 +02:00
2edd6443e3
drm/i915: Use a table to initilize shared dplls
...
Use a table to store the per-platform shared dpll information in one
place. This way, there is no need for platform specific init funtions.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-8-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:31 +02:00
8106ddbd77
drm/i915: Store a direct pointer to shared dpll in intel_crtc_state
...
Change the type of intel_crtc_state->shared_dpll to be a pointer to a
shared dpll. With this there is no need to first convert the id stored
in the crtc state to a pointer in order to use it. It does introduce a
bit of hassle on doing the opposite.
The long term objective is to hide details about dpll ids behind the
shared dpll interface.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-5-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:30 +02:00
a4780b7744
drm/i915: Split intel_get_shared_dpll() into smaller functions
...
Make the code neater by splitting the code for platforms with fixed PLL
to their own functions and splitting the logic for finding a shareable
or unused pll from the logic for setting it up.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-4-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:30 +02:00
55be2f0854
drm/i915: Move ddi shared dpll code to intel_dpll_mgr.c
...
No functional changes.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-3-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:30 +02:00
7abd4b35a5
drm/i915: Move shared dpll code to a new file
...
Create the new file intel_dpll_mgr.c and move the shared dpll code to
it. Follow up patches that reorganize pll handling will move more code
there and tweak the interface.
No functional changes.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/1457451987-17466-2-git-send-email-ander.conselvan.de.oliveira@intel.com
2016-03-09 11:55:29 +02:00
