IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
Convert txt binding of TI's qspi controller (found on their omap SoCs) to
dtschema to allow for validation.
The changes, w.r.t. the original txt binding, are:
- Introduce "clocks" and "clock-names" which was never mentioned.
- Reflect that "ti,hwmods" is deprecated and is not a "required"
property anymore.
- Introduce "num-cs" which allows for setting the number of chip
selects.
- Drop "qspi_ctrlmod".
Signed-off-by: Kousik Sanagavarapu <five231003@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240501165203.13763-1-five231003@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Cross-merge networking fixes after downstream PR.
Conflicts:
include/linux/filter.h
kernel/bpf/core.c
66e13b615a0c ("bpf: verifier: prevent userspace memory access")
d503a04f8bc0 ("bpf: Add support for certain atomics in bpf_arena to x86 JIT")
https://lore.kernel.org/all/20240429114939.210328b0@canb.auug.org.au/
No adjacent changes.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Running dtbs_check and dt_compatible_check targets really only depend
on processed-schema.json, but the dependency is 'dt_binding_check'. That
was sort worked around with the CHECK_DT_BINDING variable in order to
skip some of the work that 'dt_binding_check' does. It still runs the
full checks of the schemas which is not necessary and adds 10s of
seconds to the build time. That's significant when checking only a few
DTBs and with recent changes that have improved the validation time by
6-7x.
Add a new target, dt_binding_schema, which just builds
processed-schema.json and can be used as the dependency for other
targets. The scripts_dtc dependency isn't needed either as the examples
aren't built for it.
Signed-off-by: Rob Herring <robh@kernel.org>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
The ISL69269 is a PMBus voltage regulator with no configurable
parameters.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240502002836.17862-6-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
The 'local-bd-address' property is used to pass a unique Bluetooth
device address from the boot firmware to the kernel and should otherwise
be left unset.
Update the example to reduce the risk that a non-zero address will be
used by default in some devicetree.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240501075005.4588-1-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Document the new compatibles used on IBM system1-bmc
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240125212154.4028640-2-ninad@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Document the new compatibles used on Meta Harma.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20231211162656.2564267-2-peteryin.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Document Asrock X570D4U compatible.
Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231202003908.3635695-2-renze@rnplus.nl
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Strict priority for the tx scheduler is by default in Linux driver, so the
tx-sched-sp property was removed in commit aed6864035b1 ("net: stmmac:
platform: Delete a redundant condition branch").
This property is still in use in the following DT (and it will be removed
in a separate patch series):
- arch/arm64/boot/dts/freescale/imx8mp-beacon-som.dtsi
- arch/arm64/boot/dts/freescale/imx8mp-evk.dts
- arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
- arch/arm64/boot/dts/qcom/sa8540p-ride.dts
- arch/arm64/boot/dts/qcom/sa8775p-ride.dts
There is no problem if that property is still used in the DTs above,
since, as seen above, it is a default property of the driver.
Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20240429092654.31390-2-f.suligoi@asem.it
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Add device tree bindings for the Milkv Mars board which is
equipped with StarFive JH7110 SoC.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB
controller and can reuse the existing Exynos glue. Update the dt schema
to include the google,gs101-dwusb3 compatible for it.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240423-usb-dwc3-gs101-v1-1-2f331f88203f@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add a compatible string for MediaTek Genio 350 MT8365's display PWM
block: this is the same as MT8183.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231023-display-support-v3-11-53388f3ed34b@baylibre.com
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Under different applications, the MT8188 SCP can be used as single-core
or dual-core.
Signed-off-by: Olivia Wen <olivia.wen@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240430011534.9587-2-olivia.wen@mediatek.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
- Fix a double-free in the pinctrl_enable() errorpath.
- Fix a refcount leak in pinctrl_dt_to_map().
- Fix selecting the GPIO pin control state and the UART3
pin config group in the Intel Baytrail driver.
- Fix readback of schmitt trigger status in the Mediatek
Paris driver, along with some semantic pin config issues
in this driver.
- Fix a pin suffix typo in the Meson A1 driver.
- Fix an erroneous register offset in he Aspeed G6 driver.
- Fix an inconsistent lock state and the interrupt type on
resume in the Renesas RZG2L driver.
- Fix some minor confusion in the Renesas DT bindings.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmYwnFsACgkQQRCzN7AZ
XXNOgw/9HiN5N8Z869DT92OOQn8cFAshkxB/oN9ltd/Mzc73RquNB6pSAB1k43t1
6TnhHhMQOswflGOTR9aSdo96iHwx596D1nyCy56uSX9dGa2I9smwIpBoeT1rNTmM
HEt0CbHAWJ93F2BTBXNy6/fgLM/fZtD4SiCSiUynluUA9s/mSx7JmA6Lly6WSQBF
cRLj4DbVEKOUaHLcB90G0NI8VtJzjaRIdTkSqawd0SVVz+8vBmdLNWib6XvUsEP7
rQMs5omy+NSOWK0gKOUzXVZaXq8glbah3lZtFBZkZPjr13ymRjAipyhS0K3G6xhS
9jCSYfkwnpO3xb/D9/ZYhDd2FC3bQmphxMIzb/LYWoNDp6mdyQxbGtnO5lco9fI1
TcOfMpP24M6Eong9xiFUiIY/yghX10yBsbWzwX6qEO8O85DHmH0JWu8akHhKKPwJ
7W1uWxAtC0URWSG3qEDpcUzB8shWK7T5jNjgvsDn/cUyQ7WXk1XjOa17U1Ka019R
v+XvJ0Z0RHn2eqKme9OfX6W5zC0fD4P5nQpE6KW051U0/wSyQVGPTzcIJGa23JeF
ZvS/2te2dsmCZtlg0lmwdzi10p3QmFZ4t1xbxVgXt2VMvD6zWRwtyP76O4Nwbwg2
OaLQVVbinDZQ90e1FaYSWNNN8jTuUo781kEZiq6gEaJfnlblV5A=
=BG4d
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v6.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
- Fix a double-free in the pinctrl_enable() errorpath
- Fix a refcount leak in pinctrl_dt_to_map()
- Fix selecting the GPIO pin control state and the UART3 pin config
group in the Intel Baytrail driver
- Fix readback of schmitt trigger status in the Mediatek Paris driver,
along with some semantic pin config issues in this driver
- Fix a pin suffix typo in the Meson A1 driver
- Fix an erroneous register offset in he Aspeed G6 driver
- Fix an inconsistent lock state and the interrupt type on resume in
the Renesas RZG2L driver
- Fix some minor confusion in the Renesas DT bindings
* tag 'pinctrl-v6.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: renesas: rzg2l: Configure the interrupt type on resume
pinctrl: devicetree: fix refcount leak in pinctrl_dt_to_map()
pinctrl: baytrail: Add pinconf group for uart3
pinctrl: baytrail: Fix selecting gpio pinctrl state
pinctrl: mediatek: paris: Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLE
pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readback
pinctrl: core: delete incorrect free in pinctrl_enable()
pinctrl/meson: fix typo in PDM's pin name
pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T
pinctrl: renesas: rzg2l: Execute atomically the interrupt configuration
dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow 'input' and 'output-enable' properties
The FLT pin was incorrected documented as an output. The MAX8903 uses it to
signal to the processor that a charging fault has occurred.
Signed-off-by: Herman van Hazendonk <github.com@herrie.org>
Link: https://lore.kernel.org/r/20240415151645.1986014-1-github.com@herrie.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
for 6.10, please pull the following:
- Laurent converts the Raspberry Pi firmware DT binding to YAML, updates
the firmware driver to use the proper 'struct device' reference for
DMA mappings and drops unneeded properties from the DT node and
finishes by removing the duplicate firmware-clocks property to
bcm2835-rpi.dtsi. He also added support for the CAM1 camera interface
regulator.
- Uwe adds a pinctrl-based multiplexing description to allow the use of
I2C0 pins to allow usage between the 40-pin Raspberry Pi header and
the CSI and DSI connectors. He then describes the PCF85063 RTC device
available on the CM4 I/O board making use of that pinctrl-based
muxing.
- Arinc updates the Asus RT-AC3100 and RT-AC88U DTs to have proper LED
colors and function properties, NVMEM MAC addresses and removes
duplicates and unnecessary properties and does a few Device Tree
cleanups.. He then adds support for the Asus RT-AC3200 (BCM4709-based)
and RT-AC3500 routers.
- Jean-Michel adds DT nodes for the CSI Unicam camera interfaces on the
Raspberry Pi 4 / BCM2711 SoCs
- Florian adds support for the Ethernet LEDs on Raspberry Pi 4 B and
Raspberry Pi 4 CM boards.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmYwBsUACgkQh9CWnEQH
BwTeNg//THwPFu55oCQ+CsI6xUAPmcffjEcMk1qiELOo7PyoY9UkjKtjOMCW44tZ
uwAtzy3jMPaFI1Ng/EZPErz7KOlwoNeqIjTvOpbRw1tVJ/7tkrnk5vi8zqRQUv4a
jrAv+yybXDaKD/aFX41KH43OfMl0Fi5CnxUqlb5U8Mm0awwBfz2jvnetaZAuueAd
Hwet2Lt/jOX43GVVHRaxaqP/rJnr7xdUUW7iCQ+Qi2xvXJIpNj/mL6tvVAKFe2JZ
sig3uh/NtK6Pp1xAX78aTuf0L4NLFqQpVORuO1ncb4wT92U0Yhi3r47z4reAM6GN
nX5rLEjeV/yaRA2532c9MVALRT+4f1ic0Pq8Knj7WaH0bRrTjKQK4YiwR0KdXhy1
GGC58bUOa1HKynZXCDxVih0oOS4REd511WyiLqSPdpsvzrtHCqwC59LOh5PDaoEn
9aBof7eRK8r7KXEsvU3av5WiJjM+O2ILrRlfuiBt/nuvyvX1G3uSTq3Gncb4e2n8
1LWGpnj1CyW64seJ2v3a1Mx07ArWgy1wwg3iRt1aOMcKHrfO3evLdRwHlFq2Ke+t
U0cvR6nlpo9H6CPCMCU/LmK3chYWBDlIghua3v7AJSL9p9o6RcWyAV8SrP/E60A4
0O1rfNdLhQkl5MmIyhA5QTaAvsGplb9QNkf8m9Rx7e8krDTJjXA=
=400A
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYwpCEACgkQYKtH/8kJ
UiePmBAAlIjEJE9IE2DnrrqnCrSbGg08R5ZNWEHzSdPAXDVR3nUBrPXPosbCDKQE
iBUyF8APNPFogzfQJXR86vw7Wx067R95M6TLpAI4CuT47YAx1ALvC3oEy5Xua6OE
VgN+998sWLodnCAT8M/ZcmH5uWtCxWETwGNQJsU960sVa17h/q11WpM8NzKmSq3J
h+toBPNBfdyGyd2UBqcdnCiX5nLLCWOdryBJYaOHiohCKlbMtqn7eYlEUdyCIq3O
Q/O4p9gj92Df5rv2GTVycsO9LXbaYvIRsmcukxwR8FGV+mkIBmUaEfbazEbyjoJh
kjRMfvQ08P3a44wTuUVJrrnEvP3X8JUteZucGR0A8zsndt57ZUznYBYYcT63DMbN
/bDYbtbOOUu4/KkKt2eQiQAN1fApl22HhRybuuIlzN51mki3Qv9JioSVbQDbn6PU
M1CcvGn83k/UzPFlINDWHogSO+MyrCNk8zYPWpKjxwWAM6Twx/Ly0cmui6+91SeM
z4K0YZUYYH/1rCoScose2ByesAUu6HNBBGnYfobUSPCF5tMT7tMHd1kP5WxcStJ7
I58yLo+DFUX8EVePOfFx7QdzJR4JuVRKH498WnQ+0Xew6FpUhwvOC1DNK+W211jA
gNpUQd9s4sV9nXT0gLSPr2rbJW2AS2O+Btphpg5NiYU3VSOJXSQ=
=L8Aj
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-6.10/devicetree' of https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.10, please pull the following:
- Laurent converts the Raspberry Pi firmware DT binding to YAML, updates
the firmware driver to use the proper 'struct device' reference for
DMA mappings and drops unneeded properties from the DT node and
finishes by removing the duplicate firmware-clocks property to
bcm2835-rpi.dtsi. He also added support for the CAM1 camera interface
regulator.
- Uwe adds a pinctrl-based multiplexing description to allow the use of
I2C0 pins to allow usage between the 40-pin Raspberry Pi header and
the CSI and DSI connectors. He then describes the PCF85063 RTC device
available on the CM4 I/O board making use of that pinctrl-based
muxing.
- Arinc updates the Asus RT-AC3100 and RT-AC88U DTs to have proper LED
colors and function properties, NVMEM MAC addresses and removes
duplicates and unnecessary properties and does a few Device Tree
cleanups.. He then adds support for the Asus RT-AC3200 (BCM4709-based)
and RT-AC3500 routers.
- Jean-Michel adds DT nodes for the CSI Unicam camera interfaces on the
Raspberry Pi 4 / BCM2711 SoCs
- Florian adds support for the Ethernet LEDs on Raspberry Pi 4 B and
Raspberry Pi 4 CM boards.
* tag 'arm-soc/for-6.10/devicetree' of https://github.com/Broadcom/stblinux:
arm: dts: bcm2711: Describe Ethernet LEDs
ARM: dts: BCM5301X: Conform to DTS Coding Style on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: Add DT for ASUS RT-AC5300
ARM: dts: BCM5301X: Add DT for ASUS RT-AC3200
dt-bindings: arm: bcm: add bindings for ASUS RT-AC5300
dt-bindings: arm: bcm: add bindings for ASUS RT-AC3200
ARM: dts: bcm2835: Add Unicam CSI nodes
ARM: dts: BCM5301X: remove earlycon on ASUS RT-AC3100 and ASUS RT-AC88U
ARM: dts: BCM5301X: remove duplicate compatible on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: provide address for SoC MACs on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: use color and function on ASUS RT-AC3100 and RT-AC88U
ARM: dts: bcm2711-rpi-4-b: Add CAM1 regulator
ARM: dts: bcm2711-rpi-cm4-io: Add RTC on I2C0
ARM: dts: bcm2711-rpi: Add pinctrl-based multiplexing for I2C0
ARM: dts: bcm2835-rpi: Move duplicate firmware-clocks to bcm2835-rpi.dtsi
ARM: dts: bcm283x: Drop unneeded properties in the bcm2835-firmware node
firmware: raspberrypi: Use correct device for DMA mappings
dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Add gpio child node
Link: https://lore.kernel.org/r/20240429213703.2327834-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert NVIDIA Tegra30 I2S binding to DT schema and
add "clock-names" property used by multiple tegra i2s blocks
in arch/arm64/boot/dts/nvidia/tegra132.dtsi. This is not a
required property by the binding.
Signed-off-by: Mohammad Shehar Yaar Tausif <sheharyaar48@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240426170322.36273-1-sheharyaar48@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
1. Basic support for SCMI v3.2 pincontrol protocol
SCMI v3.2 introduces pincontrol protocol which is intended for
controlling pins and their configuration. The pin control protocol
provides commands to:
- List the pins, groups of pins, available functions, and their
association with each other.
- Set the parameter configuration and multiplexing of the pins or
groups of pins
- Optionally request exclusive access to a pin or group of pins.
- Optionally configure the permissions of an agent to access a pin
or group of pins.
These changes adds basic support for the same in the SCMI core layer
and an implementation of the generic scmi-pinctrl driver with associated
DT bindings.
2. Framework support for multiple vendors custom protocols
With the fixed space for vendor protocols, the possibility of having
multiple vendors implementing distinct SCMI vendor protocols with
the same overlapping protocol number is very high and with the need
to support them all in a single kernel image or a module is also high.
In order to implement the same we assume:
- vendor protocols has to be tagged at build time with a vendor_id
- vendor protocols could also optionally be tagged at build time with
sub_vendor_id and implementation version
At the initialisation all the built vendor protocols are registered
with the SCMI core using a key derived from the above tags
3. Logging and tracing improvements
This includes using dev_err_probe() to bail out from probe, adding
message dump traces for bad and unexpected replies and widening of
the tag buffer in trace_scmi_dump_msg to allow diverse tag names
4. Miscellaneous updates or improvements
This includes adding the accessor function get_max_msg_size() used
in pinctl protocol, updation of dt-bindings examples for protocol@13
to promote new bindings and simplification of scmi_devm_notifier_unregister
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmYrfzYACgkQAEG6vDF+
4phXdw//ZmvCV76D3XGJsXnc2Ivv/uaOZKRhzI+IKn0U529hI2YscA9BfhiLZOOI
68KqWiScMTGH5Zn1oDC5wpIEj0i3S/2ZdXZXWSN35+ccsz6y2hbf2q2ciMl1Vrf0
co8kxiDABI+RBeGpiSVQ2Yp6TEnxkiNDNAfON+A+xxbHhhLxGLcCCO33xbJ9Ui7e
QpW2xan7AiSANRTUdvM21h00Uy1O/kAkcZJC2oLtCjUr3lzczrZkBCIor0jBE4VB
SmM9vvcjWdfLVdfgxeFEAFvxN0fI9RT8ALRyfWbnPcCb37GUUMwS+J/Dz+P3yUa9
6vGz4CCdXpC1lxcM2z5cZsAqwk3WS8LU840lJyb2+gGxLoSPwr1z0NWNCqZQppkp
5LDaFh2v5b34epMHRkNUHTytMBHy5p9c81TOSYH7S2bEsQTOi9qjviH0RqSjyR5A
s9+dlxfUiZfoE71UYQLO2E0knu3AwIRQ6oEkhbmLFedOVegkoTeYkaAfdyEAO+SH
vqLEX88wwMU6B+bjDnN7lYTuSXbZVKu66TZk6oqMVnv2BQ29pmOR3AFQdFNpLA8W
lRygSMEbADzNuJla5Az+VH2tWf1hOmpSsMIOAJbZ6/drv0yFnbBwgtGkAmkqEr68
IQxwJTVQmPlgqpsCATzV29qgSEosHDJo9LZw9/DtgTx5qGL/to0=
=WRU/
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYwB/YACgkQYKtH/8kJ
UicgvxAAh8OV+YcHzBTHdsHDc7iQkb9tmvZg6Cw4sYP8AJ3zZ2NjRYJXLYxxzE6T
l+W8DIeV3ZQow+B/x6Xexdz9P/NKnxlTPO1/Z7hGpC2aDiBkseP3WliIJgBH0+iF
m6p3VOSVKcfM8vds0d5l35ITHL0eVJzb7bN6PKUR75I2cDJ2UDbWV6OadNNyt4tX
eEkCNnmuTx1bhpRXLpAXpEBb4FdbFNc5cSJHw9nbdCyQ8vFtHkaH82L9MCjy4kaW
fSRwkNzqwWOA2tS3tkDvsczF4360RKoL95Y92lrQVTlnMjGLaUsCbs8FDKwHNZKb
6hBoiYQERmhGvb76+34kbMM50MyWohjzZcbCL6o3cU195KWJCN1a1cUbq8J+H7k1
MeK0XuwYUu6HdApwI6AfHl9vCvyJB9/XsvWz1eEocbmP8M2aPeXtl8y3vImZ6rkX
aj/a9HuSKpAncqsdvpz4FoC0Q16gMZYtW6257kHcPX3QHvRlzJk7fHuqqIAQUsSf
prOfYGBCvBuPT3S+bgG7L74Ddt4JLGHYjDxdNP4DR9xLR62ek2eQWc+cVqooatoA
ZNckHV6Bibegtb+p/5RWgFem1XAOePM5gC1i5gvqy3oqsAQDrAd9Mx6s97AfrPzN
dU9WTMohCjebdyqxYDGb31xzi5VY/L3/UJp3X9moJqbajXX+ty4=
=Yce+
-----END PGP SIGNATURE-----
Merge tag 'scmi-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates for v6.10
1. Basic support for SCMI v3.2 pincontrol protocol
SCMI v3.2 introduces pincontrol protocol which is intended for
controlling pins and their configuration. The pin control protocol
provides commands to:
- List the pins, groups of pins, available functions, and their
association with each other.
- Set the parameter configuration and multiplexing of the pins or
groups of pins
- Optionally request exclusive access to a pin or group of pins.
- Optionally configure the permissions of an agent to access a pin
or group of pins.
These changes adds basic support for the same in the SCMI core layer
and an implementation of the generic scmi-pinctrl driver with associated
DT bindings.
2. Framework support for multiple vendors custom protocols
With the fixed space for vendor protocols, the possibility of having
multiple vendors implementing distinct SCMI vendor protocols with
the same overlapping protocol number is very high and with the need
to support them all in a single kernel image or a module is also high.
In order to implement the same we assume:
- vendor protocols has to be tagged at build time with a vendor_id
- vendor protocols could also optionally be tagged at build time with
sub_vendor_id and implementation version
At the initialisation all the built vendor protocols are registered
with the SCMI core using a key derived from the above tags
3. Logging and tracing improvements
This includes using dev_err_probe() to bail out from probe, adding
message dump traces for bad and unexpected replies and widening of
the tag buffer in trace_scmi_dump_msg to allow diverse tag names
4. Miscellaneous updates or improvements
This includes adding the accessor function get_max_msg_size() used
in pinctl protocol, updation of dt-bindings examples for protocol@13
to promote new bindings and simplification of scmi_devm_notifier_unregister
* tag 'scmi-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
pinctrl: Implementation of the generic scmi-pinctrl driver
firmware: arm_scmi: Add basic support for SCMI v3.2 pincontrol protocol
dt-bindings: firmware: Support SCMI pinctrl protocol
firmware: arm_scmi: Introduce get_max_msg_size() helper/accessor
firmware: arm_scmi: Add support for multiple vendors custom protocols
dt-bindings: firmware: arm,scmi: Update examples for protocol@13
firmware: arm_scmi: Avoid non-constant printk format strings
firmware: arm_scmi: Use dev_err_probe to bail out
firmware: arm_scmi: Simplify scmi_devm_notifier_unregister
firmware: arm_scmi: Add message dump traces for bad and unexpected replies
firmware: arm_scmi: Add helper to trace bad messages
include: trace: Widen the tag buffer in trace_scmi_dump_msg
firmware: arm_scmi: Log the perf domain names in the error paths
Link: https://lore.kernel.org/r/20240426105031.1526987-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
---------
Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x
platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers
register to the framework to offer firewall services such as access
granting.
This series of patches is a new approach on the previous STM32 system
bus, history is available here:
https://lore.kernel.org/lkml/20230127164040.1047583/
The need for such framework arises from the fact that there are now
multiple hardware firewalls implemented across multiple products.
Drivers are shared between different products, using the same code.
When it comes to firewalls, the purpose mostly stays the same: Protect
hardware resources. But the implementation differs, and there are
multiple types of firewalls: peripheral, memory, ...
Some hardware firewall controllers such as the RIFSC implemented on
STM32MP2x platforms may require to take ownership of a resource before
being able to use it, hence the requirement for firewall services to
take/release the ownership of such resources.
On the other hand, hardware firewall configurations are becoming
more and more complex. These mecanisms prevent platform crashes
or other firewall-related incoveniences by denying access to some
resources.
The stm32 firewall framework offers an API that is defined in
firewall controllers drivers to best fit the specificity of each
firewall.
For every peripherals protected by either the ETZPC or the RIFSC, the
firewall framework checks the firewall controlelr registers to see if
the peripheral's access is granted to the Linux kernel. If not, the
peripheral is configured as secure, the node is marked populated,
so that the driver is not probed for that device.
The firewall framework relies on the access-controller device tree
binding. It is used by peripherals to reference a domain access
controller. In this case a firewall controller. The bus uses the ID
referenced by the access-controller property to know where to look
in the firewall to get the security configuration for the peripheral.
This allows a device tree description rather than a hardcoded peripheral
table in the bus driver.
The STM32 ETZPC device is responsible for filtering accesses based on
security level, or co-processor isolation for any resource connected
to it.
The RIFSC is responsible for filtering accesses based on Compartment
ID / security level / privilege level for any resource connected to
it.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmYqUUkdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIWolxAAqUHuLzXyrsCGfPG9
L5J8dUIeRk6lsQgO62EtS/hsUL5NhlwSiShtNilGw0t2TDCj0LpSMccwDjHoC1DE
9ks6aj0lO4dBl/d6fQm+4Vn85KiKfKYXW3J9w+6ZtG7pRly9jbmlrELqBIbL+MjU
/mmPdKM5y/l9KO6vxiua+EtDdd0pZksZLFtms23VoiFgkQ+2heoJ297QGfrWwxzv
UZg/UnWpQYB10dp93WL97vTdBZR4iUwEJNcip7xM65iBwSkuc9Y3gz0TZTO0ivZJ
BRsNc/9BJYEV3kNxRJGyf7JeufsaG3meHVxw9sOYi2hMe75pDAANYxvsCYt6NHjL
i+zugtcM5v//Ksw+HbD1rvRuhEWjFUotCeXJb+RaiY0Sy3HVlKG0WJm2Ybgzlbf+
vahskAHJxG0NFhPVpktQ/+gh8IU8Gy0PwyErdihhWKCiYBp8xHxW7IF7JtqlXQQS
KQ4r0Ez/fgGmLQqDobskE+OgaFIuI5QrjH7S/VvxYh0xxZOBK89EmxK7pO3fki0v
EFcTE/82HWfJo/bRCoq2Yzrh2omjR9ICsxDtVe4nILzjhaLChBz5lITyRO+/+Lr3
6u/oO09tlQYEK4YzH2Kw0xGtpY7Xfmm4wC+zDTRXKBM3Vp1IoTchHssLS4nZbScq
ZHJHRPMCX98FdVH3BLX7OSexJys=
=/Cu0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYwAI4ACgkQYKtH/8kJ
UicByw//VzXycIdrOzZeInbrhs0D/7pmb31U1NaAwtK3Y90lxBi5AlB4MKUrM+oq
x/cxqmmW1RsBc2m1iEuJWkqXS+XJHGptHKAHUqVhI9bIuBZqmGddvcP93Ml9egcN
OL/Kd/OS4Q07EYc/Md6XrRBo2zJcHT57jGH8fKBmX4eAKfPYo7xgbq5k/0LoCq/i
cgfQdKeDsR6tTrHyJI0p/+EgS5uglUnIJBm1aLDk883UKH4/EQSR+dpvYsogBcbd
UnH78QeUymCOYzWylHJHeWFgDnn9NiJy/oCQx7wMc6PVUhcd0l1FXvM7XUeDy7iW
aNJpgYU8cTx9IYPGBbZJ13NX0+X4QACKpDjJZG90/y4Q4YEn5l/Di9rmv4HYhZgr
gwYD4EHewKB3PVtmCCUQpurSblshoo9bPWEaR3NFD1mSu46Jb11/zgIQ4oBagixV
MjiaaP3+Rpz1X0Zo5HSq9F0k4A/SddOo2zjMn3af/77nENsR3yEmPWgL20T+nv9P
deJ/LqE6mGVFI0c4E2K03Y85wldN6xXyhvCEqlHtK2X4l5JMe+0Vnak+VICZ0jQw
K/ihBRbifMH7g4GQUjpJUoUAvoyeSJ2jhMF8QV7bk76b6HeRFRYKOpQLnj29v/nd
MF2rKJwFYqJDF3d2a90I3E8c7huKnqWHQWinKu2Y2NkmH/tqtcI=
=mgY+
-----END PGP SIGNATURE-----
Merge tag 'stm32-bus-firewall-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/drivers
STM32 Firewall bus for v6.10, round 1
Highlights:
---------
Introduce STM32 Firewall framework for STM32MP1x and STM32MP2x
platforms. STM32MP1x(ETZPC) and STM32MP2x(RIFSC) Firewall controllers
register to the framework to offer firewall services such as access
granting.
This series of patches is a new approach on the previous STM32 system
bus, history is available here:
https://lore.kernel.org/lkml/20230127164040.1047583/
The need for such framework arises from the fact that there are now
multiple hardware firewalls implemented across multiple products.
Drivers are shared between different products, using the same code.
When it comes to firewalls, the purpose mostly stays the same: Protect
hardware resources. But the implementation differs, and there are
multiple types of firewalls: peripheral, memory, ...
Some hardware firewall controllers such as the RIFSC implemented on
STM32MP2x platforms may require to take ownership of a resource before
being able to use it, hence the requirement for firewall services to
take/release the ownership of such resources.
On the other hand, hardware firewall configurations are becoming
more and more complex. These mecanisms prevent platform crashes
or other firewall-related incoveniences by denying access to some
resources.
The stm32 firewall framework offers an API that is defined in
firewall controllers drivers to best fit the specificity of each
firewall.
For every peripherals protected by either the ETZPC or the RIFSC, the
firewall framework checks the firewall controlelr registers to see if
the peripheral's access is granted to the Linux kernel. If not, the
peripheral is configured as secure, the node is marked populated,
so that the driver is not probed for that device.
The firewall framework relies on the access-controller device tree
binding. It is used by peripherals to reference a domain access
controller. In this case a firewall controller. The bus uses the ID
referenced by the access-controller property to know where to look
in the firewall to get the security configuration for the peripheral.
This allows a device tree description rather than a hardcoded peripheral
table in the bus driver.
The STM32 ETZPC device is responsible for filtering accesses based on
security level, or co-processor isolation for any resource connected
to it.
The RIFSC is responsible for filtering accesses based on Compartment
ID / security level / privilege level for any resource connected to
it.
* tag 'stm32-bus-firewall-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
bus: stm32_firewall: fix off by one in stm32_firewall_get_firewall()
bus: etzpc: introduce ETZPC firewall controller driver
bus: rifsc: introduce RIFSC firewall controller driver
of: property: fw_devlink: Add support for "access-controller"
firewall: introduce stm32_firewall framework
dt-bindings: bus: document ETZPC
dt-bindings: bus: document RIFSC
dt-bindings: treewide: add access-controllers description
dt-bindings: document generic access controllers
Link: https://lore.kernel.org/r/7dc64226-5429-4ab7-a8c8-6053b12e3cf5@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a required clock property as we can't access the device registers if
the AXI bus clock is not properly enabled.
Note this clock is a very fundamental one that is typically enabled
pretty early during boot. Independently of that, we should really rely on
it to be enabled.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fixes: 96553a44e96d ("dt-bindings: iio: adc: add bindings doc for AXI ADC driver")
Signed-off-by: Nuno Sa <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20240426-ad9467-new-features-v2-3-6361fc3ba1cc@analog.com
Cc: <Stable@ver.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
-----BEGIN PGP SIGNATURE-----
iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmYutdweHHRvcnZhbGRz
QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGG5oH/3Ggwz5N+gdEK3np
qxUfpgJTWo+fJ6xhRLGy84TnEZ9s9UnK0Su6UuVyOb0F/2Y8hesJ6iwB16yQFKNe
Nore/VvuBZ+utshz5N20yNyPugNOP74GGbyOm+d+iJwIKnmSE8jSjWyMwNFHJCZM
BfoBxZrpwU/YD/0PD1KkI44jhPX1H/EcEmtNiklLnuYvJydTWiRFeku+CSgcOiRz
6fIFrcZMREZrAytMQSwteBAvI3vWblC0S39ZgJmtZt+oi+s1ksIUNG8Mm5uMAiyF
LcGep2tWV06x9uB9XVvrk0qco/kOaUgYuQrHQwNu9LzsaUdYGKqBBMk41SoNXFkB
hBXN26U=
=N2E2
-----END PGP SIGNATURE-----
Merge v6.9-rc6 into drm-next
Thomas needs the defio fixes, Maíra needs the vkms fixes and Joonas
has some fun with i915-gem conflicts.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Update dt schema to include the gs101 hsi2 sysreg compatible.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240429111537.2369227-2-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add dt schema documentation and clock IDs for the High Speed Interface
2 (HSI2) clock management unit. This CMU feeds high speed interfaces
such as PCIe and UFS.
[AD: * keep CMUs in google,gs101.h sorted alphabetically
* resolve minor merge conflicts in google,gs101-clock.yaml
* s/ufs_embd/ufs s/mmc_card/mmc
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20240429-hsi0-gs101-v3-1-f233be0a2455@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Define "regulator-[0-9]v[0-9]" as the preferred node name for fixed
regulators. Other suffixes with names are also accepted. Combined,
these make up about half of the existing names in use.
For now this only serves as documentation as the schema still allows
anything to avoid lots of additional warnings for something low priority
to fix. Once a "no deprecated" mode is added to the tools, warnings can
be enabled selectively.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240426215147.3138211-1-robh@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Support for Sony Xperia 1V, on the SM8550 platform, is added.
On IPQ8074, UART6 is described and unused gpios from QPIC are removed.
Backlight and touchscreen are described on Samsung Grand Prime devices.
RGB LED is added to Sony Xperia "Yoshino" devices, on which the
volume-up key definition is corrected as well.
Light Pulse Generator node is added to PM6150L PMIC, and blocks related
to USB Type-C on PM6150 are added.
On QCS6490 Rb3Gen2 UFS storage, USB Type-C management, a couple of
remoteprocs and both USB Type-C and native DisplayPort are enabled.
For the related IDP display is enabled, and the PMIC volume and power
buttons are described.
The inline crypto engine is added for SC7280, and an additional turbo
frequency is added to the MDP.
USB Type-C port management is introduce for the QRB2210 RB1. WiFi
firmware-name qualifier is added to both RB1 and RB2 boards.
The LMH node is added for the QCM2290, to configure the thresholds as
well as provide thermal pressure input.
The regulator range is adjusted for SD-card IO on SA8155P ADP, to allow
UHS modes.
The unused DCC is disabled on SC7180, and unused PMIC gpio block is
disabled on Trogdor.
For Lenovo Flex 5G, on SC8180X, the GPU firmware path is aligned with
agreed upon firmware structure. The frequency of the I2C bus for
touchpad is brought up to mitigate missing events. A number of
additional cleanups are introduced.
For SC8280XP GICv3 ITS is wired up for PCIe. EAS properties ad
introduced. A PS_HOLD-based restart node is introduced and acts as a
fallback if other mechanisms are unavailable to restart the board.
QFPROM is described, missing LMH interrupts for thermal pressure are
added. The TCSR download mode register is added, to allow configuring
if download mode should be entered on a crash.
USB Type-C handling is introduce for Fairphone FP3 as well.
On SM6350 crypto engine and DisplayPort controllers are introduced.
WiFi is enabled on the SM8150 Hardware Development Kit (HDK)
USB PD properties are added on Xiaomi Mi Pad 5 Pro devices.
Interconnect paths are added for UFS on SM8350, to ensure the bus is
voted for when the controller is operating.
On SM8550 the DMA coherency properties are corrected for SMMU and a few
consumers. Missing DWC3 quirks are added and the SNPS PHY parameters are
adjusted. Fastrpc banks are marked non-secure as needed.
The GPU description is introduced on SM8650, and enabled on the QRD. A
missing reserved-memory node is added, as is a few missing fastrpc
compute banks, and the non-secure-domain flag for other banks.
On X1 Elite SPMI support is added, together with PMIC definitons. The
link properties for DP3 are corrected, and audio-related resets are
introduced. SoundWire properties are corrected.
Nodes describing the PCIe bridge under the host controller is added
for a bunch of platforms.
The GPIO carrying orientation information for USB Type-C is added across
Fairphone 5, Lenovo Flex 5G, Lenovo Thinkpad X13s, SM8350 and SM845
HDKs.
A few dtbTool-specific compatibles for msm8916 is dropped from the
bindings.
A number of DeviceTree binding validation issues are corrected.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmYtPN8VHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FUUgQALpnVSHS39IDVFOoUb6fEccSu1dI
SDMm7kMzr6ZJjE1v8LiFsr/qz+DyXR6I4oQf7LEz6C+BbgDA2+ERnlecVmv/Fwpz
i4eO2mpO29hxzr6tu+cLIjK5BJhlAeol/rGfL+PfHRBwfrxSzN3ZQmjAVMgJb7E0
Lb0FTPQ3NDHEiWeQbSN8h+lHc6FcnHG4xf+IJD5a3U/x7fhPJRLU7Wb2yRDSQkLU
Qb0Jg1Spsjs13dp3ICE0jcK+WYlzn9KqD2dP0/3cUOwLWb7ic6BV9gEbSPn2ALfK
ZWqEyv2jbxfGd//0YN1gesssNaKeZCOE1xXJxu5R3h7qquyeTXlcCj1gyePCMTuz
HSqi7WmJufruu8uZEhRj0I7+bT3EWUF1h1vt+d8fubSE2JANKDi4IDQPb2qs5DvA
4aCuuD59F49pkRMkmTOcDzRnYv70IdyHhdSQ0+O233TXnJdE+5hq8s/5jHX4iviD
e290Zrvm1sid+oiISh/edrN3DH+tea3TsNtWcrDB7v5MKX7pOOwuGnDSAhAmsWg6
B4Hy+cMVFpZaeOpSgj77MaU+Ri9DDhS5PzRVaCEp0ya+uR/oOOHgSy/SFS0U+Ho/
gmTPMDchIokHxLB+ySU1Sufb9KryZvv4/MokbKwDgag4xjgu/F5gWkHIS0tRSGtW
x+FT1ZUKPTeOg0J9
=j685
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYvsikACgkQYKtH/8kJ
UidI3A/9G4E77uhMmK+QjmElfWTkS85xmO8l62VzRFvSaqhvCpvtG43BIaqpFGHw
T5BwTY7EHY0rezxeSQb7b02R7N1wGl4Jc7wzVyAkL/LH9aOX603qkYFQQP/eHtx4
FKz1mifB0W59t0TbSmLtA+ToNXAhtaf6X8jn1lSQCSb0gmW9EiMMeOacRCohLIY4
yUmvVGd/+oTfVG7Dus7ck/Cq6Nte8MR6wYj8gGObgfjKbB1Q9+p3dXmn/1y+mg7e
CWYCt43ebt5Do1VJaVRZ0wbu/B+WQzWpB8mNjKLBMSlU6INdgy35fgED4SNvaNwH
Bi+ySu0ZonoOVzowNQ52sEla1jz8UulXz5fWx3tSqvyTqVXVGbQCeG6ZM/W4oNTj
cmBFPMzs51yAb/mi8uVVtEBHYg1gyYrqW6JStiswjsoZXxeDFy45CW+GYIljW0zz
04S3ME9aK0DpAGZFS6U+f9BAhF9l/3JSmtA60ej1LxjapcsoHZSkhwjn9pIdcaCr
K6LTdRn0Pz55mqgyvnOOltiQrRU/0KMfsRibMfNBG9JUqHuSolrJmIDbRe28yYl7
QCMMFhPI/OAwoFzvzXDx6Q2bcWBQ7ZyW0bG2Cd7Q8u/Bnhsv6wuJjYBczLYSNQJG
Xg0oVdEx6Opqcmk7gnNfCJ0MGZAEaZesIX/oUC30c2NSJoo4fpE=
=f9Mf
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v6.10
Support for Sony Xperia 1V, on the SM8550 platform, is added.
On IPQ8074, UART6 is described and unused gpios from QPIC are removed.
Backlight and touchscreen are described on Samsung Grand Prime devices.
RGB LED is added to Sony Xperia "Yoshino" devices, on which the
volume-up key definition is corrected as well.
Light Pulse Generator node is added to PM6150L PMIC, and blocks related
to USB Type-C on PM6150 are added.
On QCS6490 Rb3Gen2 UFS storage, USB Type-C management, a couple of
remoteprocs and both USB Type-C and native DisplayPort are enabled.
For the related IDP display is enabled, and the PMIC volume and power
buttons are described.
The inline crypto engine is added for SC7280, and an additional turbo
frequency is added to the MDP.
USB Type-C port management is introduce for the QRB2210 RB1. WiFi
firmware-name qualifier is added to both RB1 and RB2 boards.
The LMH node is added for the QCM2290, to configure the thresholds as
well as provide thermal pressure input.
The regulator range is adjusted for SD-card IO on SA8155P ADP, to allow
UHS modes.
The unused DCC is disabled on SC7180, and unused PMIC gpio block is
disabled on Trogdor.
For Lenovo Flex 5G, on SC8180X, the GPU firmware path is aligned with
agreed upon firmware structure. The frequency of the I2C bus for
touchpad is brought up to mitigate missing events. A number of
additional cleanups are introduced.
For SC8280XP GICv3 ITS is wired up for PCIe. EAS properties ad
introduced. A PS_HOLD-based restart node is introduced and acts as a
fallback if other mechanisms are unavailable to restart the board.
QFPROM is described, missing LMH interrupts for thermal pressure are
added. The TCSR download mode register is added, to allow configuring
if download mode should be entered on a crash.
USB Type-C handling is introduce for Fairphone FP3 as well.
On SM6350 crypto engine and DisplayPort controllers are introduced.
WiFi is enabled on the SM8150 Hardware Development Kit (HDK)
USB PD properties are added on Xiaomi Mi Pad 5 Pro devices.
Interconnect paths are added for UFS on SM8350, to ensure the bus is
voted for when the controller is operating.
On SM8550 the DMA coherency properties are corrected for SMMU and a few
consumers. Missing DWC3 quirks are added and the SNPS PHY parameters are
adjusted. Fastrpc banks are marked non-secure as needed.
The GPU description is introduced on SM8650, and enabled on the QRD. A
missing reserved-memory node is added, as is a few missing fastrpc
compute banks, and the non-secure-domain flag for other banks.
On X1 Elite SPMI support is added, together with PMIC definitons. The
link properties for DP3 are corrected, and audio-related resets are
introduced. SoundWire properties are corrected.
Nodes describing the PCIe bridge under the host controller is added
for a bunch of platforms.
The GPIO carrying orientation information for USB Type-C is added across
Fairphone 5, Lenovo Flex 5G, Lenovo Thinkpad X13s, SM8350 and SM845
HDKs.
A few dtbTool-specific compatibles for msm8916 is dropped from the
bindings.
A number of DeviceTree binding validation issues are corrected.
* tag 'qcom-arm64-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (110 commits)
dt-bindings: arm: qcom: Add Samsung Galaxy S5 China (kltechn)
arm64: dts: qcom: qrb4210-rb1: add firmware-name qualifier to WiFi node
arm64: dts: qcom: qrb2210-rb1: add firmware-name qualifier to WiFi node
arm64: dts: qcom: ipq6018: Add PCIe bridge node
arm64: dts: qcom: ipq8074: Add PCIe bridge node
arm64: dts: qcom: msm8996: Add PCIe bridge node
arm64: dts: qcom: sc8180x: Add PCIe bridge node
arm64: dts: qcom: qcs404: Add PCIe bridge node
arm64: dts: qcom: sc7280: Add PCIe bridge node
arm64: dts: qcom: msm8998: Add PCIe bridge node
arm64: dts: qcom: sc8280xp: Add PCIe bridge node
arm64: dts: qcom: sa8775p: Add PCIe bridge node
arm64: dts: qcom: sm8650: Add PCIe bridge node
arm64: dts: qcom: sm8550: Add PCIe bridge node
arm64: dts: qcom: sm8450: Add PCIe bridge node
arm64: dts: qcom: sm8350: Add PCIe bridge node
arm64: dts: qcom: sm8150: Add PCIe bridge node
arm64: dts: qcom: sdm845: Add PCIe bridge node
arm64: dts: qcom: sm8250: Add PCIe bridge node
arm64: dts: qcom: sdm845-db845c: make pcie0_3p3v_dual always-on
...
Link: https://lore.kernel.org/r/20240427175951.1439887-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The QCA8074 PHY package found in IPQ4019 is properly described.
The Sony Xperia Z2 Tablet is cleaned up and improved, vibrator support
is added, upon support for Sony Xperia Z3 is added.
Also based on MSM8974, support for Samsung Galaxy S5 China is introduced.
The WiFi board type is added for these "klte" Samsung devices, to select
appropriate NVRAM firmware file.
Based on MSM8226, support for Motorola Moto G (2013) is added.
Nodes representing the PCIe bridges under existing controllers are added
for APQ8064, IPQ4019, IPQ8064, and SDX55.
A number of fixes throughout to improve compliance with DeviceTree
bindings.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmYtKW4VHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FPiMP/jycFJVF5Sb6rG2PcZsziU61pKuJ
8e98uHzQAh8WNqWbK0J0n9zZVHfHmk6+uBLNechwq9vOwvokLbD9DtdhcO7bvnj3
HsQXaiPFkGdBNuKYOkdN5ZQ/3JTWRlQZhYMOp6JMetbUVEtgvN+rWDxfSwWFeIzW
XmFmOzUCeUipQ6SqLbOVq0PnNd+7W89w/UzhTKtC/NHS1nZEpmpmovcKl2Vwqr9Z
GIf8vIxH1FfokFZK1VeNvePpMBJh85OX8jzAhc9HPp6y2FNkg/H0dcnEO3263/Bn
WoRAQ2LDMnIHa4mf4nYiD4Wk8vnTw8/RtmzqUmvKQ/NRsHHzxJux7ec7tTAwHqBV
jZtcoM0CIRAr/HtbZfxL88pDZA5QvUWxcfefnruq63eLPg62feMhyDxYdFZQJTGh
JqVGSpr6WvW4SAiJRI6XAIvLBDoRkhw/W4d8M+ClszPi+lHiGsqiSKSsQ7Hab1hO
cCaPABCdZ3f/8HlB6vpAuYrzCSjblR8+6ns2cb616/1uGt58I4NKPUkJ/zF5Us5P
4gokYhkkVIw2pwlA5esq0J4beOA+ku2ROJB9XOXp88ZixTJXicyGA4w1eLt6yumn
AoD7w30jzCCw141O6a7BY5S4UtIc5GPcnYwGjJQ/Imqzqi2C6PfVbQ2nJsrH26QG
lco6AtcNSBSVQPN4
=qXDI
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYvr84ACgkQYKtH/8kJ
Uifqyg/+N8lf8fxN1I6jcE7j1rUvEX0s6VypN8YfQfFZVI4v5qfjCwRUFs19sDF1
7ItBUXIJTQvvC7N8u1WuvfsJ8FvAdeJ2+xC0KkyYFvu7PIpxvi8nEOyY7OV0bjLa
cUXGlKfk4Dsb5ohUvkS7ELK1LsS0rEWIJskrjIuD0I960joSP9fgE3GUs+cRw6Wy
TesK4H+0mztkgNDCIIBp1XHUgt6LFVrFxJ5wo8WYlwP+QKYcmtlMpYAdpHzJk3Wu
ZAMGXY2MxzqCX1GTPzCFHYjoDRaVoMMVREmSvqy7121ZhxpQ4L1o6Z47YvgbzAE8
weGXhAZrYKXpjrUo0UBm8fidob2RGfAOjt5AaKBbtUsldDkL9CNZMfscV+hQjHg9
ooeLGVrWSs8wbIcPO/IPbCESLwpsGuH938csWVZ+HApoRe3Vv521WnRP9Tam7Ua2
ST6I9VQ4bJT5v2oXTLNNHGA6qUvOXfbXd9hnMBe/qt631btxkmqCnY6FkoMUJgmD
fH3Fcq/01TJjJcO7cnh0ygfNDScQ9E3WjC/IIG1MToFEMJRq948Egcw/Eqolh4g6
uqTpDTyo5R+/kQki+7gD/2Qebljci4hCcMebOSji6nBRwkyJHKyh0c7TXsEkltfX
1vyPkLZepa3xl4N/wDYl+XRiVwz340Qh1hJYH09Y36GwMHENxGc=
=ejIZ
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm32-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm32 DeviceTree updates for v6.10
The QCA8074 PHY package found in IPQ4019 is properly described.
The Sony Xperia Z2 Tablet is cleaned up and improved, vibrator support
is added, upon support for Sony Xperia Z3 is added.
Also based on MSM8974, support for Samsung Galaxy S5 China is introduced.
The WiFi board type is added for these "klte" Samsung devices, to select
appropriate NVRAM firmware file.
Based on MSM8226, support for Motorola Moto G (2013) is added.
Nodes representing the PCIe bridges under existing controllers are added
for APQ8064, IPQ4019, IPQ8064, and SDX55.
A number of fixes throughout to improve compliance with DeviceTree
bindings.
* tag 'qcom-arm32-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (22 commits)
ARM: dts: qcom: msm8974: Add DTS for Samsung Galaxy S5 China (kltechn)
ARM: dts: qcom: msm8974-klte-common: Pin WiFi board type
ARM: dts: qcom: msm8974: Split out common part of samsung-klte
ARM: dts: qcom: sdx55: Add PCIe bridge node
ARM: dts: qcom: apq8064: Add PCIe bridge node
ARM: dts: qcom: ipq4019: Add PCIe bridge node
ARM: dts: qcom: ipq8064: Add PCIe bridge node
ARM: dts: qcom: msm8974-sony-shinano: Enable vibrator
ARM: dts: qcom: ipq4019: add QCA8075 PHY Package nodes
ARM: dts: qcom: Add support for Motorola Moto G (2013)
dt-bindings: arm: qcom: Add Motorola Moto G (2013)
ARM: dts: qcom: msm8974: Add empty chosen node
ARM: dts: qcom: msm8974: Add @0 to memory node name
ARM: dts: qcom: Add Sony Xperia Z3 smartphone
ARM: dts: qcom: msm8974-sony-castor: Split into shinano-common
ARM: dts: qcom: msm8916: idle-state compatible require the generic idle-state
ARM: dts: qcom: include cpu in idle-state node names
ARM: dts: qcom: msm8974pro-castor: Rename wifi node name
ARM: dts: qcom: msm8974pro-castor: Add debounce-interval for keys
ARM: dts: qcom: msm8974pro-castor: Remove camera button definitions
...
Link: https://lore.kernel.org/r/20240427163625.1432458-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Included is one change that adds the dma-coherent flag to the device
tree json-schema for host1x on Tegra194 and Tegra234.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmYr5nQACgkQ3SOs138+
s6HimhAAoCYt50NuL1A2nQwzlz/EaW9MoWef2r9Q5X9rk5nfXeGWhv35ANndDnVo
OuvnQ7Hh96jk3N3BER7EUnbTT4lRypmzelUBoEv0FTHWfPQGgnXezlP3hj+HeKG0
rAL7IZ6SUaiFOHQFjXzYT1Y998WrZeauXW6V408jeBMrzX4T6qeanVSbQ3TIr+ev
lQE9U3ir3/KbcxKIeQttsr7Y1DNFQWKZHHIN5UL3ZsBsoA8VxE7nFGl3TykMgF5R
wZBn8Iso6uSwZ7zMUcQpyCnjVlNSlWFA/UIHGZWRAUWDVrmr7Cjh3r8fV0Lb2UiY
3YoZGbp9Rn5oYSp73RC3FDvXuI5jKzqb1cat1DXTHA9MewZevoAbIS63hiRz7g25
J+SiNgIlqtm8FaRTcboMXRkhD04ofZxT3LoiPk2bJFcBRVA+c6xKHEYVnyKt5RS8
QyAu+0Vpwdrq26sQYrAORXke/5MRSsmoy0Gz+uvxO8h1yFRu+ppfzRap5t2Yvx9o
dvvsgUYMvkWW054F12hJf/oSpClHi5hI3hZhKqguxLOOyvU8EZheZE2kPK4nuLlr
VMFxU0EULTtWE7z4X1zznMVVGQfaRXA5uPOI8L1EkSaXT9N2V156Kc5I91AqREi/
oYPNsyhnxqbHYQNgPq3bwowQUcqV/KYIjfVeIEAD6FsQOzP6S5w=
=jXQu
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYvrvgACgkQYKtH/8kJ
UifJJg//bPFr8PCaHqhRi8Q5KQEG+cAo2WPADOYPQzi0bkBXxUZIqTWt4mi2Ct7n
v844iGrrnxjjIvF+RDyzDKkF85CZLCXSQD80vo9VXJm6Yp57NBAhAwG/aGM+xdF+
HMV4dkjdNJtJ4c4wuFQtrfFsYk81lvP3ZuRP26XsVWqR66kyAm//WAhHhcEJEO0L
de0vpeIaIS9wTxGTCjE82oBbtnUedDaZEkWjBKCMPsqCXJT6m/6W3Y7/jhi0S6OQ
g3h/vwtUjFGeZ0Yzl/Z/wCNv8WZhxFaEp8Ifes1oVVgBzEw/lbhA3cRMoMMhO2hl
gAeXXBOahzdYF50hY93qoC8ho5ZlQ1nEtQOKgbBAHDYyN4LU6uDZ1xppa3bbBkin
Sgc9U76Y2zO73F+itdoBbrrJa2UXVB9sUEeMD80F4AIGm6sRVUJ+9OIzNNaE7awQ
/UAILr3HEuVFJvYhNT1nAr4EbL9FxCyE+FVTZGOHoEHY5MViUt39suzwpj1EE72j
N1+IDR98omCdva/Ul0XNY+VGiBiND+j7vAo9/zQHomj3VSJ6+2s4WmP9IdEVnfhn
8lCg7OStf3JkQvlhOLD6XxzoNywvqAQiDhhxSag7J2dprfna3A9PGv2jsn8JWySm
9Z3f+r3qhf2HM/cFRYdlwbQrRRx2hN5fV0VLnEbryapRSMtVJNA=
=lDsr
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.10-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.10-rc1
Included is one change that adds the dma-coherent flag to the device
tree json-schema for host1x on Tegra194 and Tegra234.
* tag 'tegra-for-6.10-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: display: tegra: Allow dma-coherent on Tegra194 and later
Link: https://lore.kernel.org/r/20240426180519.3972626-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rename 'ov8856.yaml' as 'ovti,ov8856.yaml' and update the MAINTAINERS
file entry accordingly.
All the Omnivision sensor DT bindings have vendor prefix "ovti," to
their file name hence this renaming.
Link: https://lore.kernel.org/linux-media/20220916110955.23757-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
