8332 Commits

Author SHA1 Message Date
Aswath Govindraju
d06a661309 arm64: dts: ti: k3-am64-main: Add DT node for USB subsystem
Add DT node for the single USB subsystem in main dtsi file.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20210317043007.18272-2-a-govindraju@ti.com
2021-03-17 14:00:10 -05:00
Robert Foss
68119b3abd arm64: dts: qcom: sdm845-db845c: Enable ov8856 sensor and connect to ISP
Enable camss & ov8856 DT nodes.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Link: https://lore.kernel.org/r/20210316171931.812748-23-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-16 12:46:35 -05:00
Robert Foss
2c3d0b325e arm64: dts: qcom: sdm845-db845c: Configure regulators for camss node
Add regulator to camss device tree node.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Link: https://lore.kernel.org/r/20210316171931.812748-22-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-16 12:46:32 -05:00
Robert Foss
d48a6698a6 arm64: dts: qcom: sdm845: Add CAMSS ISP node
Add the camss dt node for sdm845.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Link: https://lore.kernel.org/r/20210316171931.812748-21-robert.foss@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-16 12:46:27 -05:00
Vladimir Barinov
c8aebc1346 arm64: dts: renesas: r8a77980: Fix vin4-7 endpoint binding
This fixes the bindings in media framework:
The CSI40 is endpoint number 2
The CSI41 is endpoint number 3

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210312174735.2118212-1-niklas.soderlund+renesas@ragnatech.se
Fixes: 3182aa4e0bf4d0ee ("arm64: dts: renesas: r8a77980: add CSI2/VIN support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-16 09:58:00 +01:00
Robin Murphy
d9df28ba58 arm64: dts: juno: Enable more SMMUs
Now that PCI inbound window restrictions are handled generically between
the of_pci resource parsing and the IOMMU layer, and described in the
Juno DT, we can finally enable the PCIe SMMU without the risk of DMA
mappings inadvertently allocating unusable addresses.

Similarly, the relevant support for IOMMU mappings for peripheral
transfers has been hooked up in the pl330 driver for ages, so we can
happily enable the DMA SMMU without that breaking anything either.

Link: https://lore.kernel.org/r/a730070d718cb119f77c8ca1782a0d4189bfb3e7.1614965598.git.robin.murphy@arm.com
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-03-15 13:24:09 +00:00
Robin Murphy
4ac4d146cb arm64: dts: juno: Describe PCI dma-ranges
The PLDA root complex on Juno relies on an address-based lookup table to
generate AXI attributes for inbound PCI transactions, and as such will
not pass any transaction not matching any programmed address range. The
standard firmware configuration programs 3 entries covering the GICv2m
MSI doorbell and the 2 DRAM regions, so add a "dma-ranges" property to
describe those usable inbound windows.

Link: https://lore.kernel.org/r/720d0a9a42e33148fcac45cd39a727093a32bf32.1614965598.git.robin.murphy@arm.com
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-03-15 13:24:09 +00:00
Teresa Remmet
412627f6ff arm64: dts: imx8mp-phyboard-pollux-rdk: Add missing pinctrl entry
Add missing pinctrl-names for i2c gpio recovery mode.

Fixes: 88f7f6bcca37 ("arm64: dts: freescale: Add support for phyBOARD-Pollux-i.MX8MP")
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 15:19:02 +08:00
Horia Geantă
ba8da03fa7 arm64: dts: ls1012a: mark crypto engine dma coherent
Crypto engine (CAAM) on LS1012A platform is configured HW-coherent,
mark accordingly the DT node.

Lack of "dma-coherent" property for an IP that is configured HW-coherent
can lead to problems, similar to what has been reported for LS1046A.

Cc: <stable@vger.kernel.org> # v4.12+
Fixes: 85b85c569507 ("arm64: dts: ls1012a: add crypto node")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:32:08 +08:00
Horia Geantă
4fb3a07475 arm64: dts: ls1043a: mark crypto engine dma coherent
Crypto engine (CAAM) on LS1043A platform is configured HW-coherent,
mark accordingly the DT node.

Lack of "dma-coherent" property for an IP that is configured HW-coherent
can lead to problems, similar to what has been reported for LS1046A.

Cc: <stable@vger.kernel.org> # v4.8+
Fixes: 63dac35b58f4 ("arm64: dts: ls1043a: add crypto node")
Link: https://lore.kernel.org/linux-crypto/fe6faa24-d8f7-d18f-adfa-44fa0caa1598@arm.com
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:32:01 +08:00
Horia Geantă
9c3a16f883 arm64: dts: ls1046a: mark crypto engine dma coherent
Crypto engine (CAAM) on LS1046A platform is configured HW-coherent,
mark accordingly the DT node.

As reported by Greg and Sascha, and explained by Robin, lack of
"dma-coherent" property for an IP that is configured HW-coherent
can lead to problems, e.g. on v5.11:

> kernel BUG at drivers/crypto/caam/jr.c:247!
> Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.11.0-20210225-3-00039-g434215968816-dirty #12
> Hardware name: TQ TQMLS1046A SoM on Arkona AT1130 (C300) board (DT)
> pstate: 60000005 (nZCv daif -PAN -UAO -TCO BTYPE=--)
> pc : caam_jr_dequeue+0x98/0x57c
> lr : caam_jr_dequeue+0x98/0x57c
> sp : ffff800010003d50
> x29: ffff800010003d50 x28: ffff8000118d4000
> x27: ffff8000118d4328 x26: 00000000000001f0
> x25: ffff0008022be480 x24: ffff0008022c6410
> x23: 00000000000001f1 x22: ffff8000118d4329
> x21: 0000000000004d80 x20: 00000000000001f1
> x19: 0000000000000001 x18: 0000000000000020
> x17: 0000000000000000 x16: 0000000000000015
> x15: ffff800011690230 x14: 2e2e2e2e2e2e2e2e
> x13: 2e2e2e2e2e2e2020 x12: 3030303030303030
> x11: ffff800011700a38 x10: 00000000fffff000
> x9 : ffff8000100ada30 x8 : ffff8000116a8a38
> x7 : 0000000000000001 x6 : 0000000000000000
> x5 : 0000000000000000 x4 : 0000000000000000
> x3 : 00000000ffffffff x2 : 0000000000000000
> x1 : 0000000000000000 x0 : 0000000000001800
> Call trace:
>  caam_jr_dequeue+0x98/0x57c
>  tasklet_action_common.constprop.0+0x164/0x18c
>  tasklet_action+0x44/0x54
>  __do_softirq+0x160/0x454
>  __irq_exit_rcu+0x164/0x16c
>  irq_exit+0x1c/0x30
>  __handle_domain_irq+0xc0/0x13c
>  gic_handle_irq+0x5c/0xf0
>  el1_irq+0xb4/0x180
>  arch_cpu_idle+0x18/0x30
>  default_idle_call+0x3c/0x1c0
>  do_idle+0x23c/0x274
>  cpu_startup_entry+0x34/0x70
>  rest_init+0xdc/0xec
>  arch_call_rest_init+0x1c/0x28
>  start_kernel+0x4ac/0x4e4
> Code: 91392021 912c2000 d377d8c6 97f24d96 (d4210000)

Cc: <stable@vger.kernel.org> # v4.10+
Fixes: 8126d88162a5 ("arm64: dts: add QorIQ LS1046A SoC support")
Link: https://lore.kernel.org/linux-crypto/fe6faa24-d8f7-d18f-adfa-44fa0caa1598@arm.com
Reported-by: Greg Ungerer <gerg@kernel.org>
Reported-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Greg Ungerer <gerg@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:31:55 +08:00
Marek Vasut
6f96852619 arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP
The board has both MACs routed out, enable the EQOS.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:32 +08:00
Marek Vasut
ec4d1196f1 arm64: dts: imx8mp: add eqos node and alias
Add EQOS GMAC node per Documentation/devicetree/bindings/net/imx-dwmac.txt ,
leave out the nvmem entries as that is not yet available, so the MAC has to
be passed in via DT by the bootloader.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Jagan Teki
6cecf54dfb arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.

PCIe, DSI, CSI nodes will add it into imx8mm-engicam-edimm2.2.dtsi once
Mainline Linux supported.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Jagan Teki
21480ffda0 arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Jagan Teki
60ac35268f arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini
from Engicam.

General features:
- NXP i.MX8M Mini
- Up to 2GB LDDR4
- 8/16GB eMMC
- Gigabit Ethernet
- USB 2.0 Host/OTG
- PCIe Gen2 interface
- I2S
- MIPI DSI to LVDS
- rest of i.MX8M Mini features

i.Core MX8M Mini needs to mount on top of Engicam baseboards
for creating complete platform solutions.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Peng Fan
4e43cd636b arm64: dts: imx8qxp: correct usdhc clock-names sequence
Per dt-bindings, the clock-names sequence should be ipg ahb per to pass
dtbs_check.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Adrien Grassein
40ba2eda0a arm64: dts: imx8mm-nitrogen-r2: add audio
Add audio description and pin muxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:31 +08:00
Adrien Grassein
80fa5d604d arm64: dts: imx8mm-nitrogen-r2: add FlexSPI
Add FlexSPI description an pin muxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
b399c13f0b arm64: dts: imx8mm-nitrogen-r2: add PWMs
Add description for the four PWMs.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
2b6e7da251 arm64: dts: imx8mm-nitrogen-r2: rework UART 2
Remove useless clocks in UART 2

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
88a151795e arm64: dts: imx8mm-nitrogen-r2: add UARTs
Add description and pin muxing for UARTs.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
421f715c73 arm64: dts: imx8mm-nitrogen-r2: add USB support
Add description of USB.
usbotg2 seems to not working on all boards (including ones
from variscite).

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
f37cd7560d arm64: dts: imx8mm-nitrogen-r2: rework USDHC1
Add VMMC and VQMMC description for USDHC1 (eMMC).
There are comming directly from the alimentation
stage, so add the vref_3V3 fixed regulator.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:30 +08:00
Adrien Grassein
94b736d728 arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Add usdhc3 description which corresponds to the wifi/bt chip

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
d779f4c92a arm64: dts: librem5-devkit: Move headphone detection to sound card
This allows for automatic output source switching in userspace. Enable
the pullup on the GPIO to actually make it trigger and mark it as
active-high since detection is reversed otherwise.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
15094482fc arm64: dts: librem5-devkit: Add mux for built-in vs headset mic
Add mux so we can select either headset or built-in microphone input.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
39a346d923 arm64: dts: librem5-devkit: "Drop Line In Jack"
The SGTL500s LINEINL and LINEINR are N/C.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
6f46f7ff80 arm64: dts: librem5-devkit: Add speaker amplifier
Wire up the amplifier that drives the builtin speaker.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:29 +08:00
Guido Günther
5b65f39ddc arm64: dts: librem5-devkit: Use a less generic codec name
The codec is currently named after the chip but it should be named like
the device itself since otherwise it's impossible to distinguish it from
other devices using the same codec (e.g. in alsa's UCM).

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Martin Kepplinger
1cec010bbb arm64: dts: imx8mq-librem5-r2: set nearlevel to 120
On Birch I can never reach 220 and hence the display would never
turn off. Tests suggest 120 to be a good threshold value for all Birch
devices.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Angus Ainslie
3a0eac4a8c arm64: dts: librem5: protect some partitions of the nor-flash
These sections should be read only as they contain important data.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Guido Günther
e7fb3a7479 arm64: dts: librem5: Drop assigned-clocks from SAI2
IMX8MQ_AUDIO_PLL1 and IMX8MQ_AUDIO_PLL2 are setup to the same rates
right on the clock controller.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Guido Günther
28034d1b51 arm64: dts: imx8mq-librem5-devkit: Drop buck3 startup-ramp-delay
The PMIC driver now sets appropriate default delays.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Adam Ford
54c327393a arm64: dts: imx8mn-beacon: Enable SDR104 on WiFi SDIO interface
Enable 100Mhz and 200MHz pinmux and corrsesponding voltage supplies
to enable SDR104 on usdhc1 connecting the WiFi chip.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:28 +08:00
Michael Walle
dfee46f17b arm64: dts: ls1028a: add interrupt to Root Complex Event Collector
The legacy interrupt INT_A is hardwired to the event collector. RCEC is
bascially supported starting with v5.11. Having a correct interrupt, will
make RCEC at least probe correctly.

There are still issues with how RCEC is implemented in the RCiEP on the
LS1028A. RCEC will report an error, but it cannot find the correct
subdevice.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:27 +08:00
Fabio Estevam
dbd3120cf0 arm64: dts: imx8mm-nitrogen-r2: Pass the i2c3 unit name
Pass the i2c3 unit name to fix the following W=1 build warning:

arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts:159.8-172.5: Warning (unit_address_vs_reg): /soc@0/bus@30800000/i2c@30a40000/i2cmux@70/i2c3: node has a reg or ranges property, but no unit name

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:27 +08:00
Rafał Miłecki
5ccb9f9cf0 arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY mode
Port 7 is connected to the external BCM53134S switch using RGMII.

Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-13 09:49:57 -08:00
Rafał Miłecki
6a30934a54 arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1
Archer C2300 V1 is a home router based on the BCM4906 (2 CPU cores). It
has 512 MiB of RAM, NAND flash, USB 2.0 and USB 3.0 ports, 4 LAN ports,
1 WAN port.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-13 09:49:50 -08:00
Bjorn Andersson
40a5aa1f54 arm64: dts: qcom: pm8150: Enable RTC
The PM8150 comes with everything the RTC needs, so let's just leave it
enabled instead of having to explicitly enable it for all boards.
In effect this patch enables the RTC on the SM8150 MTP and the SM8250
HDK.

Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210106001004.4081508-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 16:47:22 -06:00
Vinod Koul
f67cc6a91d arm64: dts: qcom: sm8350-mtp: Add PMICs
SM8350-MTP features PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
PMR735B. PMICs Add the dtsi for these PMICs to MTP.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-9-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 11:24:39 -06:00
Vinod Koul
93e7195946 arm64: dts: qcom: pmr735B: Add base dts file
Add base DTS file for PMR735B along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-8-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 11:24:34 -06:00
Vinod Koul
59319dee21 arm64: dts: qcom: pmr735a: Add base dts file
Add base DTS file for PMR735A along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-7-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 11:24:32 -06:00
Vinod Koul
58befd8f60 arm64: dts: qcom: pm8350c: Add base dts file
Add base DTS file for PM8350C along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-6-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 11:24:29 -06:00
Vinod Koul
950775d9cb arm64: dts: qcom: pm8350b: Add base dts file
Add base DTS file for PM8350B along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-5-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 11:24:26 -06:00
Vinod Koul
094da73ff0 arm64: dts: qcom: pm8350: Add base dts file
Add base DTS file for PM8350 along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-4-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 11:24:21 -06:00
Vinod Koul
712d68d128 arm64: dts: qcom: pmk8350: Add base dts file
Add base DTS file for PMK8350 along with GPIO node

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 11:24:14 -06:00
Vinod Koul
389cd7acbb arm64: dts: qcom: sm8350: Add spmi node
Add SPMI node found in SM8350 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-03-12 11:23:58 -06:00
Yoshihiro Shimoda
92c406ed0a arm64: dts: renesas: r8a77961: Add CAN nodes
Add the device nodes for all CAN nodes on R-Car M3-W+.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Link: https://lore.kernel.org/r/20210312025420.529339-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-12 09:31:43 +01:00
Phong Hoang
7e2a95d953 arm64: dts: renesas: r8a779a0: Add CMT support
This patch adds CMT{0|1|2|3} device nodes for R-Car V3U (r8a779a0) SoC.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
[wsa: rebased, double checked values, corrected sorting]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210311092939.3129-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-12 09:31:43 +01:00