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On many arm64 qcom device trees, running `make dtbs_check` yells:
timer@17c20000: #size-cells:0:0: 1 was expected
It appears that someone was trying to assert the fact that sub-nodes
describing frames would never have a size that's more than 32-bits
big. That does indeed appear to be true for all cases I could find.
Currently many arm64 qcom device tree files have a #address-cells and
about in commit bede7d2dc8f3 ("arm64: dts: qcom: sdm845: Increase
address and size cells for soc"). That means the only way we can
shrink them down is to use a non-empty ranges.
Since forever it has said in "writing-bindings.txt" to "DO use
non-empty 'ranges' to limit the size of child buses/devices". I guess
we should start listening to it.
I believe (but am not certain) that this also means that we should use
"ranges" to simplify the "reg" of our sub devices by specifying an
offset. Let's update the example in the bindings to make this
obvious.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Add an entry for erratum A011043: the MDIO_CFG[MDIO_RD_ER]
bit may be falsely set when reading internal PCS registers.
MDIO reads to internal PCS registers may result in having
the MDIO_CFG[MDIO_RD_ER] bit set, even when there is no
error and read data (MDIO_DATA[MDIO_DATA]) is correct.
Software may get false read error when reading internal
PCS registers through MDIO. As a workaround, all internal
MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
In some platforms, they disable the power-supply of eeprom due
to power consumption reduction. This patch add vcc-supply property.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Since commit 0f0581b24bd0 ("spi: fsl: Convert to use CS GPIO
descriptors"), the prefered way to define chipselect GPIOs is using
'cs-gpios' property instead of the legacy 'gpios' property.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/7556683b57d8ce100855857f03d1cd3d2903d045.1574943062.git.christophe.leroy@c-s.fr
Here are the interconnect patches for the 5.6-rc1 merge window.
- New core helper functions for some common functionalities in drivers.
- Improvements in the information exposed via debugfs.
- Basic tracepoints support.
- New interconnect driver for msm8916 platforms.
- Misc fixes.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJeIXe2AAoJEIDQzArG2BZjmToQAMijCGSN8TkzoS1/9w95ML9Q
vbth57JAjHRoigpIt2nVP9c/oIAqxprIB+ZsXX6pKUtnRVTJo/gviQEw1UCqMp58
d1v2Yb/b8lyzAbXdiVHbFKjF7pdNRUZDraMZ7HSC3UGD1LIy5cx0YjqwYyWFJEz6
+9Ko3uDYEGqh3HM4Ybl5X5F019tdYY8TrTpajnKnh9yQDh3SAzw5mEDc7PuldAFn
jgd0KVx56LRKWpA7SKfCjfsS8h4Ft48yzaUATJdNlcihl09mvNYcJ8ZHrGod/n/B
cBKSwdaKwK0/LuGHrEM6I4UmbbfTmiNJ9dImtMwo5XapBG+OFBNhcVukJrW5xINe
D3N9hXdUWSnnQyT+sOm8U3cL70PiueKP/CofhEJ4UxBrlckYfPGCZLLTAi4+dfPS
T2rTonMGNIBCoqZ7iLDGff8uVQxGfOJkdNfd/UpJ64OLshQIXU+WQfa9PbVzkTly
5opGJlU4X261S3lxxYCKFAP0QGUyDvrzItSMBegcDvUFFwQN06ISMYdXp0VJh3xk
vYXV3vokqKJZcU8/YBGlZU8DAlHMxtEETt2B+Ua2tuYMzyHFWd76aQt3q7Id0xRB
Dp6FoZROyBMgH00FCAdAK25dhL0M2CiUpSjmgDXprZeMX1YJRz24zR4u+fJOmq5g
XZpJM/HIdRlq9pHHEZ/h
=5hpf
-----END PGP SIGNATURE-----
Merge tag 'icc-5.6-rc1' of https://git.linaro.org/people/georgi.djakov/linux into char-misc-next
Georgi writes:
interconnect patches for 5.6
Here are the interconnect patches for the 5.6-rc1 merge window.
- New core helper functions for some common functionalities in drivers.
- Improvements in the information exposed via debugfs.
- Basic tracepoints support.
- New interconnect driver for msm8916 platforms.
- Misc fixes.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
* tag 'icc-5.6-rc1' of https://git.linaro.org/people/georgi.djakov/linux:
interconnect: qcom: Add MSM8916 interconnect provider driver
dt-bindings: interconnect: Add Qualcomm MSM8916 DT bindings
interconnect: Check for valid path in icc_set_bw()
interconnect: Print the tag in the debugfs summary
interconnect: Add interconnect_graph file to debugfs
interconnect: qcom: Use the standard aggregate function
interconnect: Add a common standard aggregate function
interconnect: Add basic tracepoints
interconnect: Add a name to struct icc_path
interconnect: Move internal structs into a separate file
interconnect: qcom: Use the new common helper for node removal
interconnect: Add a common helper for removing all nodes
- Extend firmware interface for feature checking
- Use mailbox for communication with firmware for power management
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXibIfgAKCRDKSWXLKUoM
ISEiAJ0dOki4FCVTEloO1IIcbgY38SgvlwCfTSN4RQThu5iiG40ODZp4cJMaZmA=
=jGIz
-----END PGP SIGNATURE-----
Merge tag 'zynqmp-soc-for-v5.6' of https://github.com/Xilinx/linux-xlnx into arm/drivers
arm64: soc: ZynqMP SoC changes for v5.6
- Extend firmware interface for feature checking
- Use mailbox for communication with firmware for power management
* tag 'zynqmp-soc-for-v5.6' of https://github.com/Xilinx/linux-xlnx:
drivers: soc: xilinx: Use mailbox IPI callback
dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
drivers: firmware: xilinx: Add support for feature check
Link: https://lore.kernel.org/r/f6fb26f8-b00d-a3e8-bf7d-c7ff2a8483b1@monstr.eu
Signed-off-by: Olof Johansson <olof@lixom.net>
According to the Denali NAND Flash Memory Controller User's Guide,
this IP has two reset signals.
rst_n: reset most of FFs in the controller core
reg_rst_n: reset all FFs in the register interface, and in the
initialization sequencer
This commit specifies these reset signals.
It is possible to control them separately from the IP point of view
although they might be often tied up together in actual SoC integration.
At least for the upstream platforms, Altera/Intel SOCFPGA and Socionext
UniPhier, the reset controller seems to provide only 1-bit control for
the NAND controller. If it is the case, the resets property should
reference to the same phandles for "nand" and "reg" resets, like this:
resets = <&nand_rst>, <&nand_rst>;
reset-names = "nand", "reg";
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Add IPI mailbox property and its example in xilinx zynqmp-power
documentation.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
New binding document for
Texas Instruments K3 NAVSS Unified DMA – Peripheral Root Complex (UDMA-P).
UDMA-P is introduced as part of the K3 architecture and can be found in
AM654 and j721e.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20191223110458.30766-10-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
enable straightforward passing of work between a producer and a consumer.
There is one RINGACC module per NAVSS on TI AM65x SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJeH1VYAAoJEHJsHOdBp5c/k4cP/RHrk67mB8L6JC7G9H1XWedM
w4aG80q7u8dAydk9k3wJM1Y4ChXfflR3JYc5KBghrsQiRPF8myh4JEwi3+8jpTT5
LUOJifaEtR79VuNCHyG9Wgni3LWYnp7HmG4jM1bzcDwLgpf4I8cBwXkCfW0kmyPq
HAaFLWo1net3TkhSnUkbFUn54vESl569/D6FIfFFK2DPJH/gLUKQ6W8Xnd1uKBaI
9RpnN6eGA0ZWZkZG+Xu7XA/VfC/AR+wxbCr0l1jHB9+4CrngOEwsTnP1SFxFsD1v
L7zAT5JguNg13jbELVgTpUX8X5/XBfbOzIrNZpeXnl0fl8p2SU25n8hw8KdYjKCP
5puO6wye5NnliQs5hLlMTydF77VazAqdBhLz5i1OMa+cuA1zVzm7dyIZBAWbI8IC
TY86h9eGyGKELjljrYhW8ijARbzu/J3SpO3cSklvL/BfXtlVYen5d0mZxsKBDWOi
bni1yV37b65IWjkimwzkaVq/sN9jWTAF2a192SkKeEBqnms5jxKDeCRq9qSxpCWv
ONFROd6WXImDTk/MLgo4EdAq+ProoBFR+YDLModSAv3fZaBFUgi5mU5Xnx1+cAFq
SL9TguzvXhUv6o6ywNZSsSM/7I2iB5uOMRKjCeGg2x1JN9lyOMzrVlJ8JzzUyKV3
iiKDJjNdZD0/Rn2fl5a1
=m1rI
-----END PGP SIGNATURE-----
Merge TI ringacc driver from Santosh
This is for dependency of new TI ringacc dmaengine drivers
Merge tag 'drivers_soc_for_5.6' into topic/ti
SOC: TI Keystone Ring Accelerator driver
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
enable straightforward passing of work between a producer and a consumer.
There is one RINGACC module per NAVSS on TI AM65x SoCs.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
- clean ups of unused code and debuggability
- add cmdq_instruction to make the function call interface more readable
- add functions for polling and providing info for the user of cmdq
scpsys:
- add bindings for MT6765
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl4cPekXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6YDA/+MRYiMb26fu+Ac3pF1SW6ao0A
fCI0JH2L8Zj4nklg3Y/hoi2PG7DJL2vaG71Ng3iQxQqKLWJdS1WbF/DBl8JdozQx
mJXXZ0JM5cc/gIvrG8PLAauWRTDUIPDC2ZZ66mO4CiR6T7Kp/LpnmZF5ZR4qxu/W
KNAYxSeyPJ36WQ3HCmubBWOn4JaetOeBFID6z3roKhsGyFXLmCo0Djw4c0Lpk79t
3qVpo7TcC3hintZSC8ufIjQZA/KU3kwy3pS2O+HKMDb4EwORl14Grd6/cN9rAf0p
twprn4Y9Jx4cBy0jGyZShKMbIn6wT6zF8GqpoV71vvXTgknyr8XoaiepnjMd2Enm
BXw7R8kUt3w4mHnMwX9aUPAP48S1DVMm0OsbwOOqRcSXyJWnQBFB85LnkKeSfzRW
iWfeXQBaESCQziYkJSkXz2D4epV/Rzq/L1y5IrddQuwIlpQ3eeqYUWBDYhuV3VlY
K4r/AawG0NKPWTvH0bgLZAiWybnzXPZUvVJzwkdwRBjpiyhsl0FX1oZb1H8Vf6mK
yrCUgaTIVp6z0pMd8kaxPTyi2AXryKODOXp+XJ2JFmdLFuBPQMSLCiG+B6sDa2Sw
eYMcZpFtL5B/p/NpNuSUlGZ2HXTxknS3RnIDTUJ583BZLeItShHnBW3P/8qjx7Wm
8oGsLh0ZLF0G5iqdeuM=
=Q9/6
-----END PGP SIGNATURE-----
Merge tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
cmdq:
- clean ups of unused code and debuggability
- add cmdq_instruction to make the function call interface more readable
- add functions for polling and providing info for the user of cmdq
scpsys:
- add bindings for MT6765
* tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
dt-bindings: mediatek: add MT6765 power dt-bindings
soc: mediatek: cmdq: delete not used define
soc: mediatek: cmdq: add cmdq_dev_get_client_reg function
soc: mediatek: cmdq: add polling function
soc: mediatek: cmdq: define the instruction struct
soc: mediatek: cmdq: remove OR opertaion from err return
Link: https://lore.kernel.org/r/9b365e76-e346-f813-d750-d7cfd0d16e4e@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds the DT bindings for the NXP INTMUX interrupt multiplexer
for i.MX8 family SoCs.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200117060653.27485-2-qiangqing.zhang@nxp.com
Update dt-binding document for GPIO interrupt controller of Meson-A1 SoCs
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20191216123645.10099-2-qianggui.song@amlogic.com
Document the Aspeed SCU interrupt controller and add an include file
for the interrupts it provides.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/1579123790-6894-2-git-send-email-eajames@linux.ibm.com
Add a DT binding documentation of SCP for the
MT8183 SoC from Mediatek.
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20191112110330.179649-2-pihsun@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
We currently have a hidden dependency to the device tree node name for
the clkctrl clocks. Instead of using standard node name like "clock", we
must use "l4-per-clkctrl" type naming so the clock driver can find the
associated clock domain. Further, if "clk" is specified for a clock node
name, the driver sets TI_CLK_CLKCTRL_COMPAT flag that uses different
logic for the clock name based on the parent node name for the all the
clkctrl clocks for the SoC.
If the clock node naming dependency is not understood, the related
clockdomain is not found, or a wrong one can get used if a clock manager
has multiple clock domains.
As each clkctrl instance represents a single clock domain, let's allow
using domain specific compatible names to specify the clock domain.
This simplifies things and removes the hidden dependency to the node
name. And then later on, after the node names have been standardized,
we can drop the related code for parsing the node names.
Let's also update the binding to use standard "clock" node naming
instead of "clk" and add the missing description for reg.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Add binding for the TI's sdhci-omap controller present in am335x and
am437x devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200116105154.7685-9-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
sdhci-omap can support both external dma controller via dmaengine
framework as well as ADMA which standard SD host controller
provides. Add binding documentation for these external dma properties.
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200116105154.7685-2-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
+ sc7180 display + DSI support
+ a618 (sc7180) support
+ more UBWC (bandwidth compression) support
+ various cleanups to handle devices that use vs don't
use zap fw, etc
+ usual random cleanups and fixes
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ <CAF6AEGvv03ifuP0tp7-dmqZtr1iS=s8Vc=az8BNGtEoSMD-dkw@mail.gmail.com
Just a small set this time.
As we are very near the merge window, I've rolled a few fixes in here
rather than adding noise just before release. A short delay here will
do little harm.
New device support
* adis16480
- Add support for adis16490. After earlier rework this is simple ID plus
chip info.
Features
* kxcjk1013
- mount matrix support.
* lsm_6dsx
- mount matrix support.
Cleanups / minor or late breaking fixes
* ad7124
- add support to ad-sigma-delta and use it in this driver to allow
the the interrupt type to be IRQF_TRIGGER_LOW unlike most other devices
using this framework.
* adis
- use delay structure now available in SPI to handle transfer delays
- introduce a timeouts structure to allow support of new devices
* ak8975
- drop platform data support. No one is using it and it adds complexity.
- use device_get_match_data rather than open coding much the same thing.
* dht11
- drop meaningless todo
* at91-samad2_adc
- switch to dma_request_chan
* altas-sensor
- add a helper function to compute number of channels. Needed for new device
support that is under review.
* bma400
- add a lower bound check on scale.
* inv_mpu6050
- add support for temperature data in the fifos for all chips.
- support an odd situation where a board supports only interrupt triggering
on both edges.
* st_lsm6dsx
- check and handle potential error return.
* st_sensors
- fix some values for the LSM9DS0 which is ever so slightly different from
other devices using the same whoami value.
- switch over to generic functions from dt ones, avoiding need for separate
ACPI support.
* stm32-adc
- switch to dma_request_chan
- suppress an error print in deferred probe case.
* stm32-dac
- drop private data structure element for reset controller as only used in
probe.
- reflect more cleanly that the reset controller is optional whilst ensuring
that if is specified any errors are caught.
* stm32-dfsdm
- switch to dma_request_chan
- fix missing application of formatting to single conversions.
- ensure the sampling rate is updated when the oversampling ratio is changed.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAl4jXUMRHGppYzIzQGtl
cm5lbC5vcmcACgkQVIU0mcT0FogF3A//Zv8vsOT11FI2+ntE94yyHk+HE8HunPVf
tAWQ8AJX587QxqUqfidt4unH7r/62ybIXQTA+Dp0A2KnnL3iZU/qpAUfosQpWPeo
60Xr59a7E/Igs6sO9fUHCqmF8wKdjdoiUduApA4mhp4k7JfVAoGwyQfE7JppZPR4
VqJwDS+JyzY2IJXi/GbdWmwa1rQ/dkeY/lhy7cBOVVV/tu2Pow3QD69qDxLr4jrK
Ck1p2PmUMI0cBXnThQGcyn3vOX/1irY9QJdt7PlVMSEmBnE1P4/Htvd40tG9o39S
giOTufGG+A5VDRMnPW3qW32ccgQ/YFuqpmf083YlfhYaZUtRVJjlMwJnY8AQko31
Qg9VW4M8XjQI1XivuIgJONk4vzXGSbVvynI2qXuFsS0YvnuLOH4OU/MjGbEIBZ6r
xBIoAVLueVjNshFS9ShsoJA6iBLouXoCpVutrnXpiCGGSCnf+oo6X9hj//JcfZFi
jgsrltH7ae3V3N//QziAQ5Dw00/HcImJW0eNpOVQ/p3hJc7ImzDPps4FBW439A/K
ni7dFvFhSpDIkuLVwql+/eyoMJWNBcW+dTUy5OWUgPl/yDKIN5rNtCQwN07ZuJdG
6ieBdrvNO2Y58vql4jJXQqR0OagQ4o0Yu1CnyXLFvqK1G9a1pFKEXcKkJLEZYwf5
Kz0dAtQTUGQ=
=/q/r
-----END PGP SIGNATURE-----
Merge tag 'iio-for-5.6b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
Second set of new device support, features and minor fixes for IIO in the 5.6 cycle
Just a small set this time.
As we are very near the merge window, I've rolled a few fixes in here
rather than adding noise just before release. A short delay here will
do little harm.
New device support
* adis16480
- Add support for adis16490. After earlier rework this is simple ID plus
chip info.
Features
* kxcjk1013
- mount matrix support.
* lsm_6dsx
- mount matrix support.
Cleanups / minor or late breaking fixes
* ad7124
- add support to ad-sigma-delta and use it in this driver to allow
the the interrupt type to be IRQF_TRIGGER_LOW unlike most other devices
using this framework.
* adis
- use delay structure now available in SPI to handle transfer delays
- introduce a timeouts structure to allow support of new devices
* ak8975
- drop platform data support. No one is using it and it adds complexity.
- use device_get_match_data rather than open coding much the same thing.
* dht11
- drop meaningless todo
* at91-samad2_adc
- switch to dma_request_chan
* altas-sensor
- add a helper function to compute number of channels. Needed for new device
support that is under review.
* bma400
- add a lower bound check on scale.
* inv_mpu6050
- add support for temperature data in the fifos for all chips.
- support an odd situation where a board supports only interrupt triggering
on both edges.
* st_lsm6dsx
- check and handle potential error return.
* st_sensors
- fix some values for the LSM9DS0 which is ever so slightly different from
other devices using the same whoami value.
- switch over to generic functions from dt ones, avoiding need for separate
ACPI support.
* stm32-adc
- switch to dma_request_chan
- suppress an error print in deferred probe case.
* stm32-dac
- drop private data structure element for reset controller as only used in
probe.
- reflect more cleanly that the reset controller is optional whilst ensuring
that if is specified any errors are caught.
* stm32-dfsdm
- switch to dma_request_chan
- fix missing application of formatting to single conversions.
- ensure the sampling rate is updated when the oversampling ratio is changed.
* tag 'iio-for-5.6b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (29 commits)
iio: dac: stm32-dac: better handle reset controller failures
iio: dac: stm32-dac: use reset controller only at probe time
dt-bindings: iio: accel: kxcjk1013: Document mount-matrix property
iio: accel: kxcjk1013: Support orientation matrix
iio: imu: st_lsm6dsx: add mount matrix support
iio: adc: stm32-adc: don't print an error on probe deferral
dt-bindings: iio: adis16480: add compatible entry for ADIS16490
iio: imu: adis16480: Add support for ADIS16490
iio: accel: bma400: prevent setting accel scale too low
iio: imu/mpu6050: support dual-edge IRQ
iio: imu: inv_mpu6050: add fifo temperature data support
iio: magnetometer: ak8975: Convert to use device_get_match_data()
iio: magnetometer: ak8975: Get rid of platform data
iio: adc: ad7124: Set IRQ type to falling
iio: adc: ad-sigma-delta: Allow custom IRQ flags
iio: imu: adis: use new `delay` structure for SPI transfer delays
iio: adc: stm32-dfsdm: adapt sampling rate to oversampling ratio
iio: adc: stm32-dfsdm: fix single conversion
iio: st_sensors: Make use of device properties
iio: st_sensors: Drop redundant parameter from st_sensors_of_name_probe()
...
The generic IIO mount-matrix property conveys physical orientation of the
hardware chip.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This round we have bunch of updates to interfaces for ASoC (audio)
subsystem by Intel and a new Qualcomm controller driver
Details
- Updates for sdw_slave interfaces for ASoC
- Updates to cadence library and intel driver
- New Soundwire controller for Qualcomm masters
- Rework of device number assignment
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAl4iq9AACgkQfBQHDyUj
g0e5Zg/8DS1KK/zzBPP5QTcNRzJvGngGBxsXkH6fEInfc9bD6XK+DgQ5c3N0NP4A
njw4sBBKd6V1XSxaUKbOWXTLFGvxDl4tHghlwD1hUwMcb+jmAsaHhfpKCUGrzQD8
0rtGmSrwRyRj8QZeSU6s6bf8zynXpSEaJs5+yE/t8A8fzQobINVR5n2sfhLKRUYk
+2n+3XRy1oipYWFaEWT/2JHui2iDv9QcH5Ssvlj01DImKXXGFD6Zb3JzJSfanv6t
YKpEor8hTV5C2/Y8GYEMZWSJHwuvCTq4G3NJ4x3FxSj10D5gi8ZzHg2jnMTwvNjw
teFsu9NP0Et1diDl1WGtAxx1HhMHY3Zoihu+fJ35c6kmYRWdm+ymTtSL2CQg2p6/
/IcWWHkeNC6ziOsABUn33HH4hPmjNmXeKqtRdJNCOaXtQgG2ncMQIx+xWClmSNP8
N4/tLcGjLLAIJFGT7aYsc2ysMVBH6bWgz4lmZLMUDxBEynSxairtExDx8oYowkBj
2nDhUe39ROdrgJtFU9IdDtqSSRliSQ9rLy5g6r4SwfFb+A3I4XJn4kDJ6YqHlw7H
Mv5js0a+C7QfYIAWvmn3WHuzqUpHloN44/lRUmcr5gT2DyJX+sNPZK/DsCsspTkQ
k16tMUZU29A27tYxl07M6OKxQaS/Q49zZJuS0BkcZOYt+A5NPZk=
=PDic
-----END PGP SIGNATURE-----
Merge tag 'soundwire-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire into char-misc-next
Vinod writes:
soundwire updates for v5.6-rc1
This round we have bunch of updates to interfaces for ASoC (audio)
subsystem by Intel and a new Qualcomm controller driver
Details
- Updates for sdw_slave interfaces for ASoC
- Updates to cadence library and intel driver
- New Soundwire controller for Qualcomm masters
- Rework of device number assignment
* tag 'soundwire-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire: (27 commits)
dt-bindings: soundwire: fix example
soundwire: cadence: fix kernel-doc parameter descriptions
soundwire: intel: report slave_ids for each link to SOF driver
soundwire: intel: fix factor of two in MCLK handling
soundwire: bus: fix device number leak on errors
soundwire: cadence: remove useless variable incrementation
soundwire: cadence: update kernel-doc parameter descriptions
soundwire: qcom: add support for SoundWire controller
dt-bindings: soundwire: add bindings for Qcom controller
soundwire: bus: check first if Slaves become UNATTACHED
soundwire: cadence_master: handle multiple status reports per Slave
soundwire: cadence_master: remove config update for interrupt setting
soundwire: cadence_master: log more useful information during timeouts
soundwire: cadence_master: clear interrupt status before enabling interrupt
soundwire: cadence_master: filter out bad interrupts
soundwire: stream: remove redundant pr_err traces
soundwire: intel: add clock stop quirks
soundwire: intel: add mutex for shared SHIM register access
soundwire: intel: add prototype for WAKEEN interrupt processing
soundwire: intel: add link_list to handle interrupts with a single thread
...
This change adds an entry for ADIS16490 in the list of compatible devices
defined in the dt-bindings of the adis16480 driver.
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
enable straightforward passing of work between a producer and a consumer.
There is one RINGACC module per NAVSS on TI AM65x SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJeH1VYAAoJEHJsHOdBp5c/k4cP/RHrk67mB8L6JC7G9H1XWedM
w4aG80q7u8dAydk9k3wJM1Y4ChXfflR3JYc5KBghrsQiRPF8myh4JEwi3+8jpTT5
LUOJifaEtR79VuNCHyG9Wgni3LWYnp7HmG4jM1bzcDwLgpf4I8cBwXkCfW0kmyPq
HAaFLWo1net3TkhSnUkbFUn54vESl569/D6FIfFFK2DPJH/gLUKQ6W8Xnd1uKBaI
9RpnN6eGA0ZWZkZG+Xu7XA/VfC/AR+wxbCr0l1jHB9+4CrngOEwsTnP1SFxFsD1v
L7zAT5JguNg13jbELVgTpUX8X5/XBfbOzIrNZpeXnl0fl8p2SU25n8hw8KdYjKCP
5puO6wye5NnliQs5hLlMTydF77VazAqdBhLz5i1OMa+cuA1zVzm7dyIZBAWbI8IC
TY86h9eGyGKELjljrYhW8ijARbzu/J3SpO3cSklvL/BfXtlVYen5d0mZxsKBDWOi
bni1yV37b65IWjkimwzkaVq/sN9jWTAF2a192SkKeEBqnms5jxKDeCRq9qSxpCWv
ONFROd6WXImDTk/MLgo4EdAq+ProoBFR+YDLModSAv3fZaBFUgi5mU5Xnx1+cAFq
SL9TguzvXhUv6o6ywNZSsSM/7I2iB5uOMRKjCeGg2x1JN9lyOMzrVlJ8JzzUyKV3
iiKDJjNdZD0/Rn2fl5a1
=m1rI
-----END PGP SIGNATURE-----
Merge tag 'drivers_soc_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
SOC: TI Keystone Ring Accelerator driver
The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
enable straightforward passing of work between a producer and a consumer.
There is one RINGACC module per NAVSS on TI AM65x SoCs.
* tag 'drivers_soc_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: k3: add navss ringacc driver
bindings: soc: ti: add documentation for k3 ringacc
Link: https://lore.kernel.org/r/1579205259-4845-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Detailed description for this pull request:
1. Update devfreq core
- Add new 'name' attribute of sysfs to show the device name
: /sys/class/devfreq/devfreqX/name
- Make 'trans_stat' sysfs resetting by entering zero(0) as following
: echo 0 > /sys/class/devfreq/devfreqX/trans_stat
- Add debugfs support with 'devfreq_summary' file to show the summary
: /sys/kernel/debug/devfreq/devfreq_summary
- Change the type of time variable to 64bit to prevent the overflow
- Make the separate devfreq_stats including the statistics information
- Fix the minor coding-style like indentation and kernel-doc warnings
2. Update devfreq driver
- Add new imx8m-ddrc.c devfreq driver for dynamic scaling of DDR frequency.
It changes the DDR frequency by using ARM SMCCC(SMC Calling Convention)
interface to control TF-A firmware.
- Add COMPILE_TEST dependency for rk3399_dmc.c
- Clean-up code for exynos-bus.c and rk3399_dmc.c without behavior changes
3. Update devfreq-event driver
- Fix excessive stack usage of exynos-ppmu.c and clean-up code of
rockchip-dfi.c without behavior changes
-----BEGIN PGP SIGNATURE-----
iQJKBAABCgA0FiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAl4hO3sWHGN3MDAuY2hv
aUBzYW1zdW5nLmNvbQAKCRCczd8s3uvPU54AD/0Qf33Q+93uI4LNW8qfW37OHpb9
nyuzeTu9Gj+c/SDxz5BPqeWPFOjIJAL3fWGeNkObBYRYIwbVkC6+lxLE07UH7B+w
UOsEHcmBUypIBPC9i34CqciyjvKQFEdMk1/NoS79G9OXW8wnAooQF4n6fxJkbhwh
ZoY+AzhnadNLP6rKzi2JBYrMaEvXpPLL7aY336wCt+LXKPyFkLziCK5nni0Zouil
UPA+reX/2cv6OHebDp2mgK1QKh43ohWNuX33ik3x2mFtJ8BiZ/jiKWN0O4lraz0O
6P3/fZIMNzBqUafQdVymAr3vRykt1JlfaRhinDKXmEk6VNuX1vO2qCPc1Hc3etJX
Zwbgc2Oe9r/88zt6N6ZRg50ehRGv6RNGBlRgyXZ2OUbPQz9jEHqZ0OiUcFrh3emd
QD4RKFA+yc9r2vC9UF6ZwMynnxeM+nAP8EapzOJFAZa41JNWKWdP6V3PhjpzDz3+
cNobPQUgsTAGuw30uNSuMSKLU8L1Hb1r0OkebvGBoSxT/qMkUEDp2fFjhAUYyQ/e
vyUia6yl9hPbzwd5QBSV7FKhwoEonwRtOlrb3MjJscOGNW3TIfzsMePVYj4M7P0/
rdHSCcGHKLsbm8cbRDOeJRNOHFFh17M3vVRjpRUUWZ/laLcRk2hNqEI3V4KFeUmK
tEAERSzsVot1tpCidQ==
=m9LV
-----END PGP SIGNATURE-----
Merge tag 'devfreq-next-for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux
Pull devfreq updates for v5.6 from Chanwoo Choi:
"1. Update devfreq core
- Add new 'name' attribute of sysfs to show the device name
: /sys/class/devfreq/devfreqX/name
- Make 'trans_stat' sysfs reset by entering zero(0)
: echo 0 > /sys/class/devfreq/devfreqX/trans_stat
- Add debugfs support with 'devfreq_summary' to show the summary
: /sys/kernel/debug/devfreq/devfreq_summary
- Change the type of time variable to 64bit to avoid overflows.
- Make separate devfreq_stats including the statistics information.
- Fix minor coding-style like indentation and kernel-doc warnings.
2. Update devfreq drivers
- Add new imx8m-ddrc.c devfreq driver for dynamic scaling of DDR frequency.
It changes the DDR frequency by using ARM SMCCC(SMC Calling Convention)
interface to control TF-A firmware.
- Add COMPILE_TEST dependency for rk3399_dmc.c.
- Clean-up code for exynos-bus.c and rk3399_dmc.c without behavior changes
3. Update devfreq-event drivers
- Fix excessive stack usage of exynos-ppmu.c and clean-up code of
rockchip-dfi.c without behavior changes."
* tag 'devfreq-next-for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux: (24 commits)
PM / devfreq: Add debugfs support with devfreq_summary file
PM / devfreq: exynos: Rename Exynos to lowercase
PM / devfreq: imx8m-ddrc: Fix inconsistent IS_ERR and PTR_ERR
PM / devfreq: exynos-bus: Add error log when fail to get devfreq-event
PM / devfreq: exynos-bus: Disable devfreq-event device when fails
PM / devfreq: rk3399_dmc: Disable devfreq-event device when fails
PM / devfreq: imx8m-ddrc: Remove unused defines
PM / devfreq: exynos-bus: Reduce goto statements and remove unused headers
PM / devfreq: rk3399_dmc: Add COMPILE_TEST and HAVE_ARM_SMCCC dependency
PM / devfreq: rockchip-dfi: Convert to devm_platform_ioremap_resource
PM / devfreq: rk3399_dmc: Add missing of_node_put()
PM / devfreq: rockchip-dfi: Add missing of_node_put()
PM / devfreq: Fix multiple kernel-doc warnings
PM / devfreq: exynos-bus: Extract exynos_bus_profile_init_passive()
PM / devfreq: exynos-bus: Extract exynos_bus_profile_init()
PM / devfreq: Move declaration of DEVICE_ATTR_RW(min_freq)
PM / devfreq: Move statistics to separate struct devfreq_stats
PM / devfreq: Add clearing transitions stats
PM / devfreq: Change time stats to 64-bit
PM / devfreq: Add new name attribute for sysfs
...
*) Add support in PHY core to create link between PHY consumer and PHY
provider
*) Add DisplayPort PHY configuration set to be used for negotiating the
configurations to be used between DisplayPort controller and
DisplayPort PHY
*) Add PHY wrapper driver (configure inputs to Cadence Sierra PHY) for
TI's J721E SoC and adapt Cadence Sierra PHY driver to be used for
J721E SoC (Supports USB and PCIe)
*) Add PHY driver for eMMC PHY in Intel LGM SoC
*) Add PHY support for 7216 and 7211 Broadcom SoCs which uses the new
Synopsys USB Controller
*) Add support for 16nm SATA PHY present in Broadcom 7216 SoC
*) Fix lost packet issue, fix MDIO from getting inaccessible, fix
occasional transaction failures, fix USB driver from crashing in
Broadcom USB PHY driver
*) Fix missing PCS SW reset in UFS PHY of Qualcomm SM8150
*) Use "struct phy_configure_opts_mipi_dphy" to pass parameters from
display controller to rockchip-inno-dsidphy
*) Other cleanups including compile testing for some of the PHY drivers,
fixing Kconfig indentation, duplicate writes in drivers etc.,
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEEUXMr/TfP2p4suIY5Dlx4XIBNgtkFAl4hRU4OHGtpc2hvbkB0
aS5jb20ACgkQDlx4XIBNgtkSnw//a1zdT1NF2RApEAbSUcB+KHpckRLjKix4Q34r
XexDI7/qVT1FQIDSOjxNOBhPVpATCE8O/pd71gVPUYqy67xmXhLK/FmBm90pzDYb
JEt6zwaDoUaljFXN3OqXC1Z6q2hwRuKdERLQ0dajh8GAbkt0OOlzT8QXwv3m0YFg
gUto2yytH8ZM/kdm3so1vc6vKtinW8QLlcigsgpaXVjQijeTaC5Wi1vxwgYeQE8K
mHjipnCUl8mcuwKxAVFobSHxxSANWt6KJC0MOEB38xhsvylYgbE6ERoCHL5bERJA
bsOJdiMAc3+UzlnbGlRNVTTkBReYWtSZ7MyHtjnPAl5xIpDk6/arPkX+KGzKTP/a
MTC0XPHDXs2je+Nz2U2BRPecpjUkEDJ4rN1C8ZiqW6mJslsHmLE/NSax0uT9jX7V
VK9Z6GJ2b7Yl/myf4DVyD6amN4EA8jK0U2q5tb3zI7boZG0RHauAfcStn1lKPBQV
oBycIDPkcEbwOHRBimB3VIXJYcnVR0xEqiReU79tN2JZKKirlmkPmRfMVx2pS0Vc
5EvYigzVo0u0cC+Y7aEHpi4prEWaG+xw/6Y8l5QQ+BL4rJbNoL1281HT0m/v5YT2
x+N1uSDhc5vtRXGcSMadHl7DLDO9Wxh8WpI9bZ9aRvyy9xiUwAG/vaXSpoUIyOrH
GRKuXXc=
=76zg
-----END PGP SIGNATURE-----
Merge tag 'phy-for-5.6_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
phy: for 5.6
*) Add support in PHY core to create link between PHY consumer and PHY
provider
*) Add DisplayPort PHY configuration set to be used for negotiating the
configurations to be used between DisplayPort controller and
DisplayPort PHY
*) Add PHY wrapper driver (configure inputs to Cadence Sierra PHY) for
TI's J721E SoC and adapt Cadence Sierra PHY driver to be used for
J721E SoC (Supports USB and PCIe)
*) Add PHY driver for eMMC PHY in Intel LGM SoC
*) Add PHY support for 7216 and 7211 Broadcom SoCs which uses the new
Synopsys USB Controller
*) Add support for 16nm SATA PHY present in Broadcom 7216 SoC
*) Fix lost packet issue, fix MDIO from getting inaccessible, fix
occasional transaction failures, fix USB driver from crashing in
Broadcom USB PHY driver
*) Fix missing PCS SW reset in UFS PHY of Qualcomm SM8150
*) Use "struct phy_configure_opts_mipi_dphy" to pass parameters from
display controller to rockchip-inno-dsidphy
*) Other cleanups including compile testing for some of the PHY drivers,
fixing Kconfig indentation, duplicate writes in drivers etc.,
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-5.6_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (54 commits)
dt-bindings: phy: Add PHY_TYPE_DP definition
phy: ti: j721e-wiz: Fix return value check in wiz_probe()
dt-bindings: usb: Convert Allwinner A80 USB PHY controller to a schema
phy: intel-lgm-emmc: Fix warning by adding missing MODULE_LICENSE
phy: ti: j721e-wiz: Manage typec-gpio-dir
dt-bindings: phy: ti,phy-j721e-wiz: Add Type-C dir GPIO
phy: cadence: Sierra: add phy_reset hook
phy: cadence: Sierra: remove redundant initialization of pointer regmap
phy: Add DisplayPort configuration options
phy: Enable compile testing for some of drivers
phy: mediatek: Fix Kconfig indentation
phy: intel-lgm-emmc: Add support for eMMC PHY
dt-bindings: phy: intel-emmc-phy: Add YAML schema for LGM eMMC PHY
phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC
dt-bindings: phy: Document WIZ (SERDES wrapper) bindings
phy: cadence: Sierra: Use correct dev pointer in cdns_sierra_phy_remove()
phy: cadence: Sierra: Set cmn_refclk_dig_div/cmn_refclk1_dig_div frequency to 25MHz
phy: cadence: Sierra: Change MAX_LANES of Sierra to 16
phy: cadence: Sierra: Check for PLL lock during PHY power on
phy: cadence: Sierra: Get reset control "array" for each link
...
- add DDR clock controller
- GPU OPP updates
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl4XcxQACgkQWTcYmtP7
xmVjBhAAqL8rNKURAhAs7TkdgXxv3DGA1BlcMi0Sb/iuwlNBu5AbptO31FY7Jqb1
ZZ/GFRUljj1BHapjzekdMJUpqwQdPOtDKSrlhc65BkkAcgzXkzTlvvNiS/8/hMEC
RNrmT+O/YgOys/FpSc2wPdzg6WAgql9vhG0pAlI7gth3tPZxQosLTlzNDJ3yW9+K
qhPx5ivF1Q3w6TPnM0Q4eZj4MHnUSeQUDc6aA1b02V1ojt6pqeBkzVFzXyxdxWNs
yp3E8tLmNhQ6p2B3kCPTDt2H4jH1wEei1CrsnZFB4WMu80EoWnNi+VjsoBajmlR2
lufMkX623K47NlZiZ7/XQZ0ki5/09TqDJ4W53mPrpebJ7Cmw8sdSz/tMZ7cOveh0
FRa4VCSTiq4BxfdFks4vXPLDX40ucTXHA26jc1Hrrbb7n6uC93i87I5At7U03SY7
r4Lddd/1Rh6du7hLmxAEM5Ul9M5m82GYFYXgNKngsJHUxz/V1/Ym+rSzBFM/csBj
U2maAFYvvR8B3WBQfpONIYgUo5gJ8YgxglmboivZM226VgalPzsMtEm467xvROKn
xT7knR/pHu9wWL6OxCZGXsEQfjJM3FKn6Z1Fe2VolJpaouULdqBxWfRtnSMUwmgG
E/WqojV/8AOZSSqj6/ixQBr2Soaaim/Q2LmM81lBjcJ+bTCtSlA=
=CTqX
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: Amlogic updates for v5.6
- add DDR clock controller
- GPU OPP updates
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP
ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP
ARM: dts: meson8b: fix the clock controller compatible string
ARM: dts: meson8b: add the DDR clock controller
ARM: dts: meson8: add the DDR clock controller
ARM: dts: meson: provide the XTAL clock using a fixed-clock
dt-bindings: clock: meson8b: add the clock inputs
dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding
Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com
Signed-off-by: Olof Johansson <olof@lixom.net>
* SCM major refactoring and cleanup
* Properly flag active only power domains as active only
* Add SC7180 and SM8150 RPMH power domains
* Return EPROBE_DEFER from QMI if packet family is not yet available
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl4czaUbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FgKkP/1QC1e9VUQ5xc25A+2g0
5fVbOUkQxHLsPtTuN2GUwlxo5dj/dTnvXrQziQLfSGeAhX8FRNnImH0NCwNt7vmU
i8XeRV/+Biv5IXhdM5k7IgT5bIwj3cQbzfswUL9KcCBxceJs8WDhtiu2MxeZh1g2
Gjq5+pRpC8yOC3v8AiFDWINoBduBqJGwucBtIE33/+29RqN4b7hLl4WK75yvp2Ce
mpnB0Pl7GcvVeQZNAogUQW1u7kogmq+ByqBhpYXhlhUGw/CYSF2gIdfU6piiEJCz
GWYfslABgYcGJGwMu+1RGVxe5+5I21ONUj2t8ichS5kmIZQ1lnavEAeGJ6cM8G3Y
kDsQSE5eTfFJ13lX0HXCd6COUS6ZBV0xcoUek+gvzIu94U9l2D/qINf9kX91cPFq
OSJlFJG1Yx9rcL1j1ROhDMMvuzr9QYslZZyGTRwVIwXLMQRT3Xzpx4qzATgWme5H
vPJ55dMtxAWPk5NqxHurFbDP5nIRPyJ1M7IgjTJQrWp97mXx3+RCKdO6UEeqJu/1
wdp7IwziErNjOAbFgdboFdncFOEvwctwayDOEjb7gZE8WsSCa1LwXWZfXulkaOcC
MTYnLZKZJtRJiy8WT/NvIukc60CnjYMj6IV1Vkem6NGSkvglhpRCGrxUuKi76+JR
5vPfeYhJ79KlkTWSr8lhh5VG
=IcVk
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.6
* SCM major refactoring and cleanup
* Properly flag active only power domains as active only
* Add SC7180 and SM8150 RPMH power domains
* Return EPROBE_DEFER from QMI if packet family is not yet available
* tag 'qcom-drivers-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits)
firmware: qcom_scm: Dynamically support SMCCC and legacy conventions
firmware: qcom_scm: Remove thin wrappers
firmware: qcom_scm: Order functions, definitions by service/command
firmware: qcom_scm-32: Add device argument to atomic calls
firmware: qcom_scm-32: Create common legacy atomic call
firmware: qcom_scm-32: Move SMCCC register filling to qcom_scm_call
firmware: qcom_scm-32: Use qcom_scm_desc in non-atomic calls
firmware: qcom_scm-32: Add funcnum IDs
firmware: qcom_scm-32: Use SMC arch wrappers
firmware: qcom_scm-64: Improve SMC convention detection
firmware: qcom_scm-64: Move SMC register filling to qcom_scm_call_smccc
firmware: qcom_scm-64: Add SCM results struct
firmware: qcom_scm-64: Move svc/cmd/owner into qcom_scm_desc
firmware: qcom_scm-64: Make SMC macros less magical
firmware: qcom_scm: Remove unused qcom_scm_get_version
firmware: qcom_scm: Apply consistent naming scheme to command IDs
firmware: qcom_scm: Rename macros and structures
soc: qcom: rpmhpd: Set 'active_only' for active only power domains
firmware: scm: Add stubs for OCMEM and restore_sec_cfg_available
dt-bindings: power: rpmpd: Convert rpmpd bindings to yaml
...
Link: https://lore.kernel.org/r/20200113204405.GD3325@yoga
Signed-off-by: Olof Johansson <olof@lixom.net>