1952 Commits

Author SHA1 Message Date
Linus Torvalds
45763bf4bc Char/Misc driver patches for 5.1-rc1
Here is the big char/misc driver patch pull request for 5.1-rc1.
 
 The largest thing by far is the new habanalabs driver for their AI
 accelerator chip.  For now it is in the drivers/misc directory but will
 probably move to a new directory soon along with other drivers of this
 type.
 
 Other than that, just the usual set of individual driver updates and
 fixes.  There's an "odd" merge in here from the DRM tree that they asked
 me to do as the MEI driver is starting to interact with the i915 driver,
 and it needed some coordination.  All of those patches have been
 properly acked by the relevant subsystem maintainers.
 
 All of these have been in linux-next with no reported issues, most for
 quite some time.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big char/misc driver patch pull request for 5.1-rc1.

  The largest thing by far is the new habanalabs driver for their AI
  accelerator chip. For now it is in the drivers/misc directory but will
  probably move to a new directory soon along with other drivers of this
  type.

  Other than that, just the usual set of individual driver updates and
  fixes. There's an "odd" merge in here from the DRM tree that they
  asked me to do as the MEI driver is starting to interact with the i915
  driver, and it needed some coordination. All of those patches have
  been properly acked by the relevant subsystem maintainers.

  All of these have been in linux-next with no reported issues, most for
  quite some time"

* tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (219 commits)
  habanalabs: adjust Kconfig to fix build errors
  habanalabs: use %px instead of %p in error print
  habanalabs: use do_div for 64-bit divisions
  intel_th: gth: Fix an off-by-one in output unassigning
  habanalabs: fix little-endian<->cpu conversion warnings
  habanalabs: use NULL to initialize array of pointers
  habanalabs: fix little-endian<->cpu conversion warnings
  habanalabs: soft-reset device if context-switch fails
  habanalabs: print pointer using %p
  habanalabs: fix memory leak with CBs with unaligned size
  habanalabs: return correct error code on MMU mapping failure
  habanalabs: add comments in uapi/misc/habanalabs.h
  habanalabs: extend QMAN0 job timeout
  habanalabs: set DMA0 completion to SOB 1007
  habanalabs: fix validation of WREG32 to DMA completion
  habanalabs: fix mmu cache registers init
  habanalabs: disable CPU access on timeouts
  habanalabs: add MMU DRAM default page mapping
  habanalabs: Dissociate RAZWI info from event types
  misc/habanalabs: adjust Kconfig to fix build errors
  ...
2019-03-06 14:18:59 -08:00
Linus Torvalds
384d11fa0e ARM: SoC driver updates for 5.1
As usual, the drivers/tee and drivers/reset subsystems get merged
 here, with the expected set of smaller updates and some new hardware
 support. The tee subsystem now supports device drivers to be attached
 to a tee, the first example here is a random number driver with its
 implementation in the secure world.
 
 Three new power domain drivers get added for specific chip families:
  - Broadcom BCM283x chips (used in Raspberry Pi)
  - Qualcomm Snapdragon phone chips
  - Xilinx ZynqMP FPGA SoCs
 
 One new driver is added to talk to the BPMP firmware on NVIDIA
 Tegra210
 
 Existing drivers are extended for new SoC variants from NXP,
 NVIDIA, Amlogic and Qualcomm.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "As usual, the drivers/tee and drivers/reset subsystems get merged
  here, with the expected set of smaller updates and some new hardware
  support. The tee subsystem now supports device drivers to be attached
  to a tee, the first example here is a random number driver with its
  implementation in the secure world.

  Three new power domain drivers get added for specific chip families:
   - Broadcom BCM283x chips (used in Raspberry Pi)
   - Qualcomm Snapdragon phone chips
   - Xilinx ZynqMP FPGA SoCs

  One new driver is added to talk to the BPMP firmware on NVIDIA
  Tegra210

  Existing drivers are extended for new SoC variants from NXP, NVIDIA,
  Amlogic and Qualcomm"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits)
  tee: optee: update optee_msg.h and optee_smc.h to dual license
  tee: add cancellation support to client interface
  dpaa2-eth: configure the cache stashing amount on a queue
  soc: fsl: dpio: configure cache stashing destination
  soc: fsl: dpio: enable frame data cache stashing per software portal
  soc: fsl: guts: make fsl_guts_get_svr() static
  hwrng: make symbol 'optee_rng_id_table' static
  tee: optee: Fix unsigned comparison with less than zero
  hwrng: Fix unsigned comparison with less than zero
  tee: fix possible error pointer ctx dereferencing
  hwrng: optee: Initialize some structs using memset instead of braces
  tee: optee: Initialize some structs using memset instead of braces
  soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
  clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static
  soc: qcom: llcc-slice: Fix typos
  qcom: soc: llcc-slice: Consolidate some code
  qcom: soc: llcc-slice: Clear the global drv_data pointer on error
  drivers: soc: xilinx: Add ZynqMP power domain driver
  firmware: xilinx: Add APIs to control node status/power
  dt-bindings: power: Add ZynqMP power domain bindings
  ...
2019-03-06 09:41:12 -08:00
Linus Torvalds
6ad63dec9c ARM: SoC device tree updates for 5.1
This is a smaller update than the past few times, but with just over
 500 non-merge changesets still dwarfes the rest of the SoC tree.
 
 Three new SoC platforms get added, each one a follow-up to an existing
 product, and added here in combination with a reference platform:
 
  - Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging processor
    https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html
 
  - Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for
    Rich Graphics Applications".
    https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html
 
  - NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC
    https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
 
 These are actual commercial products we now support with an in-kernel
 device tree source file:
 
  - Bosch Guardian is a product made by Bosch Power
    Tools GmbH, based on the Texas Instruments AM335x chip
 
  - Winterland IceBoard is a Texas Instruments AM3874 based
    machine used in telescopes at the south pole and elsewhere, see commit
    d031773169df2 for some pointers:
 
  - Inspur on5263m5 is an x86 server platform with an Aspeed
    ast2500 baseboard management controller. This is for running on
    the BMC.
 
  - Zodiac Digital Tapping Unit, apparently a kind of ethernet
    switch used in airplanes.
 
  - Phicomm K3 is a WiFi router based on Broadcom bcm47094
 
  - Methode Electronics uDPU FTTdp distribution point unit
 
  - X96 Max, a generic TV box based on Amlogic G12a (S905X2)
 
  - NVIDIA Shield TV (Darcy) based on Tegra210
 
 And then there are several new SBC, evaluation, development or modular
 systems that we add:
 
  - Three new Rockchips rk3399 based boards:
     - FriendlyElec NanoPC-T4 and NanoPi M4
     - Radxa ROCK Pi 4
 
  - Five new i.MX6 family SoM modules and boards for industrial
    products:
     - Logic PD i.MX6QD SoM and evaluation baseboad
     - Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL
     - Phytec phyCORE i.MX6 UltraLite SoM and evaluation module
 
  - MYIR Tech MYD-LPC4357 development based on the NXP lpc4357
    microcontroller
 
  - Chameleon96, an Intel/Altera Cyclone5 based FPGA development
    system in 96boards form factor
 
  - Arm Fixed Virtual Platforms(FVP) Base RevC, a purely
    virtual platform for corresponding to the latest "fast model"
 
  - Another Raspberry Pi variant: Model 3 A+, supported both
    in 32-bit and 64-bit mode.
 
  - Oxalis Evalkit V100 based on NXP Layerscape LS1012a,
    in 96Boards enterprise form factor
 
  - Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108
 
 For already supported boards and SoCs, we often add support for new
 devices after merging the drivers. This time, the largest changes include
 updates for
 
  - STMicroelectronics stm32mp1, which was now formally
    launched last week
 
  - Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip
 
  - Action Semi S700
 
  - TI AM654x, their recently merged 64-bit SoC from the OMAP family
 
  - Various Amlogic Meson SoCs
 
  - Mediatek MT2712
 
  - NVIDIA Tegra186 and Tegra210
 
  - The ancient NXP lpc32xx family
 
  - Samsung s5pv210, used in some older mobile phones
 
 Many other chips see smaller updates and bugfixes beyond that.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC device tree updates from Arnd Bergmann:
 "This is a smaller update than the past few times, but with just over
  500 non-merge changesets still dwarfes the rest of the SoC tree.

  Three new SoC platforms get added, each one a follow-up to an existing
  product, and added here in combination with a reference platform:

   - Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging
     processor:

       https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html

   - Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for Rich Graphics
     Applications":

       https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html

   - NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC:

       https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X

  These are actual commercial products we now support with an in-kernel
  device tree source file:

   - Bosch Guardian is a product made by Bosch Power Tools GmbH, based
     on the Texas Instruments AM335x chip

   - Winterland IceBoard is a Texas Instruments AM3874 based machine
     used in telescopes at the south pole and elsewhere, see commit
     d031773169df2 for some pointers:

   - Inspur on5263m5 is an x86 server platform with an Aspeed ast2500
     baseboard management controller. This is for running on the BMC.

   - Zodiac Digital Tapping Unit, apparently a kind of ethernet switch
     used in airplanes.

   - Phicomm K3 is a WiFi router based on Broadcom bcm47094

   - Methode Electronics uDPU FTTdp distribution point unit

   - X96 Max, a generic TV box based on Amlogic G12a (S905X2)

   - NVIDIA Shield TV (Darcy) based on Tegra210

  And then there are several new SBC, evaluation, development or modular
  systems that we add:

   - Three new Rockchips rk3399 based boards:
       - FriendlyElec NanoPC-T4 and NanoPi M4
       - Radxa ROCK Pi 4

   - Five new i.MX6 family SoM modules and boards for industrial
     products:
       - Logic PD i.MX6QD SoM and evaluation baseboad
       - Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL
       - Phytec phyCORE i.MX6 UltraLite SoM and evaluation module

   - MYIR Tech MYD-LPC4357 development based on the NXP lpc4357
     microcontroller

   - Chameleon96, an Intel/Altera Cyclone5 based FPGA development system
     in 96boards form factor

   - Arm Fixed Virtual Platforms(FVP) Base RevC, a purely virtual
     platform for corresponding to the latest "fast model"

   - Another Raspberry Pi variant: Model 3 A+, supported both in 32-bit
     and 64-bit mode.

   - Oxalis Evalkit V100 based on NXP Layerscape LS1012a, in 96Boards
     enterprise form factor

   - Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108

  For already supported boards and SoCs, we often add support for new
  devices after merging the drivers. This time, the largest changes
  include updates for

   - STMicroelectronics stm32mp1, which was now formally launched last
     week

   - Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip

   - Action Semi S700

   - TI AM654x, their recently merged 64-bit SoC from the OMAP family

   - Various Amlogic Meson SoCs

   - Mediatek MT2712

   - NVIDIA Tegra186 and Tegra210

   - The ancient NXP lpc32xx family

   - Samsung s5pv210, used in some older mobile phones

  Many other chips see smaller updates and bugfixes beyond that"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (506 commits)
  ARM: dts: exynos: Fix max voltage for buck8 regulator on Odroid XU3/XU4
  dt-bindings: net: ti: deprecate cpsw-phy-sel bindings
  ARM: dts: am335x: switch to use phy-gmii-sel
  ARM: dts: am4372: switch to use phy-gmii-sel
  ARM: dts: dm814x: switch to use phy-gmii-sel
  ARM: dts: dra7: switch to use phy-gmii-sel
  arch: arm: dts: kirkwood-rd88f6281: Remove disabled marvell,dsa reference
  ARM: dts: exynos: Add support for secondary DAI to Odroid XU4
  ARM: dts: exynos: Add support for secondary DAI to Odroid XU3
  ARM: dts: exynos: Disable ARM PMU on Odroid XU3-lite
  ARM: dts: exynos: Add stdout path property to Arndale board
  ARM: dts: exynos: Add minimal clkout parameters to Exynos3250 PMU
  ARM: dts: exynos: Enable ADC on Odroid HC1
  arm64: dts: sprd: Remove wildcard compatible string
  arm64: dts: sprd: Add SC27XX fuel gauge device
  arm64: dts: sprd: Add SC2731 charger device
  arm64: dts: sprd: Add ADC calibration support
  arm64: dts: sprd: Remove PMIC INTC irq trigger type
  arm64: dts: rockchip: Enable tsadc device on rock960
  ARM: dts: rockchip: add chosen node on veyron devices
  ...
2019-03-06 09:36:37 -08:00
Linus Torvalds
aebbfafc74 ARM: SoC platform updates for 5.1
The APM X-Gene platform is now maintained by folks from Ampere
 computing that took over the product line a while ago, this gets
 reflected in the MAINTAINERS file.
 
 Cleanups continue on the older mach-davinci and mach-pxa platform,
 to get them to be more like the modern ones. For pxa, we
 now remove the Raumfeld platform code as it now works with
 device tree based booting.
 
 i.MX adds a couple new features for the i.MX7ULP SoC
 
 Mediatek gains support for a new SoC: MT7629 is a new wireless
 router platform, following MT7623.
 
 Aside from those, there are the usual minor cleanups and bugfixes
 across several platforms.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "The APM X-Gene platform is now maintained by folks from Ampere
  computing that took over the product line a while ago, this gets
  reflected in the MAINTAINERS file.

  Cleanups continue on the older mach-davinci and mach-pxa platform, to
  get them to be more like the modern ones. For pxa, we now remove the
  Raumfeld platform code as it now works with device tree based booting.

  i.MX adds a couple new features for the i.MX7ULP SoC

  Mediatek gains support for a new SoC: MT7629 is a new wireless router
  platform, following MT7623.

  Aside from those, there are the usual minor cleanups and bugfixes
  across several platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (49 commits)
  MAINTAINERS: Update Ampere email address
  usb: ohci-da8xx: remove unused callbacks from platform data
  ARM: davinci: da830-evm: remove legacy usb helpers
  ARM: davinci: omapl138-hawk: remove legacy usb helpers
  usb: ohci-da8xx: add vbus and overcurrent gpios
  ARM: davinci: da830-evm: use gpio lookup entries for usb gpios
  ARM: davinci: omapl138-hawk: use gpio lookup entries for usb gpios
  usb: ohci-da8xx: add a helper pointer to &pdev->dev
  usb: ohci-da8xx: add a new line after local variables
  arm64: meson: enable g12a clock controller
  MAINTAINERS: Add entry for uDPU board
  ARM: davinci: da850-evm: use GPIO hogs instead of the legacy API
  arm: mediatek: add MT7629 smp bring up code
  Revert "ARM: mediatek: add MT7623a smp bringup code"
  dt-bindings: soc: fix typo of MT8173 power dt-bindings
  ARM: meson: remove COMMON_CLK_AMLOGIC selection
  arm64: meson: remove COMMON_CLK_AMLOGIC selection
  ARM: lpc32xx: remove platform data of ARM PL111 LCD controller
  ARM: lpc32xx: remove platform data of ARM PL180 SD/MMC controller
  ARM: lpc32xx: Use kmemdup to replace duplicating its implementation
  ...
2019-03-06 09:33:05 -08:00
Linus Torvalds
d9862cfbe2 Here's the main MIPS pull request for v5.1:
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
   (GINVT) instructions, allowing for more efficient TLB maintenance when
   running on a CPU such as the I6500 that supports these.
 
 - Enable huge page support for MIPS64r6.
 
 - Optimize post-DMA cache sync by removing that code entirely for kernel
   configurations in which we know it won't be needed.
 
 - The number of pages allocated for interrupt stacks is now calculated
   correctly, where before we would wastefully allocate too much memory
   in some configurations.
 
 - The ath79 platform migrates to devicetree.
 
 - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.
 
 - The ingenic/jz4740 platform gains support for appended devicetrees.
 
 - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
   cleanups as do various pieces of core architecture code.
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Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Paul Burton:

 - Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
   (GINVT) instructions, allowing for more efficient TLB maintenance
   when running on a CPU such as the I6500 that supports these.

 - Enable huge page support for MIPS64r6.

 - Optimize post-DMA cache sync by removing that code entirely for
   kernel configurations in which we know it won't be needed.

 - The number of pages allocated for interrupt stacks is now calculated
   correctly, where before we would wastefully allocate too much memory
   in some configurations.

 - The ath79 platform migrates to devicetree.

 - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.

 - The ingenic/jz4740 platform gains support for appended devicetrees.

 - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
   cleanups as do various pieces of core architecture code.

* tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits)
  MIPS: lantiq: Remove separate GPHY Firmware loader
  MIPS: ingenic: Add support for appended devicetree
  MIPS: SGI-IP27: rework HUB interrupts
  MIPS: SGI-IP27: do boot CPU init later
  MIPS: SGI-IP27: do xtalk scanning later
  MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output
  MIPS: SGI-IP27: clean up bridge access and header files
  MIPS: SGI-IP27: get rid of volatile and hubreg_t
  MIPS: irq: Allocate accurate order pages for irq stack
  MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys()
  MIPS: eBPF: Remove REG_32BIT_ZERO_EX
  MIPS: eBPF: Always return sign extended 32b values
  MIPS: CM: Fix indentation
  MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support
  MIPS: OCTEON: program rx/tx-delay always from DT
  MIPS: OCTEON: delete board-specific link status
  MIPS: OCTEON: don't lie about interface type of CN3005 board
  MIPS: OCTEON: warn if deprecated link status is being used
  MIPS: OCTEON: add fixed-link nodes to in-kernel device tree
  MIPS: Delete unused flush_cache_sigtramp()
  ...
2019-03-05 11:28:25 -08:00
Anson Huang
0c91c11c7d clk: imx8mq: add GPIO clocks to clock tree
i.MX8MQ has clock gate for each GPIO bank, add them
into clock tree for GPIO driver to manage.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-28 10:28:28 -08:00
Seiya Wang
64f4466c88 clk: mediatek: correct cpu clock name for MT8173 SoC
Correct cpu clock name from ca57 to ca72 since MT8173 does use cortex-a72.

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-26 10:17:40 -08:00
Edgar Bernardi Righi
0c8c53e033 dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU
Add devicetree bindings for Actions Semi S500 Clock Management Unit.

Signed-off-by: Edgar Bernardi Righi <edgar.righi@lsitec.org.br>
[Mani: Documented S500 CMU compatible]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Fix SPDX comment style in header file]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-22 00:01:08 -08:00
Gabriel Fernandez
585fc46bd4 dt-bindings: clock: remove unused definition for stm32mp1
A copy of LTDC_PX and ETHCK_K (LTDC_K and ETHMAC_K) was introduced in
stm32mp1 dt-bindings file by mistake.
These bindings are not used and shouldn't be use to be conform with
convention name of the stm32mp1 clock IP.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 14:16:27 -08:00
David Dai
04053f4d23 clk: qcom: clk-rpmh: Add IPA clock support
The clk-rpmh driver only supports on and off RPMh clock resources. Let's
extend the driver by adding support for clocks that are managed by a
different type of RPMh resource known as Bus Clock Manager(BCM). The BCM
is a configurable shared resource aggregator that scales performance
based on a set of frequency points. The Qualcomm IP Accelerator (IPA)
clock is an example of a resource that is managed by the BCM and this a
requirement from the IPA driver in order to scale its core clock.

Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 13:57:55 -08:00
Lubomir Rintel
ed11aff3ee dt-bindings: marvell,mmp2: Add clock id for the LCDC clock
The peripheral clock is required for access the the LCDC registers. It
is in fact separate from the "AXI clock" that is optionally used to
generate the pixel clock and as such requires a separate clock id.

Link: https://lists.freedesktop.org/archives/dri-devel/2019-January/203975.html
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 13:52:00 -08:00
Abel Vesa
45a359e80d dt-bindings: imx8mq-clock: Add the missing ARM clock
Add the missing ARM clock which will be used by cpufreq

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
[sboyd@kernel.org: Fixed numbering in dt header]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 12:56:52 -08:00
Fabio Estevam
202ce5afe5 clk: imx8mq: Add support for the CLKO1 clock
Add the entry for the CLKO1 clock.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 12:56:52 -08:00
Bai Ping
037a474f61 dt-bindings: imx: Add clock binding doc for imx8mm
Add the clock binding doc for i.MX8MM.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 12:41:16 -08:00
Michael Grzeschik
9b15cffbf2 clk: imx5: add imx5_SCC2_IPG_GATE
This adds the missing clock for the SCC2 peripheral unit.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-21 12:41:16 -08:00
Linus Walleij
8fab3d713c gpio updates for v5.1
- support for a new variant of pca953x
 - documentation fix from Wolfram
 - some tegra186 name changes
 - two minor fixes for madera and altera-a10sr
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Merge tag 'gpio-v5.1-updates-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel

gpio updates for v5.1

- support for a new variant of pca953x
- documentation fix from Wolfram
- some tegra186 name changes
- two minor fixes for madera and altera-a10sr
2019-02-17 21:59:33 +01:00
Arnd Bergmann
d0e1f79ad3 Merge tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/fixes
mt8173: minor typo in scpsys header file
mt7629: add smp bringup code
mt7623a: delete unused smp bringup code

* tag 'v5.0-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  arm: mediatek: add MT7629 smp bring up code
  Revert "ARM: mediatek: add MT7623a smp bringup code"
  dt-bindings: soc: fix typo of MT8173 power dt-bindings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 20:38:17 +01:00
Arnd Bergmann
187b4ac7df This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following:
 
 - Stefan updates the BCM2835 SoC driver with downstream properties and
   uses that to implement a reboot notifier to tell the VC4 firmware when
   Linux on the ARM CPU is rebooting
 
 - Eric adds a proper power domain driver for the BCM283x SoCs and
   updates a bunch of drivers to have a better and clearer Device Tree
   definition to support power domains/breaking up of functionality. This
   requires converting the existing watchdog driver into a MFD and then
   breaking up the functionality into separate drivers and finally
   updating the DTS files to leverage the power domains information.
 
 - Wei provides a fix for making a symbol static
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Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux into arm/drivers

This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following:

- Stefan updates the BCM2835 SoC driver with downstream properties and
  uses that to implement a reboot notifier to tell the VC4 firmware when
  Linux on the ARM CPU is rebooting

- Eric adds a proper power domain driver for the BCM283x SoCs and
  updates a bunch of drivers to have a better and clearer Device Tree
  definition to support power domains/breaking up of functionality. This
  requires converting the existing watchdog driver into a MFD and then
  breaking up the functionality into separate drivers and finally
  updating the DTS files to leverage the power domains information.

- Wei provides a fix for making a symbol static

* tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux:
  ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.
  ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4)
  soc: bcm: bcm2835-pm: Make local symbol static
  soc: bcm: Make PM driver default for BCM2835
  soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
  bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD.
  dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4)
  firmware: raspberrypi: notify VC4 firmware of a reboot
  soc: bcm2835: sync firmware properties with downstream

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 18:01:17 +01:00
Arnd Bergmann
405bcfff17 Qualcomm ARM Based Driver Updates for v5.1
* Add Qualcomm RPMh power domain driver and related changes
 * Fix issues with sleep/wake sets and batch API in RPMh
 * Update MAINTAINERS Qualcomm entry
 * Fixup RMTFS-mem sysfs and uevents
 * Fix error handling in GSBI
 * Add SMD-RPM compatible entry for SDM660
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Merge tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers

Qualcomm ARM Based Driver Updates for v5.1

* Add Qualcomm RPMh power domain driver and related changes
* Fix issues with sleep/wake sets and batch API in RPMh
* Update MAINTAINERS Qualcomm entry
* Fixup RMTFS-mem sysfs and uevents
* Fix error handling in GSBI
* Add SMD-RPM compatible entry for SDM660

* tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  soc: qcom: smd-rpm: Add sdm660 compatible
  soc: qcom: gsbi: Fix error handling in gsbi_probe()
  soc: qcom: rpmh: Avoid accessing freed memory from batch API
  drivers: qcom: rpmh: avoid sending sleep/wake sets immediately
  soc: qcom: rmtfs-mem: Make sysfs attributes world-readable
  soc: qcom: rmtfs-mem: Add class to enable uevents
  soc: qcom: update config dependencies for QCOM_RPMPD
  soc: qcom: rpmpd: Drop family A RPM dependency
  MAINTAINERS: update list of qcom drivers
  soc: qcom: rpmhpd: Mark mx as a parent for cx
  soc: qcom: rpmhpd: Add RPMh power domain driver
  soc: qcom: rpmpd: Add support for get/set performance state
  soc: qcom: rpmpd: Add a Power domain driver to model corners
  dt-bindings: power: Add qcom rpm power domain driver bindings
  OPP: Add support for parsing the 'opp-level' property
  dt-bindings: opp: Introduce opp-level bindings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 18:00:05 +01:00
Arnd Bergmann
6f2185f8e3 Reset controller changes for v5.1
This adds the include/linux/reset directory to MAINTAINERS for reset
 specific headers and adds headers for sunxi and socfpga in there to
 get rid of a few extern function declarations.
 There is a new reset driver for the Broadcom STB reset controller and
 the i.MX7 system reset controller driver is extended to support i.MX8MQ
 as well. Finally, there is a new header with reset id constants for
 the Meson G12A SoC, which has a reset controller identical to Meson AXG
 and thus can reuse its driver and DT bindings.
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Merge tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux into arm/drivers

Reset controller changes for v5.1

This adds the include/linux/reset directory to MAINTAINERS for reset
specific headers and adds headers for sunxi and socfpga in there to
get rid of a few extern function declarations.
There is a new reset driver for the Broadcom STB reset controller and
the i.MX7 system reset controller driver is extended to support i.MX8MQ
as well. Finally, there is a new header with reset id constants for
the Meson G12A SoC, which has a reset controller identical to Meson AXG
and thus can reuse its driver and DT bindings.

* tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux:
  dt-bindings: reset: meson: add g12a bindings
  reset: imx7: Add support for i.MX8MQ IP block variant
  reset: imx7: Add plubming to support multiple IP variants
  reset: Add Broadcom STB SW_INIT reset controller driver
  dt-bindings: reset: Add document for Broadcom STB reset controller
  reset: socfpga: declare socfpga_reset_init in a header file
  reset: sunxi: declare sun6i_reset_init in a header file
  MAINTAINERS: use include/linux/reset for reset controller related headers
  dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 17:21:32 +01:00
Arnd Bergmann
59f527dd7a arm64: zynqmp: SoC changes for v5.1
- Extend firmware interface with reset, nvmem,
   power management and power domain support
 
 - Add reset, nvmem driver, power management and
   power domain drivers
 -
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Merge tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx into arm/drivers

arm64: zynqmp: SoC changes for v5.1

- Extend firmware interface with reset, nvmem,
  power management and power domain support

- Add reset, nvmem driver, power management and
  power domain drivers
-

* tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx:
  drivers: soc: xilinx: Add ZynqMP power domain driver
  firmware: xilinx: Add APIs to control node status/power
  dt-bindings: power: Add ZynqMP power domain bindings
  drivers: soc: xilinx: Add ZynqMP PM driver
  firmware: xilinx: Implement ZynqMP power management APIs
  dt-bindings: soc: Add ZynqMP PM bindings
  nvmem: zynqmp: Added zynqmp nvmem firmware driver
  dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
  firmware: xilinx: Add zynqmp_pm_get_chipid() API
  reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.
  dt-bindings: reset: Add bindings for ZynqMP reset driver
  firmware: xilinx: Add reset API's

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 17:16:45 +01:00
Arnd Bergmann
550a43b310 Renesas ARM Based SoC DT Updates for v5.1
* R-Car H2 (r8a7790) based Stout board
   - Convert to new LVDS DT bindings
 
 * R-Car H1 (r8a7779) and M1A (r8a7778) SoCs
   - Describe HSCIF0/1 devices in DT
 
 * RZ/G1M (r8a7743) SoC
   - Correct sort order of the RWDT node
   - Remove aliases: should be defined in board rather than SoC DT if needed
   - Remove generic compatible string from iic3: it is not compatible
 
 * RZ/G1N (r8a7744) SoC
   - Describe LVDS and DU devices in DT
   - Correct sort order of VSP and MSIOF noces
 
 * RZ/G1C (r8a7747) based iWave SBC
   - Enable RTC
 
 * RZ/A2M (r7s9210) SoC and EVB
   - Initial support
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Merge tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Renesas ARM Based SoC DT Updates for v5.1

* R-Car H2 (r8a7790) based Stout board
  - Convert to new LVDS DT bindings

* R-Car H1 (r8a7779) and M1A (r8a7778) SoCs
  - Describe HSCIF0/1 devices in DT

* RZ/G1M (r8a7743) SoC
  - Correct sort order of the RWDT node
  - Remove aliases: should be defined in board rather than SoC DT if needed
  - Remove generic compatible string from iic3: it is not compatible

* RZ/G1N (r8a7744) SoC
  - Describe LVDS and DU devices in DT
  - Correct sort order of VSP and MSIOF noces

* RZ/G1C (r8a7747) based iWave SBC
  - Enable RTC

* RZ/A2M (r7s9210) SoC and EVB
  - Initial support

* tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: dts: r8a7744: Add LVDS support
  ARM: dts: r8a7744: Add DU support
  ARM: dts: r7s9210-rza2mevb: Add support for RZ/A2M EVB
  ARM: dts: r7s9210: Initial SoC device tree
  ARM: dts: r8a7779: Add HSCIF0/1 device nodes
  ARM: dts: r8a7778: Add HSCIF0/1 support
  ARM: dts: r8a7743: Fix sorting of rwdt node
  ARM: dts: r8a7743: Remove aliases from SoC dtsi
  ARM: dts: r8a7743: Remove generic compatible string from iic3
  ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes
  ARM: dts: iwg23s-sbc: Enable RTC
  ARM: dts: stout: Convert to new LVDS DT bindings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15 15:48:52 +01:00
Martin Blumenstingl
40d08f774c dt-bindings: clock: meson8b: add APB clock definition
Commit 8e1dd17c8b0e3f ("dt-bindings: clock: meson8b: export the CPU
post dividers") added a clock with the name "ABP". The actual name of
this clock is "APB".

Add a new #define with the same ID but the correct name. The old #define
will be dropped in a follow-up patch because each commit in the tree
must compile on it's own (the old #define is still used by the clock
controller driver).

Fixes: 8e1dd17c8b0e3f ("dt-bindings: clock: meson8b: export the CPU post dividers")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190210222603.6404-2-martin.blumenstingl@googlemail.com
2019-02-13 09:50:16 +01:00
Neil Armstrong
be3d960b0a dt-bindings: clk: add G12A AO Clock and Reset Bindings
Add bindings for the Amlogic G12A AO Clock and Reset controllers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com
2019-02-13 09:49:17 +01:00
Thomas Petazzoni
ede033e1e8 dt-bindings: gpio: document the new pull-up/pull-down flags
This commit extends the flags that can be used in GPIO specifiers to
indicate if a pull-up resistor or pull-down resistor should be
enabled.

While some pinctrl DT bindings already offer the capability of
configuring pull-up/pull-down resistors at the pin level, a number of
simple GPIO controllers don't have any pinmuxing capability, and
therefore do not rely on the pinctrl DT bindings.

Such simple GPIO controllers however sometimes allow to configure
pull-up and pull-down resistors on a per-pin basis, and whether such
resistors should be enabled or not is a highly board-specific HW
characteristic.

By using two additional bits of the GPIO flag specifier, we can easily
allow the Device Tree to describe which GPIOs should have their
pull-up or pull-down resistors enabled. Even though the two options
are mutually exclusive, we still need two bits to encode at least
three states: no pull-up/pull-down, pull-up, pull-down.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-13 09:07:43 +01:00
Greg Kroah-Hartman
277c8e8b81 Second set of new device support, features and cleanup for IIO in the 5.1 cycle.
There are a few late breaking fixes in here that weren't worth trying to
 rush into 5.0 as they have been with us for quite a while.
 
 New device support
 * ad7476
   - add support for TI ADS786X parts that are compatible with this Analog
     Devices driver. Good to see some simple devices are so similar.
 * Ingenic jz47xx SoC ADCs
   - new driver and bindings
 * Plantower PMS7003 partical sensor
   - new driver and bindings including vendor prefix.
 * TI DAC7612
   - new driver and bindings for this dual DAC.
 
 New features
 * ad7768-1
   - Sampling frequency control
 * bmi160
   - Data ready trigger support, including open-drain dt binding.
 
 Cleanup / minor fixes.
 * Analog Device DACs
   - Fix some inconsistent licenses.  These are only ones where there were
     two different license marked in the same file, and hence were previously
     unclear.
 * ads124s08
   - Spelling fix.
 * adxl345
   - Parameter alignement tidy up.
 * bmi160
   - SPDX
   - correct a note on the types of supported interrupts which was too strict.
   - use iio_pollfunc_store_time to grab an earlier timestamp.
   - use if (ret) instead of if (ret < 0) to be consistent whilst simplifying
     some handling where ret was effectively getting written to 0 even though
     it was always already 0.
 * exynos_adc
   - Fix a null pointer dereference on unbind.
   - Fix number of channels on Exynos4x12 devices to be 4 rather than 8.
 * lpc32xx-adc
   - Move DT bindings doc out of staging. Oops, I missed this one when
     moving the driver.
   - SPDX.
 * npcm-adc
   - drop documentation of reset node as going to be done differently.
     It's a new driver this cycle so no need to support the previous
     binding going forwards.
 * sps30
   - Fix an issue with a loop timeout test that meant it would never identify
     a timeout.
   - Mark deliberate switch fall throughs.
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Merge tag 'iio-for-5.1b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

Second set of new device support, features and cleanup for IIO in the 5.1 cycle.

There are a few late breaking fixes in here that weren't worth trying to
rush into 5.0 as they have been with us for quite a while.

New device support
* ad7476
  - add support for TI ADS786X parts that are compatible with this Analog
    Devices driver. Good to see some simple devices are so similar.
* Ingenic jz47xx SoC ADCs
  - new driver and bindings
* Plantower PMS7003 partical sensor
  - new driver and bindings including vendor prefix.
* TI DAC7612
  - new driver and bindings for this dual DAC.

New features
* ad7768-1
  - Sampling frequency control
* bmi160
  - Data ready trigger support, including open-drain dt binding.

Cleanup / minor fixes.
* Analog Device DACs
  - Fix some inconsistent licenses.  These are only ones where there were
    two different license marked in the same file, and hence were previously
    unclear.
* ads124s08
  - Spelling fix.
* adxl345
  - Parameter alignement tidy up.
* bmi160
  - SPDX
  - correct a note on the types of supported interrupts which was too strict.
  - use iio_pollfunc_store_time to grab an earlier timestamp.
  - use if (ret) instead of if (ret < 0) to be consistent whilst simplifying
    some handling where ret was effectively getting written to 0 even though
    it was always already 0.
* exynos_adc
  - Fix a null pointer dereference on unbind.
  - Fix number of channels on Exynos4x12 devices to be 4 rather than 8.
* lpc32xx-adc
  - Move DT bindings doc out of staging. Oops, I missed this one when
    moving the driver.
  - SPDX.
* npcm-adc
  - drop documentation of reset node as going to be done differently.
    It's a new driver this cycle so no need to support the previous
    binding going forwards.
* sps30
  - Fix an issue with a loop timeout test that meant it would never identify
    a timeout.
  - Mark deliberate switch fall throughs.

* tag 'iio-for-5.1b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (26 commits)
  iio: adc: exynos-adc: Use proper number of channels for Exynos4x12
  dt-binding: iio: remove rst node from NPCM ADC document
  dt-bindings: iio: chemical: pms7003: add device tree support
  dt-bindings: add Plantower to the vendor prefixes
  iio: chemical: add support for Plantower PMS7003 sensor
  iio:chemical:sps30 Supress some switch fallthrough warnings.
  iio:adc:lpc32xx use SPDX-License-Identifier
  dt-bindings: iio: adc: move lpc32xx-adc out of staging
  iio: adc: ads124s08: fix spelling mistake "converions" -> "conversions"
  iio: adc: exynos-adc: Fix NULL pointer exception on unbind
  iio: chemical: sps30: fix a loop timeout test
  iio:accel:adxl345: Change alignment to match paranthesis
  iio:dac:dac7612: device tree bindings
  iio:dac:ti-dac7612: Add driver for Texas Instruments DAC7612
  iio: adc: ad7476: Add support for TI ADS786X ADCs
  iio: adc: ad7768-1: Add support for setting the sampling frequency
  drivers: iio: dac: Fix wrong license for ADI drivers
  IIO: add Ingenic JZ47xx ADC driver.
  dt-bindings: iio/adc: Add bindings for Ingenic JZ47xx SoCs ADC.
  dt-bindings: iio/adc: Add docs for Ingenic JZ47xx SoCs ADC.
  ...
2019-02-13 08:24:50 +01:00
Rajan Vaja
8fd27fb4cf dt-bindings: power: Add ZynqMP power domain bindings
Add documentation to describe ZynqMP power domain bindings.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-12 13:36:26 +01:00
Linus Walleij
e65372124c Linux 5.0-rc6
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Merge tag 'v5.0-rc6' into devel

Linux 5.0-rc6
2019-02-11 09:17:23 +01:00
Greg Kroah-Hartman
5c07488d99 Merge 5.0-rc6 into char-misc-next
We need the char-misc fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-11 09:05:58 +01:00
Artur Rojek
7cf74d515b dt-bindings: iio/adc: Add bindings for Ingenic JZ47xx SoCs ADC.
Add device tree bindings for the ADC controller on JZ47xx SoCs,
used by the ingenic-adc driver.

Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-02-09 15:39:24 +00:00
Linus Torvalds
46c291e277 ARM: SoC fixes for linux-5.0
This is a bit larger than normal, as we had not managed to send out
 a pull request before traveling for a week without my signing key.
 
 There are multiple code fixes for older bugs, all of which should
 get backported into stable kernels:
 
 - tango: one fix for multiplatform configurations broken on other
   platforms when tango is enabled
 - arm_scmi: device unregistration fix
 - iop32x: fix kernel oops from extraneous __init annotation
 - pxa: remove a double kfree
 - fsl qbman: close an interrupt clearing race
 
 The rest is the usual collection of smaller fixes for device tree
 files, on the renesas, allwinner, meson, omap, davinci, qualcomm
 and imx platforms. Some of these are for compile-time warnings,
 most are for board specific functionality that fails to work
 because of incorrect settings.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "This is a bit larger than normal, as we had not managed to send out a
  pull request before traveling for a week without my signing key.

  There are multiple code fixes for older bugs, all of which should get
  backported into stable kernels:

   - tango: one fix for multiplatform configurations broken on other
     platforms when tango is enabled

   - arm_scmi: device unregistration fix

   - iop32x: fix kernel oops from extraneous __init annotation

   - pxa: remove a double kfree

   - fsl qbman: close an interrupt clearing race

  The rest is the usual collection of smaller fixes for device tree
  files, on the renesas, allwinner, meson, omap, davinci, qualcomm and
  imx platforms.

  Some of these are for compile-time warnings, most are for board
  specific functionality that fails to work because of incorrect
  settings"

* tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits)
  ARM: tango: Improve ARCH_MULTIPLATFORM compatibility
  firmware: arm_scmi: provide the mandatory device release callback
  ARM: iop32x/n2100: fix PCI IRQ mapping
  arm64: dts: add msm8996 compatible to gicv3
  ARM: dts: am335x-shc.dts: fix wrong cd pin level
  ARM: dts: n900: fix mmc1 card detect gpio polarity
  ARM: dts: omap3-gta04: Fix graph_port warning
  ARM: pxa: ssp: unneeded to free devm_ allocated data
  ARM: dts: r8a7743: Convert to new LVDS DT bindings
  soc: fsl: qbman: avoid race in clearing QMan interrupt
  arm64: dts: renesas: r8a77965: Enable DMA for SCIF2
  arm64: dts: renesas: r8a7796: Enable DMA for SCIF2
  arm64: dts: renesas: r8a774a1: Enable DMA for SCIF2
  ARM: dts: da850: fix interrupt numbers for clocksource
  dt-bindings: imx8mq: Number clocks consecutively
  arm64: dts: meson: Fix mmc cd-gpios polarity
  ARM: dts: imx6sx: correct backward compatible of gpt
  ARM: dts: imx: replace gpio-key,wakeup with wakeup-source property
  ARM: dts: vf610-bk4: fix incorrect #address-cells for dspi3
  ARM: dts: meson8m2: mxiii-plus: mark the SD card detection GPIO active-low
  ...
2019-02-08 16:23:41 -08:00
Jerome Brunet
dbfc54534d dt-bindings: reset: meson: add g12a bindings
Add device tree bindings for the reset controller of g12a SoC family.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-02-08 17:31:33 +01:00
Claudiu Beznea
64e21add8c pinctrl: at91: add slewrate support for SAM9X60
Add slew rate support for SAM9X60 pin controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-02-08 13:07:03 +01:00
Weiyi Lu
cd10b9343d dt-bindings: soc: fix typo of MT8173 power dt-bindings
fix incorrect IC name that will affect the MT8183 power dt-bindings

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2019-02-07 16:34:46 +01:00
Charles Keepax
fdc98f070b mfd: lochnagar: Add initial binding documentation
Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-07 10:43:55 +00:00
Weiyi Lu
c3424f59a0 dt-bindings: clock: add clock for MT2712
Add new clock according to 3rd ECO design change.
It's the parent clock of audio clock mux.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-05 13:27:56 -08:00
Jian Hu
25db146aa7 dt-bindings: clk: meson: add g12a periph clock controller bindings
Add new clock controller compatible and dt-bindings header for the
Everything-Else domain of the g12a SoC

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190201145345.6795-3-jbrunet@baylibre.com
2019-02-04 09:52:11 +01:00
Kamil Konieczny
b80a40c659 clk: samsung: exynos5433: Fix name typo in sssx
Fix typo in sssx name, there should be three letters 's'.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-02-01 14:36:47 +01:00
Kamil Konieczny
7403e48d7a clk: samsung: dt-bindings: Add Exynos5433 IMEM CMU clock IDs
Add DT bindings to describe the IMEM CMU clocks for the SlimSSS
(Slim Security SubSystem).

Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by:  Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited commit description]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-02-01 14:36:47 +01:00
Lee Jones
fa56a62d01 Merge branches 'ib-mfd-iio-input-5.1', 'ib-mfd-input-watchdog-5.1' and 'ib-mfd-platform-5.1' into ibs-for-mfd-merged 2019-02-01 08:20:04 +00:00
Linus Torvalds
5b4746a031 Mostly driver fixes, but there's a core framework fix in here too.
- Revert the commits that introduce clk management for the SP
    clk on MMP2 SoCs (used for OLPC). Turns out it wasn't a good
    idea and there isn't any need to manage this clk, it just causes
    more headaches.
 
  - A performance regression that went unnoticed for many years where
    we would traverse the entire clk tree looking for a clk by name
    when we already have the pointer to said clk that we're looking
    for
 
  - A parent linkage fix for the qcom SDM845 clk driver
 
  - An i.MX clk driver rate miscalculation fix where order of operations
    were messed up
 
  - One error handling fix from the static checkers
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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "Mostly driver fixes, but there's a core framework fix in here too:

   - Revert the commits that introduce clk management for the SP clk on
     MMP2 SoCs (used for OLPC). Turns out it wasn't a good idea and
     there isn't any need to manage this clk, it just causes more
     headaches.

   - A performance regression that went unnoticed for many years where
     we would traverse the entire clk tree looking for a clk by name
     when we already have the pointer to said clk that we're looking for

   - A parent linkage fix for the qcom SDM845 clk driver

   - An i.MX clk driver rate miscalculation fix where order of
     operations were messed up

   - One error handling fix from the static checkers"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: qcom: gcc: Use active only source for CPUSS clocks
  clk: ti: Fix error handling in ti_clk_parse_divider_data()
  clk: imx: Fix fractional clock set rate computation
  clk: Remove global clk traversal on fetch parent index
  Revert "dt-bindings: marvell,mmp2: Add clock id for the SP clock"
  Revert "clk: mmp2: add SP clock"
  Revert "Input: olpc_apsp - enable the SP clock"
2019-01-31 23:22:57 -08:00
Arnd Bergmann
3673a91c07 Merge tag 'imx-fixes-5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.0, 2nd round:

It contains a single fix for i.MX8MQ clock numbers, removing the
duplicate use of 232 and numbering the clocks consecutively.

* tag 'imx-fixes-5.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: imx8mq: Number clocks consecutively

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-30 11:34:38 +01:00
Nava kishore Manne
3f1b66be4a dt-bindings: reset: Add bindings for ZynqMP reset driver
Add documentation to describe Xilinx ZynqMP reset driver
bindings.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-29 14:07:10 +01:00
Andrey Smirnov
4cab5bf616 dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
The driver now supports i.MX8MQ, so update bindings accordingly.

Cc: p.zabel@pengutronix.de
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-01-28 11:16:04 +01:00
Greg Kroah-Hartman
fdddcfd9c9 Merge 5.0-rc4 into char-misc-next
We need the char-misc fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-28 08:13:52 +01:00
Lubomir Rintel
401fbb34f5 Revert "dt-bindings: marvell,mmp2: Add clock id for the SP clock"
It seems that the kernel has no business managing this clock: once the SP
clock is disabled, it's not sufficient to just enable it in order to bring
the SP core back up.

Pretty sure nothing ever used this and it's safe to remove.

This reverts commit e8a2c779141415105825e65a4715f1130bba61b1.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-01-24 10:55:33 -08:00
Rajendra Nayak
c6e6eff4d4 dt-bindings: power: Add qcom rpm power domain driver bindings
Add DT bindings to describe the rpm/rpmh power domains found on Qualcomm
Technologies, Inc. SoCs. These power domains communicate a performance
state to RPM/RPMh, which then translates it into corresponding voltage on a
PMIC rail.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-22 15:06:12 -06:00
Felix Fietkau
6810ed320e
MIPS: ath79: export switch MDIO reference clock
On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz
clock. If that feature is not used, it defaults to the main reference
clock, like on all other SoC.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
2019-01-22 11:17:22 -08:00
Felix Fietkau
9b56e0d0cc
MIPS: ath79: add helpers for setting clocks and expose the ref clock
Preparation for transitioning the legacy clock setup code over
to OF.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
2019-01-22 11:17:21 -08:00
David Dai
b5d2f74107 interconnect: qcom: Add sdm845 interconnect provider driver
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.

Signed-off-by: David Dai <daidavid1@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-22 13:37:25 +01:00