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Convert Samsung Exynos PPMU bindings to DT schema format using
json-schema. The example is quite different due to the nature of
dtschema examples parsing (no overriding via-label allowed).
New bindings contain copied description from previous bindings document,
therefore the license is set as GPL-2.0-only.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210820150353.161161-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Samsung Exynos NoC Probe bindings to DT schema format using
json-schema.
New bindings contain copied description from previous bindings document,
therefore the license is set as GPL-2.0-only.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210820150353.161161-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
Convert H8/300 bus controller bindings to DT schema format using
json-schema.
The conversion also extends the bindings to match what is really used in
existing devicetree sources (the original file mentions only
"renesas,h8300-bsc" but "renesas,h8300h-bsc" and "renesas,h8s-bsc" are
used with it).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210818202953.16862-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
The 'contains' keyword applies to elements within an array, so
using 'items' only makes sense if the elements of the array are another
array which is not the case for 'compatible' properties.
Looking at the driver, it seems the intent was the condition should be
true when 'faraday,ftpci100' is present, so we can drop
'cortina,gemini-pci'.
Fixes: 2720b991337d ("dt-bindings: PCI: ftpci100: convert faraday,ftpci100 to YAML")
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-pci@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210817174743.541353-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Synopsys IntelliDDR Multi Protocol memory controller (present in
Xilinx Zynq and ZynqMP) bindings to DT schema format using json-schema.
New binding contains copied parts of description from previous binding
document, therefore the license is set as GPL-2.0-only.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210818113139.84869-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Broadcom DDR PHY Front End (DPFE) bindings to DT schema format
using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Markus Mayer <mmayer@broadcom.com>
Link: https://lore.kernel.org/r/20210817080617.14503-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
The Samsung Exynos SoC SATA bindings are not implemented in the kernel,
not used and superseded by generic
Documentation/devicetree/bindings/ata/ahci-platform.txt bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210811083859.28234-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
The pcie-kirin driver doesn't declare a hisilicon,kirin-pcie.
Also, remove the useless comment after the description, as other
compat will be supported by the same driver in the future.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/3e3e29a88f8e71eb228edf33d70cbe70db431408.1627965261.git.mchehab+huawei@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Modify LINK_1000_ACTIVITY and LINK_100_ACTIVITY to VSC8531_LINK_1000_ACTIVITY
and VSC8531_LINK_100_ACTIVITY respectively in the example of ethernet-phy node
according to include/dt-bindings/net/mscc-phy-vsc8531.h.
Signed-off-by: Baisheng Gao <gaobaisheng@bonc.com.cn>
Link: https://lore.kernel.org/r/1627488086-200263-1-git-send-email-gaobaisheng@bonc.com.cn
Signed-off-by: Rob Herring <robh@kernel.org>
Document Gigabit Ethernet IP found on RZ/G2L SoC.
Gigabit Ethernet Interface includes Ethernet controller (E-MAC),
Internal TCP/IP Offload Engine (TOE) and Dedicated Direct memory
access controller (DMAC) for transferring transmitted Ethernet
frames to and received Ethernet frames from respective storage
areas in the URAM at high speed.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210727123450.15918-1-biju.das.jz@bp.renesas.com
Signed-off-by: Rob Herring <robh@kernel.org>
This removes the old plaintext Gemini binding and replace it
with a YAML schema, adding some new boards in the process.
While we are at it, add the missing vendors to the vendor
prefix file.
Drop the overly deliberate description of subnodes and the big
example from the old document. Keep the elaborate description.
I noticed that "wiliboard" is not a real vendor, the vendor
is named "wiligear" so deprecated this and replaced with the
proper vendor.
Cc: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210723152356.1874088-1-linus.walleij@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Allow to extend expression of sub nodes to optionally indicate bit
position. This extension is needed to distinguish between different bit
positions in the same address.
For example, there are two nvmem nodes starting with bit 4 and bit 0
at the same address 0x54. In this case, it can be expressed as follows.
trim@54,4 {
reg = <0x54 1>;
bits = <4 2>;
};
trim@54,0 {
reg = <0x54 1>;
bits = <0 4>;
};
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1626661864-15473-2-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Rob Herring <robh@kernel.org>
The graph schema doesn't allow custom properties on endpoint nodes for
'#/properties/port' and '#/$defs/port-base' should be used instead. This
doesn't matter until 'unevaluatedProperties' support is implemented.
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Sean Paul <sean@poorly.run>
Cc: Marek Vasut <marex@denx.de>
Cc: Krishna Manikandan <mkrishn@codeaurora.org>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://lore.kernel.org/r/20210719195001.2412345-1-robh@kernel.org
The graph schema doesn't allow custom properties on endpoint nodes for
'#/properties/port' and '#/$defs/port-base' should be used instead. This
doesn't matter until 'unevaluatedProperties' support is implemented.
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Cc: Ramesh Shanmugasundaram <rashanmu@gmail.com>
Cc: linux-media@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210719194850.2410511-1-robh@kernel.org
This commit adds the Device Tree binding documentation that allows
to describe the PCIe controller found in Toshiba Visconti SoCs.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20210723221421.113575-2-nobuhiro1.iwamatsu@toshiba.co.jp
[robh: reference snps,dw-pcie.yaml]
Signed-off-by: Rob Herring <robh@kernel.org>
Currently, the designware schema is defined on a text file:
designware-pcie.txt
It contains two separate schemas on it:
- snps,dw-pcie
This one uses the pci-bus.yaml schema;
- snps,dw-pcie-ep
This one uses the pci-ep.yaml schema.
As the:
AllOf:
- $ref: <foo>
for the endpoint part is different than the PCI one, place
it on a separate yaml file.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/26025b256232c2e4bd91954907b9d92db27199a3.1626608375.git.mchehab+huawei@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Converts pci/faraday,ftpci100.txt to yaml.
Some change are also made:
- example has wrong interrupts place
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Link: https://lore.kernel.org/r/20210628193508.2826903-1-clabbe@baylibre.com
Signed-off-by: Rob Herring <robh@kernel.org>
The K3 AM64x SoCs also have a ICSSG IP that is similar to existing K3
AM65x and J721E SoCs. The ICSSG interrupt controller is identical to
that of the INTC on J721E SoCs, and supports 20 host interrupts and
160 input events from various SoC interrupt sources. All the 8 output
host interrupts are routed to multiple entities though. Update the
PRUSS interrupt controller binding with this information, though the
same K3 compatible shall be used for the ICSSG INTC on AM64x SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210623170630.1430-1-s-anna@ti.com
Signed-off-by: Rob Herring <robh@kernel.org>
NXP's i.MX8MN has an LCDIF as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Link: https://lore.kernel.org/r/20210620225028.189637-1-marex@denx.de
Signed-off-by: Rob Herring <robh@kernel.org>
