18554 Commits

Author SHA1 Message Date
Gabriel Fernandez
09666b76f3 ARM: dts: stm32: Enable STM32F769 clock driver
This patch enables clocks for STM32F769 boards.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:05 +02:00
Pascal Paillet
b3e993a617 ARM: dts: stm32: add stpmic1 support on stm32mp157a dk1 board
This patch adds stpmic1 support on stm32mp157a dk1 board.
The STPMIC1 is a PMIC from STMicroelectronics. The STPMIC1 integrates 10
regulators, 3 power switches, a watchdog and an input for a power on key.
The DMAs are disabled because the PMIC generates a very few traffic and
DMA channels may lack for other usage.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:05 +02:00
Pascal Paillet
9c559b1565 ARM: dts: stm32: add stpmic1 support on stm32mp157c ed1 board
This patch adds stpmic1 support on stm32mp157c ed1 board.
The STPMIC1 is a PMIC from STMicroelectronics. The STPMIC1 integrates 10
regulators, 3 power switches, a watchdog and an input for a power on key.
The DMAs are disabled because the PMIC generates a very few traffic and
DMA channels may lack for other usage.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:04 +02:00
Olivier Moysan
94d3d6f4dc ARM: dts: stm32: add spdfirx pins to stm32mp157c
This patch adds spdifrx support on stm32mp157c eval board.

Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:04 +02:00
Olivier Moysan
411435d390 ARM: dts: stm32: add spdifrx support on stm32mp157c
This patch adds support of STM32 SPDIFRX on
stm32mp157c.

Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:04 +02:00
Fabrice Gasnier
8d07b78c3e ARM: dts: stm32: Add romem and temperature calibration on stm32f429
Add & enable stm32 factory-programmed memory. Describe temperature sensor
calibration cells.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:03 +02:00
Fabrice Gasnier
3024c18543 ARM: dts: stm32: Add romem and temperature calibration on stm32mp157c
Add & enable stm32 factory-programmed memory. Describe temperature sensor
calibration cells. Non-volatile calibration data is made available by
stm32mp157c bootrom in bsec_dataX registers.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:03 +02:00
Fabrice Gasnier
0f57950695 ARM: dts: stm32: Add clock on stm32mp157c syscfg
STM32 syscfg needs a clock to access registers.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:02 +02:00
Fabien Dessenne
682d099514 ARM: dts: stm32: enable IPCC mailbox support on STM32MP157a-dk1
Enable STM32 IPCC mailbox driver for STM32MP157a-dk1 board.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:02 +02:00
Fabien Dessenne
679d9dac52 ARM: dts: stm32: enable IPCC mailbox support on STM32MP157c-ed1
Enable STM32 IPCC mailbox driver for STM32MP157c-ed1 board.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:02 +02:00
Fabien Dessenne
eb2493172f ARM: dts: stm32: add IPCC mailbox support on STM32MP157c
Add configuration on DT for IPCC mailbox driver.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:01 +02:00
Ludovic Barre
8f6e0919b7 ARM: dts: stm32: add sdmmc1 support on stm32mp157a dk1 board
This patch adds sdmmc1 support on stm32mp157a dk1 board.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:01 +02:00
Ludovic Barre
379edbe434 ARM: dts: stm32: add sdmmc1 support on stm32mp157c ed1 board
This patch adds sdmmc1 support on stm32mp157c ed1 board.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:00 +02:00
Ludovic Barre
8d17cf7a8e ARM: dts: stm32: add sdmmc1 support on stm32mp157c
This patch adds support of sdmmc1 on stm32mp157c.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:00 +02:00
Ludovic Barre
30a8e03a1f ARM: dts: stm32: add sdmmc1 support on stm32h743i disco board
This patch adds sdmmc1 support on stm32h743i disco board.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:22:00 +02:00
Ludovic Barre
90f16fea40 ARM: dts: stm32: add sdmmc1 support on stm32h743i eval board
This patch adds sdmmc1 support on stm32h743i eval board.
This board has an external driver to control signal direction polarity.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:21:59 +02:00
Ludovic Barre
61c0f6b8b4 ARM: dts: stm32: add sdmmc1 support on stm32h743
This patch adds support of sdmmc1 on stm32h743.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-04-11 11:21:59 +02:00
Anson Huang
35dc29ef0f ARM: dts: imx6dl-sabreauto: update opp table for auto part
Update i.MX6DL automotive part's opp table according to i.MX6DL
automotive datasheet Rev.9, 11/2018, it adds 996MHz set-point
support as below:

LDO enabled(min value):
996MHz: VDDARM: 1.275V, VDDSOC: 1.175V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.125V, VDDSOC: 1.150V;

Adding 25mV to cover board IR drop, for LDO enabled mode of 996MHz,
as the max value of LDO output can NOT exceed 1.3V, so 25mV is NOT
added for VDDARM.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 14:59:33 +08:00
Fabio Estevam
00e3ff8b98 ARM: dts: imx: Use generic node names for Zii dts
The devicetree specification recommends using generic node names.

Some Zii dts files already follow such recommendation, but some don't,
so use generic node names for consistency among the Zii dts files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 13:51:09 +08:00
Fabio Estevam
7ee137a96a ARM: dts: imx: Switch Zii dts to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 13:50:55 +08:00
Adam Ford
7aedca8750 ARM: dts: imx6q-logicpd: Reduce inrush current on USBH1
Some USB peripherals draw more power, and the sourcing regulator
take a little time to turn on.  This patch fixes an issue where
some devices occasionally do not get detected, because the power
isn't quite ready when communication starts, so we add a bit
of a delay.

Fixes: 1c207f911fe9 ("ARM: dts: imx: Add support for Logic PD i.MX6QD EVM")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 13:45:03 +08:00
Adam Ford
dbb58e291c ARM: dts: imx6q-logicpd: Reduce inrush current on start
The main 3.3V regulator sources a series of additional regulators.
This patch adds a small delay, so when the 3.3V regulator comes
on it delays a bit before the subsequent regulators can come on.
This reduces the inrush current a bit on the external DC power
supply to help prevent a situation where the sourcing power supply
cannot source enough current and overloads and the kit fails to
start.

Fixes: 1c207f911fe9 ("ARM: dts: imx: Add support for Logic PD i.MX6QD EVM")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 13:44:44 +08:00
Adam Ford
6fd6d6f6a2 ARM: dts: imx6q-logicpd: Shutdown LCD regulator during suspend
The LCD power sequencer is very finicky.  The backlight cannot
be driven until after the sequencer is done.  Until now, the
regulators were marked with 'regulator-always-on' to make sure
it came up before the backlight.  This patch allows the LCD
regulators to power down and prevent the backlight from being
used again until the sequencer is ready.  This reduces
standby power consumption by ~100mW.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 13:44:12 +08:00
Adam Ford
45d9125040 ARM: dts: imx6q-logicpd: Enable Analog audio capture
The original submission had functional audio out and was based
on reviewing other boards using the same wm8962 codec. However,
the Logic PD board uses an analog microphone which was being
disabled for a digital mic.  This patch corrects that and
explicitly sets the gpio-cfg pins all to 0x0000 which allows the
analog microphone to capture audio.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 13:44:00 +08:00
Anson Huang
4b08ecc7c6 ARM: dts: imx6sll: add cooling-cells for cpu-freq cooling device
Add #cooling-cells for i.MX6SLL cpu-freq cooling device usage.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 13:08:55 +08:00
Jonathan Neuschäfer
891d940aef ARM: dts: imx50: Add Kobo Aura DTS
The Kobo Aura is an e-book reader released in 2013.

With the devicetree in its current state, the kernel will boot and run
for about ten seconds. To solve this, the embedded controller needs to
be told that the system should stay powered on. This will be done in a
later patchset.

- The IOMUXC mode bits for the SD interfaces were taken from the
  vendor's U-Boot fork.
- The bus width of the eMMC is 4 bits in the vendor kernel, but I
  achieved better performance with 8 bits.
- The SDIO clock frequency for the WiFi chip is 25MHz in the vendor
  kernel, but the WiFi chip (BCM43362) supports 50MHz, which works
  reliably on this board and gives slightly better performance.
- The I2C pins' IOMUXC settings come from the vendor's U-Boot fork.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 11:06:01 +08:00
Fabio Estevam
0672d22a19 ARM: dts: imx: Fix the AR803X phy-mode
Commit 6d4cd041f0af ("net: phy: at803x: disable delay only for RGMII mode")
exposed an issue on imx DTS files using AR8031/AR8035 PHYs.

The end result is that the boards can no longer obtain an IP address
via UDHCP, for example.

Quoting Andrew Lunn:

"The problem here is, all the DTs were broken since day 0. However,
because the PHY driver was also broken, nobody noticed and it
worked. Now that the PHY driver has been fixed, all the bugs in the
DTs now become an issue"

To fix this problem, the phy-mode property needs to be "rgmii-id",  which
has the following meaning as per
Documentation/devicetree/bindings/net/ethernet.txt:

"RGMII with internal RX and TX delays provided by the PHY, the MAC should
not add the RX or TX delays in this case)"

Tested on imx6-sabresd, imx6sx-sdb and imx7d-pico boards with
successfully restored networking.

Based on the initial submission from Steve Twiss for the
imx6qdl-sabresd.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Soeren Moch <smoch@web.de>
Tested-by: Steve Twiss <stwiss.opensource@diasemi.com>
Tested-by: Adam Thomson <Adam.Thomson@diasemi.com>
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Tested-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:57:56 +08:00
Andrew F. Davis
cadb32a9c1 ARM: dts: imx6qdl-var-dart: Use new CODEC reset pin name
The correct DT property for specifying a GPIO used for reset
is "reset-gpios", the driver now accepts this name, use it here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:41:55 +08:00
Andrew F. Davis
c83bbdc227 ARM: dts: imx6qdl-gw5903: Use new CODEC reset pin name
The correct DT property for specifying a GPIO used for reset
is "reset-gpios", the driver now accepts this name, use it here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:41:52 +08:00
Andrew F. Davis
1268d8339c ARM: dts: mx6qdl-zii-rdu2: Use new CODEC reset pin name
The correct DT property for specifying a GPIO used for reset
is "reset-gpios", the driver now accepts this name, use it here.

Note the GPIO polarity in the driver was ignored before and always
assumed to be active low, when all the DTs are fixed we will start
respecting the specified polarity. Switch polarity in DT to the
currently assumed one, this way when the driver changes the
behavior will not change.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:40:28 +08:00
Andrey Smirnov
b7b4fda263 ARM: dts: imx50: Specify IMX5_CLK_IPG as "ahb" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:36 +08:00
Andrey Smirnov
918bbde808 ARM: dts: imx51: Specify IMX5_CLK_IPG as "ahb" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:33 +08:00
Andrey Smirnov
28c168018e ARM: dts: imx53: Specify IMX5_CLK_IPG as "ahb" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX5_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX5_CLK_AHB as "ahb" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:30 +08:00
Andrey Smirnov
cc839d0f8c ARM: dts: imx6sx: Specify IMX6SX_CLK_IPG as "ahb" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6SL_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6SL_CLK_AHB as "ahb" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:27 +08:00
Andrey Smirnov
c5ed5daa65 ARM: dts: imx6sll: Specify IMX6SLL_CLK_IPG as "ipg" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6SLL_CLK_SDMA result in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6SLL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:25 +08:00
Andrey Smirnov
7b3132ecef ARM: dts: imx6ul: Specify IMX6UL_CLK_IPG as "ipg" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6UL_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6UL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:19 +08:00
Andrey Smirnov
412b032a1d ARM: dts: imx7d: Specify IMX7D_CLK_IPG as "ipg" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX7D_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX7D_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:16 +08:00
Andrey Smirnov
8979117765 ARM: dts: imx6sx: Specify IMX6SX_CLK_IPG as "ipg" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6SX_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6SX_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:14 +08:00
Andrey Smirnov
b14c872eeb ARM: dts: imx6qdl: Specify IMX6QDL_CLK_IPG as "ipg" clock to SDMA
Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6QDL_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality(this at least
breaks RAVE SP serdev driver on RDU2). Fix the code to specify
IMX6QDL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect
clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:11 +08:00
Rui Miguel Silva
e345fd4249 ARM: dts: imx7s-warp: add ov2680 sensor node
Warp7 comes with a Omnivision OV2680 sensor, add the node here to make
complete the camera data path for this system. Add the needed regulator
to the analog voltage supply, the port and endpoints in mipi_csi node
and the pinctrl for the reset gpio.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:47 +08:00
Rui Miguel Silva
2cd37a97d1 ARM: dts: imx7s-warp: add csi and mipi_csi node
Add and enable csi and mipi_csi nodes.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:34 +08:00
Rui Miguel Silva
6a2736fccf ARM: dts: imx7s: Add video mux, csi and mipi_csi
Add device tree nodes for csi, video multiplexer and mipi-csi.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:18 +08:00
Rui Miguel Silva
94a905a79f ARM: dts: imx7s: add multiplexer controls
The IOMUXC General Purpose Register has bitfield to control video bus
multiplexer to control the CSI input between the MIPI-CSI2 and parallel
interface. Add that register and mask.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:15 +08:00
Rui Miguel Silva
8137474b9d ARM: dts: imx7s: add mipi phy power domain
Add power domain index 0 related with mipi-phy to imx7s.

While at it rename pcie power-domain node to remove pgc prefix.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:02 +08:00
Bruno Thomsen
684a586741 ARM: dts: tq imx7d board support
This adds support for the TQ TQMa7D SoM together with
the MBa7 carrier board and it's based on the NXP i.MX7Dual SoC.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 09:29:07 +08:00
Bruno Thomsen
c924f0c07e ARM: dts: tq imx7s board support
This adds support for the TQ TQMa7S SoM together with
the MBa7 carrier board and it's based on the NXP i.MX7Solo SoC.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 09:29:07 +08:00
Bruno Thomsen
a80a1af6ec ARM: dts: tq imx7 common board support
This adds TQMa7 and MBa7 board support.
TQMa7 can be mounted with either i.MX7 Solo or Dual.
All TQMa7 board variants can be mounted in MBa7 carrier board.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 09:29:06 +08:00
Krzysztof Kozlowski
8cc76b1c75 ARM: dts: exynos: Remove console argument from bootargs
Remove the "console=ttySAC..." argument from DTSes having a proper
stdout-path property.  To make the code functionally equivalent, add the
serial port baud rate and parity.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-04-10 18:13:31 +02:00
Krzysztof Kozlowski
06d5360946 ARM: dts: exynos: Use stdout-path property instead of console in bootargs
Replacing bootargs with stdout-path property in chosen node allows using
early console by adding just 'earlycon' parameter to the kernel command
line.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-04-10 18:13:05 +02:00
Maxime Ripard
22f88e3113
ARM: dts: sun5i: Add the MBUS controller
The MBUS (and its associated controller) is the bus in the Allwinner SoCs
that DMA devices use in the system to access the memory.

Among other things (and depending on the SoC generation), it can also
enforce priorities or report bandwidth usages on a per-master basis.

One of the most notable thing is that instead of having the same mapping
for the RAM than the CPU, it maps it at address 0, which means we'll have
to do address translation thanks to the dma-ranges property.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-10 16:32:25 +02:00