4 Commits

Author	SHA1	Message	Date
Ben Skeggs	936a1678f3	drm/nouveau/core: support multiple nvdec instances ... Turing GPUs can have more than one. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>	2018-12-11 15:37:44 +10:00
Ben Skeggs	2c5ac5ba4f	drm/nouveau/secboot/gp108: implement on top of acr_r370 ... Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Gourav Samaiya <gsamaiya@nvidia.com>	2018-02-02 15:24:05 +10:00
Alexandre Courbot	aa7fc0ca75	drm/nouveau/secboot: fix inconsistent pointer checking ... We were returning PTR_ERR() on a NULL pointer, which obviously won't work. nvkm_engine_ref() will return an error in case something went wrong. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>	2017-03-17 10:08:24 +10:00
Alexandre Courbot	5429f82f34	drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support ... These gp10x chips are supporting using (roughly) the same firmware. Compared to previous secure chips, ACR runs on SEC2 and so does the low-secure msgqueue. ACR for these chips is based on r367. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>	2017-03-07 17:05:16 +10:00