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3 Commits

Author SHA1 Message Date
Vidya Sagar
de60266825 phy: tegra: Add PCIe PIPE2UPHY support for Tegra234 
Synopsys DesignWare core based PCIe controllers in Tegra234 SoC
interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U)
module. For each PCIe lane of a controller, there is a P2U unit
instantiated at hardware level. This driver provides support for the
programming required for each P2U that is going to be used for a PCIe
controller.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Link: https://lore.kernel.org/r/20220629060435.25297-9-vidyas@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2022-07-05 11:44:35 +05:30
Chunfeng Yun
9ab4212b0a phy: tegra: convert to devm_platform_ioremap_resource(_byname) 
Use devm_platform_ioremap_resource(_byname) to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Cc: JC Kuo <jckuo@nvidia.com>
Link: https://lore.kernel.org/r/1604642930-29019-16-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
 2020-11-16 12:47:48 +05:30
Vidya Sagar
5dae15b21d phy: tegra: Add PCIe PIPE2UPHY support 
Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC
interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U)
module. For each PCIe lane of a controller, there is a P2U unit
instantiated at hardware level. This driver provides support for the
programming required for each P2U that is going to be used for a PCIe
controller.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Thierry Reding <treding@nvidia.com>
 2019-08-13 16:01:15 +01:00