1191d110c3
drm/amdgpu: remove mmhub ip
...
Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-06 16:59:09 -04:00
373f592325
drm/amdgpu: remove gfxhub ip
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Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-06-06 16:59:03 -04:00
30db095f51
drm/amdgpu/powerplay/raven: add smu block and enable powerplay
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Add the ip block and enable powerplay on raven.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:55 -04:00
f2d7e70708
drm/amdgpu: add vcn ip block to soc15
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Signed-off-by: Leo Liu <leo.liu@amd.com >
Acked-by: Chunming Zhou <david1.zhou@amd.com >
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:39 -04:00
9e2837f6ae
drm/amdgpu/soc15: add psp ip block
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Signed-off-by: Huang Rui <ray.huang@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:21 -04:00
7fda6eca5d
drm/amdgpu: add nbio MGCG for raven
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Add medium grained nbio clockgating implementation.
Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:18 -04:00
aecbe64f2b
drm/amdgpu: apply nbio7 for Raven (v3)
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nbio handles misc bus io operations. Handle
differences between different nbio bus versions.
v2: switch checks from RAVEN to APU (Alex)
squash in raven rev id fetch
squash in fix uninitalized hdp flush reg index for raven
v3: add some missed RAVEN to APU checks (Alex)
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:17 -04:00
16f7bf0961
drm/amdgpu: enable sdma power gating for raven
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Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:15 -04:00
fe1a3b2e41
drm/amdgpu: enable sdma v4 MGCG and LS for raven
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Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:13 -04:00
c2cdb0ec01
drm/amdgpu: enable MC MGCG and LS for raven
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Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:41:11 -04:00
5c5928a238
drm/amdgpu: enable soc15 clock gating flags for raven
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Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:53 -04:00
9e5a9eb4ff
drm/amdgpu/soc15: add clock gating functions for raven
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Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:52 -04:00
957c6fe188
drm/amd/amdgpu: fill in raven case in soc15 early init
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Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com >
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:51 -04:00
e0ab957868
drm/amdgpu/soc15: add Raven golden setting
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Add the common golden settings for Raven.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:50 -04:00
1023b797d1
drm/amdgpu: add Raven ip blocks (v2)
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Add the IP blocks for RAVEN.
v2: drop DC for upstream (Alex)
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com >
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:50 -04:00
ab276632ec
drm/amdgpu/virt: change the place of virt_init_setting
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Change place of virt_init_setting function so that can cover the
cg and pg flags configuration.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:04 -04:00
3032f350ba
drm/amdgpu: drop support for per ASIC read registers
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Only per family registers are still used.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:02 -04:00
97fcc76b67
drm/amdgpu: drop support for untouched registers
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I couldn't figure out what this was original good for, but we
don't use it any more.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:40:01 -04:00
6b7781b42d
Merge remote-tracking branch 'airlied/drm-next' into drm-misc-next
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Picking up drm-next @ 4.12-rc1 in order to apply Michal Hocko's vmalloc patch set
Signed-off-by: Sean Paul <seanpaul@chromium.org >
2017-05-18 09:24:30 -04:00
248a1d6f1a
drm/amd: fix include notation and remove -Iinclude/drm flag
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Include <drm/*.h> instead of relative path from include/drm, then
remove the -Iinclude/drm compiler flag.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com >
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com >
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch >
Link: http://patchwork.freedesktop.org/patch/msgid/1493009447-31524-4-git-send-email-yamada.masahiro@socionext.com
2017-05-16 17:17:41 +02:00
bfc181af3b
drm/amdgpu/soc15: use atomfirmware for setting bios scratch for reset
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Need to use the atomfirmware interface rather than atombios since
soc15 is atomfirmware based.
Reviewed-by: Chunming Zhou <david1.zhou@amd.com >
Acked-by: Harry Wentland <harry.wentland@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-10 11:23:28 -04:00
91faed9ee1
drm/amdgpu/soc15: enable UVD code path for sriov
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Enable UVD block for SRIOV.
Signed-off-by: Frank Min <Frank.Min@amd.com >
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-28 17:33:01 -04:00
81758c5595
drm/amdgpu:invoke new implemented AI MB func
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Implement the sr-iov mailbox for soc15 asics.
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-06 13:28:07 -04:00
bb5c9ca588
drm/amdgpu:add PSP block only load_type=PSP (v2)
...
SRIOV currently only can load ucode directly, and PSP
block is not supported by VF temporarily.
will remove this restrict and use PSP load all ucode
even for SRIOV later
v2: squash in check against module parameter
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-06 13:28:04 -04:00
1fdc639b7a
drm/amdgpu/soc15: Fix static checker warnings
...
vega10 is the only soc15 asic at the moment so these
warnings are invalid, but add a default case to silence
the warnings.
Fixes: 220ab9bd1cJerry.Zhang@amd.com >
Reviewed-by: Harry Wentland <harry.wentland@amd.com >
Reported-by: Dan Carpenter <dan.carpenter@oracle.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-04-04 23:33:26 -04:00
bcf32a2371
drm/amdgpu: remove duplicate allowed reg CP_CPF_BUSY_STAT
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Remove duplicate mmCP_CPF_BUSY_STAT from the allowed registers.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-30 14:43:59 -04:00
c6f3e7cb13
drm/amdgpu/soc15: enable psp block for SRIOV
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SRIOV can support for loading ucode with PSP block, enable it.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Acked-by: Huang Rui <ray.huang@amd.com >
Acked-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:55 -04:00
cfd8373320
drm/amdgpu/soc15: bypass pp block for vf
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Disable pp block if device is vf.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Monk Liu <Monk.Liu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:55 -04:00
480e9150ea
drm/amdgpu/soc15: drop support for reading some registers
...
The RB harvest registers are not necessary, the driver already
exposes this info via the info ioctl. GB_BACKEND_MAP has
been deprecated since SI and is not relevant to the RB mapping.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:46 -04:00
c013cea2df
drm/amdgpu/soc15: return cached values for some registers (v2)
...
Required for SR-IOV and saves MMIO transactions.
v2: drop cached RB harvest registers
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:45 -04:00
6e9dc86121
drm/amdgpu:no cg for soc15 of SRIOV
...
no CG for SRIOV on SOC15
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:40 -04:00
b4d6126d1e
drm/amdgpu:virt_init_setting invoke is missed!
...
this must be invoked during early init
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:37 -04:00
f9abe35c30
drm/amdgpu: add get_clockgating callback for soc15 (v3)
...
v2: squash register typo fix from Ray
v3: fix spelling
Signed-off-by: Huang Rui <ray.huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:20 -04:00
468842a5e5
drm/amdgpu: disable uvd for sriov
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disable uvd for sriov temporarily.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:10 -04:00
f8445307b6
drm/amdgpu:vega10: enable virtual display if set via module option
...
Enable virtual displays if the user has enabled them via the
kernel command line. Useful in virtual or headless environments.
Reviewed-by: Harry Wentland <harry.wentland@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:07 -04:00
796b656840
drm/amdgpu/soc15: enable virtual dce for vf
...
VF need virtual dce, enable it if device is vf.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Monk Liu <Monk.Liu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:06 -04:00
f1a34465c8
drm/amdgpu/soc15: init virt ops for vf
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If gpu device is vf, set virt ops so that guest can talk with GPU
hypervisor.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Monk Liu <Monk.Liu@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:06 -04:00
86d3798af0
drm/amdgpu/soc15: bypass PSP for VF
...
Bypass PSP block for VF device.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Signed-off-by: Monk Liu <Monk.Liu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:55:03 -04:00
1b922423ce
drm/amdgpu: impl sriov detection for vega10
...
Read vega10 hw register to detect if sriov is enabled, and call
it before IP blocks setting.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Monk Liu <Monk.Liu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:57 -04:00
220ab9bd1c
drm/amdgpu: soc15 enable (v3)
...
Add soc15 support and enable all the IPs for vega10.
v2: squash in xclk fix
v3: disable HDP MGCG
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-03-29 23:54:55 -04:00
