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10 Commits

Author SHA1 Message Date
Mihai Sain
def8abbb14 ARM: at91: add support in soc driver for new SAMA5D29 
Add detection of new SAMA5D29 by the SoC driver.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220302155329.27668-1-nicolas.ferre@microchip.com
 2022-03-04 12:49:22 +01:00
Claudiu Beznea
cd9168b437 drivers: soc: atmel: add spdx license identifier 
Add SPDX-License-Identifier.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[nicolas.ferre@microhcip.com: remove license boilerplate now it's useless]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611653376-24168-2-git-send-email-claudiu.beznea@microchip.com
 2021-01-26 11:25:08 +01:00
Claudiu Beznea
f12a29cb56 drivers: soc: atmel: add support for sama7g5 
Add support for SAMA7G5 SoCs.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611318097-8970-8-git-send-email-claudiu.beznea@microchip.com
 2021-01-26 10:02:28 +01:00
Claudiu Beznea
af3a10513c drivers: soc: atmel: add per soc id and version match masks 
SAMA7G5 has different masks for chip ID and chip version on CIDR
register compared to previous AT91 SoCs. For this the commit adapts
the code for SAMA7G5 addition by introducing 2 new members in
struct at91_soc and fill them properly and also preparing the
parsing of proper DT binding.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/1611318097-8970-6-git-send-email-claudiu.beznea@microchip.com
 2021-01-26 10:02:28 +01:00
Kai Stuhlemmer
786c395dbe ARM: at91: sam9x60 SiP types added to soc description 
Adding SAM9X60 SIP variants to the soc description list.

Signed-off-by: Kai Stuhlemmer <kai.stuhlemmer@ebee.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201008125028.21071-1-nicolas.ferre@microchip.com
 2020-10-28 21:27:39 +01:00
Sandeep Sheriker Mallikarjun
446e8986a2 ARM: at91: add support in soc driver for new SAM9X60 
Add detection of new SAM9X60 by this soc.c driver.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[nicolas.ferre@microchip.com: split patch]
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2018-12-12 11:55:20 +01:00
Nicolas Ferre
15653dc850 ARM: at91: add support in soc driver for LPDDR2 SiP 
Add some more SiP components to be detected by this soc.c driver.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2018-12-12 11:10:00 +01:00
Cristian Birsan
cd2e9be89a drivers: soc: atmel: Add basic support for new sama5d2 SiPs 
Add basic support for new sama5d2 System in a Package chips.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
[claudiu.beznea@microchip.com: use MiB instead of MB]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
 2017-09-17 19:45:59 +02:00
Szemző András
82208e7568 ARM: at91: add armv7m SoC detection 
Add SAME70/V71/S70/V70 chip-ids to SoC detection.

Signed-off-by: Szemző András <sza@esh.hu>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
 2017-06-02 10:11:49 +02:00
Alexandre Belloni
b32de9dd38 ARM: at91: move SoC detection to its own driver 
To simplify machine init and as the soc_device struct is not used as the
parent for on-chip devices anymore, move SoC detection to its own driver.

Change in dmesg:
 - before:
DMA: preallocated 256 KiB pool for atomic coherent allocations
AT91: Detected SoC family: sama5d2
AT91: Detected SoC: sama5d27, revision 0
No ATAGs?
clocksource: tcb_clksrc: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 184217874325 ns
at_xdmac f0010000.dma-controller: 16 channels, mapped at 0xe085b000
SCSI subsystem initialized

 - after:
DMA: preallocated 256 KiB pool for atomic coherent allocations
No ATAGs?
clocksource: tcb_clksrc: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 184217874325 ns
at_xdmac f0010000.dma-controller: 16 channels, mapped at 0xe0859000
AT91: Detected SoC family: sama5d2
AT91: Detected SoC: sama5d27, revision 0
SCSI subsystem initialized

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
 2017-03-31 20:36:10 +02:00