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Fix soc build errors when I2C is built as a loadable module:
(.text+0x5d26b): undefined reference to `i2c_master_send'
soc-cache.c:(.text+0x5d32d): undefined reference to `i2c_transfer'
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This converts all the Wolfson drivers using this format (the only devices
that do) except WM8753 to use it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
As part of this refactoring the type of the CODEC hw_read operation
is changed to match the regular read operation.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
While writes tend to be able to use a fairly bus independant format to
do the writes reads are all bus specific. To allow us to factor out
this code include the bus type as a parameter when setting up the
cache.
Initially just use this to factor out hw_write_t for I2C.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
A lot of CODECs share the same register data formats and therefore
replicate the code to manage access to and caching of the register
map. In order to reduce code duplication centralised versions of
this code will be introduced with drivers able to configure the use
of the common code by calling the new snd_soc_codec_set_cache_io()
API call during startup.
As an initial user the 7 bit address/9 bit data format used by many
Wolfson devices is supported for write only CODECs and the drivers
with straightforward register cache implementations are converted to
use it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
