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4 Commits

Author SHA1 Message Date
Sergei Shtylyov
3e5907a17f drm: rcar-du: lvds: Fix LVDCR1 for R-Car gen3 
The LVDCR1 register for the R-Car gen3 SoCs was documented as having the
layout different from the gen2 SoCs in  the early R-Car gen3 manuals but
since v0.52 the LVDCR1 layout is described as being the same as on the gen2
SoCs; the old CHn control values are said to be prohibited now (and there
seems to be no valid output signal when they are used).

Fixes: 6bc2e15cf21c ("drm: rcar-du: lvds: Add R-Car Gen3 support")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
 2018-02-14 18:17:02 +02:00
Koji Matsuoka
6bc2e15cf2 drm: rcar-du: lvds: Add R-Car Gen3 support 
The LVDS encoder differs slightly in Gen3 SoCs in its PLL configuration.
Add support for the Gen3 LVDS PLL parameters and startup procedure.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
 2016-02-23 09:34:32 +02:00
Laurent Pinchart
82e7c5e496 drm: rcar-du: lvds: Rename PLLEN bit to PLLON 
The bit is named PLLON in the datasheet, rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
 2016-02-23 09:34:31 +02:00
Laurent Pinchart
90374b5c25 drm/rcar-du: Add internal LVDS encoder support 
The R8A7790 includes two internal LVDS encoders. Support them in the DU
driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
 2013-08-09 23:17:53 +02:00