2135 Commits
Author | SHA1 | Message | Date | |
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Olof Johansson
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571d32c283 |
Renesas ARM64 DT updates for v5.5 (take two)
- Video-Input and Serial-ATA support on RZ/G2N, - Color Management Module support on various R-Car Gen3 SoCs, - Initial support for the R-Car M3-W+ (r8a77961) SoC on the Salvator-XS board. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbxHYgAKCRCKwlD9ZEnx cNS0AQDofwzZRnNq8xUumbw9fg2I79qhVqqBFYpg+R8qV7qgQQD/WwOfSfE6UlCf fTfpYowfPX8z985u7/vYDVfSv19d/Ag= =qA0S -----END PGP SIGNATURE----- Merge tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM64 DT updates for v5.5 (take two) - Video-Input and Serial-ATA support on RZ/G2N, - Color Management Module support on various R-Car Gen3 SoCs, - Initial support for the R-Car M3-W+ (r8a77961) SoC on the Salvator-XS board. * tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+ arm64: dts: renesas: Add Renesas R8A77961 SoC support arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960 dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions dt-bindings: power: Add r8a77961 SYSC power domain definitions arm64: dts: renesas: r8a774b1: Add SATA controller node arm64: dts: renesas: rcar-gen3: Add CMM units arm64: dts: renesas: r8a774b1: Add VIN and CSI-2 support Link: https://lore.kernel.org/r/20191101155842.31467-5-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net> |
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Olof Johansson
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a1094a7c27 |
Realtek ARM64 based SoC DT for v5.5
Add RTD1293 and RTD1296 DTs. Add the watchdog for all of RTD129x DTs. Add reset controllers for RTD129x and start using them for UARTs. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEF08DRxvMIhphdW+W+i7RLT5+AT8FAl25CJkRHGFmYWVyYmVy QHN1c2UuZGUACgkQ+i7RLT5+AT8ndw/+PaYt6B92yzw5DwIYmONvSGuqgy51AFdu Wm6ATtdHGNJllXe7pAHh8a3cQMKAz04N/Xk+kMUfyYtnaQ2fvByS7yiXnMbVqIj7 Q8AmE++ijDM5wTNF45Q3T+Rd7zcMQujElAGu+8l9I4P3iMwItK6LMAAXwCgOelec 8brsLrqbjRNgtICFbds/7fMSn0ZaHiFu5gld07TyPHs5uTtq0raF8wL13X7IgBiB R70U62ux24Ld4SaFOShrgkJjDlPeZH8DH7bRh5PGlEmp822ZrFI//fc7a0HNpC8R ygBz2kmErZ1G9xPUwgEWtnTSh4D9QDJxI1btEaBuMbKI96Yaa9PIqV9tHtjJ0eWr lKEI8ymoFLaNqSQb9sMf7BGYEw/IXF7JAT42SL6APYYPccLezFUjKBRk9hRQBiy7 PNFGXsa+dmvMu5vpYLoyJKmJf8Z7HXkx3buk8rj39ru7AHr37kJdwy3SAqZdH4KZ vFt1r2bFeBBhB+i9PuSrAVS+oL49UDd2IcB/1lZkvy6Y1waxIkJKZJPQVXnkrvtE DUiaq8Fcl4iZHmxL3wIKGdldFb77vCERI5cGwMfbh/qCZ8x+3ra4lEwysOAE9dGb OWO5KkGHIITZkFDQuOJtNcwXXsM2W4EgKmMdfnStFXycim1Wc3V7ACPyB2GuUR4Y lgdneqA9dpo= =yVVf -----END PGP SIGNATURE----- Merge tag 'realtek-arm64-dt-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/dt Realtek ARM64 based SoC DT for v5.5 Add RTD1293 and RTD1296 DTs. Add the watchdog for all of RTD129x DTs. Add reset controllers for RTD129x and start using them for UARTs. * tag 'realtek-arm64-dt-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek: arm64: dts: realtek: Add RTD129x UART resets arm64: dts: realtek: Add RTD129x reset controller nodes dt-bindings: reset: Add Realtek RTD1295 arm64: dts: realtek: Add watchdog node for RTD129x arm64: dts: realtek: Add oscillator for RTD129x arm64: dts: realtek: Add RTD1296 and Synology DS418 dt-bindings: arm: realtek: Document RTD1296 and Synology DS418 arm64: dts: realtek: Add RTD1293 and Synology DS418j arm64: dts: realtek: Change dual-license from MIT to BSD dt-bindings: arm: realtek: Document RTD1293 and Synology DS418j dt-bindings: arm: realtek: Tidy up conversion to json-schema Link: https://lore.kernel.org/r/20191030041000.31848-2-afaerber@suse.de Signed-off-by: Olof Johansson <olof@lixom.net> |
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Codrin Ciubotariu
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0b32928528 |
pinctrl: at91: Enable slewrate by default on SAM9X60
On SAM9X60, slewrate should be enabled on pins with a switching frequency below 50Mhz. Since most of our pins do not exceed this value, we enable slewrate by default. Pins with a switching value that exceeds 50Mhz will have to explicitly disable slewrate. This patch changes the ABI. However, the slewrate macros are only used by SAM9X60 and, at this moment, there are no device-tree files available for this platform. Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20191101092031.24896-1-codrin.ciubotariu@microchip.com Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Geert Uytterhoeven
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16208387bb |
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbwQzAAKCRCKwlD9ZEnx cGA2AQDvA8Uaf/WQ1zzq5GgHPB6R35ciBFCVn3AG+6izUqsCPAEA0FGEHsrNtWyG rcJ+C/8vBJ+Pe359DmXaELorJ4Xm6wQ= =EV4L -----END PGP SIGNATURE----- Merge tag 'renesas-r8a77961-dt-binding-defs-tag' into renesas-drivers-for-v5.5 Renesas R-Car M3-W+ DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. |
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Geert Uytterhoeven
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7574ed0e08 |
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbwQzAAKCRCKwlD9ZEnx cGA2AQDvA8Uaf/WQ1zzq5GgHPB6R35ciBFCVn3AG+6izUqsCPAEA0FGEHsrNtWyG rcJ+C/8vBJ+Pe359DmXaELorJ4Xm6wQ= =EV4L -----END PGP SIGNATURE----- Merge tag 'renesas-r8a77961-dt-binding-defs-tag' into renesas-arm64-dt-for-v5.5 Renesas R-Car M3-W+ DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. |
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Geert Uytterhoeven
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b07e816fc4 |
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbwQzAAKCRCKwlD9ZEnx cGA2AQDvA8Uaf/WQ1zzq5GgHPB6R35ciBFCVn3AG+6izUqsCPAEA0FGEHsrNtWyG rcJ+C/8vBJ+Pe359DmXaELorJ4Xm6wQ= =EV4L -----END PGP SIGNATURE----- Merge tag 'renesas-r8a77961-dt-binding-defs-tag' into clk-renesas-for-v5.5 Renesas R-Car M3-W+ DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. |
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Geert Uytterhoeven
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0b05ad22a2 |
dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car M3-W+ (R8A77961) SoC, as listed in Table 8.2b ("List of Clocks [R-Car M3-W/R-Car M3-W+]") of the R-Car Series, 3rd Generation Hardware User's Manual (Rev. 2.00, Jul. 31, 2019). A gap is added for CSIREF, to preserve compatibility with the definitions for R-Car M3-W (R8A77960). Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and POST2) are not included, as they are used as internal clock sources only, and never referenced from DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20191023122941.12342-3-geert+renesas@glider.be |
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Geert Uytterhoeven
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640f9606dc |
dt-bindings: power: Add r8a77961 SYSC power domain definitions
Add power domain indices for the R-Car M3-W+ (R8A77961) SoC. Based on Rev. 2.00 of the R-Car Series, 3rd Generation, Hardware User’s Manual (Jul. 31, 2019). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com> Link: https://lore.kernel.org/r/20191023122911.12166-6-geert+renesas@glider.be |
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Andrew Jeffery
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d8d9ad83a4 |
dt-bindings: clock: Add AST2600 RMII RCLK gate definitions
The AST2600 has an explicit gate for the RMII RCLK for each of the four MACs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au> |
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Andrew Jeffery
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5b468cc4b8 |
dt-bindings: clock: Add AST2500 RMII RCLK definitions
The AST2500 has an explicit gate for the RMII RCLK for each of the two MACs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au> |
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Tero Kristo
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2d5f60afd2 |
dt-bindings: clk: add omap5 iva clkctrl definitions
OMAP5 device contains an IVA subsystem (Image and Video Accelerator.) IVA subsystem clkctrl definitions are currently missing, so add them. Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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Thierry Reding
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cdc2d6685c |
dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT
Tegra186 and later call this clock SOR0_OUT. Rename it on Tegra124 and Tegra210 to make the names consistent. Keep the old name for now to keep device trees buildable until they have all been converted. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Andreas Färber
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4df56a1eb1 |
dt-bindings: reset: Add Realtek RTD1295
Add a header with symbolic reset indices for Realtek RTD1295 SoC. Naming was derived from reset-names in an OEM's Device Tree. Acked-by: Rob Herring <robh@kernel.org> [AF: Dropped RTD1295 specific binding definition, updated SPDX] Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Andreas Färber <afaerber@suse.de> |
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Olof Johansson
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b7f7a0b58f |
Reset controller updates for v5.5
This tag adds support for Meson SM1 ARB resets, Uniphier Pro5 USB3 resets, the Meson-A1 reset controller, SocFPGA Agilex resets, and Realtek RTD1195/RTD1295 resets. It adds some reset controller API keywords for get_maintainers.pl and makes a few remaining reset_control_ops const. Also included are a conversion of the Qualcomm device tree bindings to yaml and a few small kerneldoc improvements. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCXbbwUxcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwEKeAP498UhJ8+GB8PUCpRIPAmFwjAON n+2EFHTn5Od08ueqqAEA4SH13tR5PJBo6G/J6KgLULUFts4Uc/Hb760/2ai3eQw= =eyHx -----END PGP SIGNATURE----- Merge tag 'reset-for-v5.5' of git://git.pengutronix.de/git/pza/linux into arm/drivers Reset controller updates for v5.5 This tag adds support for Meson SM1 ARB resets, Uniphier Pro5 USB3 resets, the Meson-A1 reset controller, SocFPGA Agilex resets, and Realtek RTD1195/RTD1295 resets. It adds some reset controller API keywords for get_maintainers.pl and makes a few remaining reset_control_ops const. Also included are a conversion of the Qualcomm device tree bindings to yaml and a few small kerneldoc improvements. * tag 'reset-for-v5.5' of git://git.pengutronix.de/git/pza/linux: reset: document (devm_)reset_control_get_optional variants reset: improve of_xlate documentation reset: simple: Add Realtek RTD1195/RTD1295 reset: simple: Keep alphabetical order MAINTAINERS: add reset controller framework keywords reset: zynqmp: Make reset_control_ops const reset: hisilicon: hi3660: Make reset_control_ops const reset: build simple reset controller driver for Agilex reset: add support for the Meson-A1 SoC Reset Controller dt-bindings: reset: add bindings for the Meson-A1 SoC Reset Controller reset: uniphier-glue: Add Pro5 USB3 support dt-bindings: reset: pdc: Convert PDC Global bindings to yaml dt-bindings: reset: aoss: Convert AOSS reset bindings to yaml reset: Remove copy'n'paste redundancy in the comments reset: meson-audio-arb: add sm1 support reset: dt-bindings: meson: update arb bindings for sm1 Link: https://lore.kernel.org/r/ede6874508472d0917dca770ef80b90626b0f205.camel@pengutronix.de Signed-off-by: Olof Johansson <olof@lixom.net> |
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Fancy Fang
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72b2429d40 |
clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock
The mipi pll clock comes from the MIPI PHY PLL output, so it should not be a fixed clock. MIPI PHY PLL is in the MIPI DSI space, and it is used as the bit clock for transferring the pixel data out and its output clock is configured according to the display mode. So it should be used only for MIPI DSI and not be exported out for other usages. Signed-off-by: Fancy Fang <chen.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Leonard Crestez
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e8688fe8df |
clk: imx8mn: Define gates for pll1/2 fixed dividers
On imx8mn there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2 each with their own gate. Only one of these gates (the one "dividing" by one) is currently defined and it's incorrectly set as the parent of all the fixed-factor dividers. Add the other 8 gates to the clock tree between sys_pll1/2_bypass and the fixed dividers. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Leonard Crestez
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3e4947acad |
clk: imx8mm: Define gates for pll1/2 fixed dividers
On imx8mm there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2 each with their own gate. Only one of these gates (the one "dividing" by one) is currently defined and it's incorrectly set as the parent of all the fixed-factor dividers. Add the other 8 gates to the clock tree between sys_pll1/2_bypass and the fixed dividers. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Leonard Crestez
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b04383b6a5 |
clk: imx8mq: Define gates for pll1/2 fixed dividers
On imx8mq there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2 each with their own gate but these gates are not currently defined in the clock tree. Add them between sys1/2_pll_out and the fixed dividers. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Olof Johansson
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ee1d28a449 |
A lot of improvements for the (till now) somewhat dormant px30 soc,
power-tree improvements ofr the roc-rk3399-pc, after a long wait also support for the CR50 TPM device found on some RK3399-Gru devices, some audio and gmac improvements for NanoPi4 and Rockpro64 as well as marking the redundant RK_FUNC_x -> x mapping as deprecated and fixing a missing #msi-cells on rk3399. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl2tn3IQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgRQcB/4zxlsdUJbwmocLmZadCfBYII1QKdeh2kcr u4D1T3KuxFjLPCjDcIdZ94+i8iruvXDjPi/PYGBQc63RQmgTud1woEmL5NxBsNOe TJm9VOHKbkIYxnwSfrkBNTgtmKvxl6H0VWXpUA85f01s7HDAPnk+/8p37Vm22mIa +MJy6dFHN2/jM6PC9E0rMmS4GEn90b7US0SRHHu2ENtZTH9qKWPW5+9RUqkgQsnl qvnopEervmbQ0Di50L1KTaeEnzzCgbclc95rGMWmsUwAXe6gS9UmKuVlSogHCSP3 u4h6gsCPW4IwV4lkYVVubDn3eB0r0T8FUSdNIGUqZ0KYPYgPClun =BXS2 -----END PGP SIGNATURE----- Merge tag 'v5.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt A lot of improvements for the (till now) somewhat dormant px30 soc, power-tree improvements ofr the roc-rk3399-pc, after a long wait also support for the CR50 TPM device found on some RK3399-Gru devices, some audio and gmac improvements for NanoPi4 and Rockpro64 as well as marking the redundant RK_FUNC_x -> x mapping as deprecated and fixing a missing #msi-cells on rk3399. * tag 'v5.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: include: dt-bindings: rockchip: mark RK_FUNC defines as deprecated arm64: dts: rockchip: restyle rockchip,pins on rk3399-rock-pi-4 arm64: dts: rockchip: Update nanopi4 phy reset properties arm64: dts: rockchip: Enable nanopi4 HDMI audio arm64: dts: rockchip: add cr50 tpm to rk3399-gru scarlet and bob arm64: dts: rockchip: add analog audio nodes on rk3399-rockpro64 arm64: dts: rockchip: add missing #msi-cells to rk3399 arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails arm64: dts: rockchip: Rename vcc12v_sys into dc_12v for roc-rk3399-pc dt-bindings: document PX30 usb2phy General Register Files arm64: dts: rockchip: add px30-evb i2c1 devices arm64: dts: rockchip: document explicit px30 cru dependencies arm64: dts: rockchip: remove unused pin settings from px30 arm64: dts: rockchip: move px30-evb console output to uart 5 arm64: dts: rockchip: add emmc-powersequence to px30-evb arm64: dts: rockchip: fix the px30-evb power tree arm64: dts: rockchip: add default px30 emmc pinctrl arm64: dts: rockchip: remove px30 emmc_pwren pinctrl arm64: dts: rockchip: remove static xin32k from px30 arm64: dts: rockchip: fix iface clock-name on px30 iommus Link: https://lore.kernel.org/r/1650793.YZj09CGBNl@phil Signed-off-by: Olof Johansson <olof@lixom.net> |
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Maciej Falkowski
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6cc23ed2ce
|
ASoC: samsung: i2s: Document clocks macros
Document clocks macros with their description from 'Documentation/devicetree/bindings/sound/samsung-i2s.txt' Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20190926110219.6144-1-m.szyprowski@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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Johan Jonker
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d083ce4279 |
include: dt-bindings: rockchip: mark RK_FUNC defines as deprecated
The defines RK_FUNC_1, RK_FUNC_2, RK_FUNC_3 and RK_FUNC_4 are no longer used. Mark them as "deprecated" to prevent that someone start using them again. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20191015205852.4200-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Kevin Hilman
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f21ab7906d |
First round of amlogic DT binding clock update target for v5.5
Add the audio clock and reset bindings for the sm1 SoC family -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE9OFZrhjz9W1fG7cb5vwPHDfy2oUFAl2cO+cACgkQ5vwPHDfy 2oXQug//cqVN9hhMgZv+an1DmZbJ2vt2lJvs9ddk2eNodlLC3wvz93YeNyqNn79p 11KNDBtgaorR5o41wfjHSlqZBqQQjhIPKdod/i5xzAJSi/0d6GzahrcUp6jXsE5o dzImQcGXzhhYpK21JXftq3OBqwEQrML5DgW+ab42IoV8CERCDSavpn/ZYP2RRqBY +5n1owpW+2f5xp2fkT5T/HGrDEdAbgM3lZEgM4w/2Tp9XpBxHDqbS7iDV7OLV+4/ Mb4zXwB9ra7u/bxEIPi4tpUaruZYfNFd5c3lWOd6nD+218UHo2pF0ZLlaNhw3Xdp 0M9Cyjy5hgqPDWTfmVKkKQKWXY7ys06rvLXowAfaob0SpHKV11QtPnmJYhsmDP60 vQTwi1ejfl/KsmNm6b6OTuRdflRCuDVueUuuX1xIFc30phnoqt99pvjz8GVSzqiX rx3QdYvhXbi0ioqSjdiu8KITBjdllsfPpO42qMsnU5wOWeOLQk9Ju42yK9IFwjSs C5aDeo9WEaUHYHJpI+KXdB38BFDEv2qvKz729t/tnenmgq0F+gy1CUPtwIe0rP8J GxK/KEEgCuwuwL/LcSb9iA7U2ycmDE0G6Kqoh0kTQd698CeIvPiLy9+yNP5HZeyT 2eUFGpKGSyZ25P5SAIHkQ2PSScjsQ5wemsf1jFuJgn/dngPEDkM= =XPSR -----END PGP SIGNATURE----- Merge tag 'clk-meson-dt-v5.5-1' of git://github.com/BayLibre/clk-meson into v5.5/dt64-redo First round of amlogic DT binding clock update target for v5.5 Add the audio clock and reset bindings for the sm1 SoC family * tag 'clk-meson-dt-v5.5-1' of git://github.com/BayLibre/clk-meson: dt-bindings: clock: meson: add sm1 resets to the axg-audio controller dt-bindings: clk: axg-audio: add sm1 bindings |
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Laurentiu Palcu
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f0b1d7f2e7 |
clk: imx8mq: Add VIDEO2_PLL clock
This clock is needed by DCSS when high resolutions are used. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com> CC: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Greg Kroah-Hartman
|
9dc86c234e |
First set of IIO new device support, cleanups and features for the 5.5 cycle
Third version with the adis rework set dropped as better to just have a fresh version of that at some future date. The usual mixed backs of new device support being added to drivers, long term reworks continuing and little per driver cleanups and features. Also a few trivial counter subsystem tidy ups on behalf of William. Core new feature * Device label support. A long requested feature no one got around to implementing before. Allows DT based provision of a 'label' that identifies a device uniquely within a system. This differs from existing 'name' which is meant to be the part number. New device support * ingenic-adc - Support for the JZ4770 SoC ADC including bindings. * inv_mpu6050 - Add support for magnetometer in MPU925x parts. Fiddly to do as this is actually a separate device sitting inside the package, but with the master device being able to schedule reads etc. Will only run if the auxiliary bus is not in use for any other devices. Features * ad7192 - Userspace calibration controls to do zero and full scale. * st_lsm6dsx - Enable latched interrupts by default for sensors events with related clear. - Motion events and related wakeup source. This needed quite a bit of refactoring as well. Cleanups and minor features * ad7192 - sysfs ABI docs * ad7949 - Remove code to readback configuration word as driver never actually enabled it. - Fix incorrect xfer length. Not actually known to cause problems other than wasted bus usage. * adis16080 - Replace core mlock usage with local lock with more appropriate scope. * adis16130 - Remove pointless mlock usage. * adis16240 - Remove include of gpio.h as no gpio usage. * atlas-ph-sensor - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * bh1750 - Fix up a static compiler warning and make the code more readable. - yaml conversion of binding + MAINTAINERS entry. * bmp280 - Drop a stray newline. * cm36651 - Drop a redundant assignment * itg3200 - Alignment cleanup. * max31856 - Add missing of_node and parent references, useful to identify the device. * sc27xx_adc - Use devm_hwspin_lock_request_specific rather than local rolled version. * stm32-lptimer counter - kernel-doc warning. * stm32-timer counter - kernel-doc warning. - Alignment cleanup. * sx9500 - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * tcs3414 - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAl2i3GIRHGppYzIzQGtl cm5lbC5vcmcACgkQVIU0mcT0FohHeRAAlZ0gHdNKJ/30vtX2GZQiSE0IrQlbTYVz 5t0Zvm1RWpuHdbMpANtsjPYI5oDUEO34O8520Kl6g/AwIQ6qfqpbaToTZA76fu8M B7eHO6a+UHL5kKFV5YQS2cDqtDpuPo1SR/0cCe7dDcjwvAm8jeehKtlCUFTVImU5 sMEuaD41Sr8Y5IuTpQIqFaGc4BS0s4NUJ7+fkq6ud3Qlw6CVWdLz0pz/kjnnLJcP jdr+VRqD6x+gXrujX+1iaeFu+r2dF+a9z3aPgr8vJj/6asnY0uihs82YTuL2v4Wb tBM3MKooTQt1zgrCEO7n/+GzC02pXbQ8mRPI2H1eOl4jaJhyttkSNztEo9k4EQ3N wYbAvc97yWNVthHd/2z7rDYf3SntN8nqjCkeuvn83P/6uhQS9EzSiVV2hkUda0K0 y1ZKOTDH0W+jCFITCtrDR1GLdV6GLPiv1AlG5l9AXyUfRBFBRWg9duLFYeVsVouu g3yxzO0PbsNKMbPqjwT+YzNCd4/QKpuU7/+WTBSNUVo428i/p3lpnXQyhJiQrWIE 3TH+pj6Es8WYNmuRw3h9bMTjxca9Esk/e6MZ8vnOFUKrHB1T1iQB+rSsascZQM9a +uv+d2x27KVUqotP8DLat1FYHDIbaIScKJioAWsLepscpBucJ3ayHq5yOFGXXp9i KKqT9ObTUfw= =nIWU -----END PGP SIGNATURE----- Merge tag 'iio-for-5.5a-take3' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next Jonathan writes: First set of IIO new device support, cleanups and features for the 5.5 cycle Third version with the adis rework set dropped as better to just have a fresh version of that at some future date. The usual mixed backs of new device support being added to drivers, long term reworks continuing and little per driver cleanups and features. Also a few trivial counter subsystem tidy ups on behalf of William. Core new feature * Device label support. A long requested feature no one got around to implementing before. Allows DT based provision of a 'label' that identifies a device uniquely within a system. This differs from existing 'name' which is meant to be the part number. New device support * ingenic-adc - Support for the JZ4770 SoC ADC including bindings. * inv_mpu6050 - Add support for magnetometer in MPU925x parts. Fiddly to do as this is actually a separate device sitting inside the package, but with the master device being able to schedule reads etc. Will only run if the auxiliary bus is not in use for any other devices. Features * ad7192 - Userspace calibration controls to do zero and full scale. * st_lsm6dsx - Enable latched interrupts by default for sensors events with related clear. - Motion events and related wakeup source. This needed quite a bit of refactoring as well. Cleanups and minor features * ad7192 - sysfs ABI docs * ad7949 - Remove code to readback configuration word as driver never actually enabled it. - Fix incorrect xfer length. Not actually known to cause problems other than wasted bus usage. * adis16080 - Replace core mlock usage with local lock with more appropriate scope. * adis16130 - Remove pointless mlock usage. * adis16240 - Remove include of gpio.h as no gpio usage. * atlas-ph-sensor - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * bh1750 - Fix up a static compiler warning and make the code more readable. - yaml conversion of binding + MAINTAINERS entry. * bmp280 - Drop a stray newline. * cm36651 - Drop a redundant assignment * itg3200 - Alignment cleanup. * max31856 - Add missing of_node and parent references, useful to identify the device. * sc27xx_adc - Use devm_hwspin_lock_request_specific rather than local rolled version. * stm32-lptimer counter - kernel-doc warning. * stm32-timer counter - kernel-doc warning. - Alignment cleanup. * sx9500 - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * tcs3414 - Improve logical ordering of buffer predisable / postenable functions. This is part of a longer term rework Alexandru is driving towards. * tag 'iio-for-5.5a-take3' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (41 commits) iio: pressure: bmp280: remove stray newline iio: adc: sc27xx: Use devm_hwspin_lock_request_specific() to simplify code iio: chemical: atlas-ph-sensor: fix iio_triggered_buffer_predisable() position iio: gyro: clean up indentation issue counter: stm32: clean up indentation issue iio: proximity: sx9500: fix iio_triggered_buffer_{predisable,postenable} positions iio: core: Add optional symbolic label to device attributes dt-binding: iio: Add optional label property iio: gyro: adis16080: replace mlock with own lock counter: stm32-lptimer-cnt: fix a kernel-doc warning counter: stm32-timer-cnt: fix a kernel-doc warning iio: gyro: adis16130: remove mlock usage MAINTAINERS: add entry for ROHM BH1750 driver dt-bindings: iio: light: bh1750: convert bindings to yaml iio: imu: st_lsm6dsx: add motion report function and call from interrupt iio: imu: st_lsm6dsx: always enter interrupt thread iio: imu: st_lsm6dsx: add wakeup-source option iio: imu: st_lsm6dsx: add motion events iio: imu: st_lsm6dsx: move interrupt thread to core iio: imu: inv_mpu6050: add fifo support for magnetometer data ... |
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Xingyu Chen
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5d9730b9eb |
dt-bindings: reset: add bindings for the Meson-A1 SoC Reset Controller
Add DT bindings for the Meson-A1 SoC Reset Controller include file, and also slightly update documentation. Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Jerome Brunet
|
aa03ea9bce |
dt-bindings: clock: meson: add sm1 resets to the axg-audio controller
Add the reset id of the sm1 audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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Jerome Brunet
|
0ea0a188fd |
dt-bindings: clk: axg-audio: add sm1 bindings
Add the compatible and clock ids of the sm1 audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
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AngeloGioacchino Del Regno
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b1d522443b |
soc: qcom: rpmpd: Add rpm power domains for msm8976
The MSM8956/76 SoCs have two main voltage-level power domains, VDD_CX and VDD_MX, which also have their own voltage-floor-level (VFL) corner. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
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Angelo G. Del Regno
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4bc6aadbcc |
dt-bindings: power: Add missing rpmpd smd performance level
The RPM_SMD_LEVEL_TURBO_HIGH is used by MSM8956/8976 and APQ variants: add the definition. Signed-off-by: Angelo G. Del Regno <kholk11@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
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Jerome Brunet
|
c2016cc612 |
reset: dt-bindings: meson: update arb bindings for sm1
SM1 SoC family adds two new audio FIFOs with the related arb reset lines Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Biju Das
|
54ce17dd40 |
dt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions
Add all RZ/G2N Clock Pulse Generator Core Clock Outputs, as listed in Table 8.2d ("List of Clocks [RZ/G2N]") of the RZ/G2N Hardware User's Manual. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1567666360-28035-1-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Biju Das
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be67c41781 |
dt-bindings: power: Add r8a774b1 SYSC power domain definitions
This patch adds power domain indices for the RZ/G2N (a.k.a r8a774b1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1567666326-27373-1-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Linus Torvalds
|
5c6bd5de3c |
Main MIPS changes for v5.4:
- boot_mem_map is removed, providing a nice cleanup made possible by the recent removal of bootmem. - Some fixes to atomics, in general providing compiler barriers for smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs or MIPS32 systems using cmpxchg64(). - Conversion to the new generic VDSO infrastructure courtesy of Vincenzo Frascino. - Removal of undefined behavior in set_io_port_base(), fixing the behavior of some MIPS kernel configurations when built with recent clang versions. - Initial MIPS32 huge page support, functional on at least Ingenic SoCs. - pte_special() is now supported for some configurations, allowing among other things generic fast GUP to be used. - Miscellaneous fixes & cleanups. And platform specific changes: - Major improvements to Ingenic SoC support from Paul Cercueil, mostly enabled by the inclusion of the new TCU (timer-counter unit) drivers he's spent a very patient year or so working on. Plus some fixes for X1000 SoCs from Zhou Yanjie. - Netgear R6200 v1 systems are now supported by the bcm47xx platform. - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems. -----BEGIN PGP SIGNATURE----- iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXYaqpRUccGF1bC5idXJ0 b25AbWlwcy5jb20ACgkQPqefrLV1AN2JUQD+PQGFIlq9bo/3vLyqsXJffm+DhwVQ 4WSCSeN5brPkO8EA/153sRJBlRtG+KK5p9f7WYKUuBfbcEawuc1uwmKuy7cG =lWlM -----END PGP SIGNATURE----- Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Paul Burton: "Main MIPS changes: - boot_mem_map is removed, providing a nice cleanup made possible by the recent removal of bootmem. - Some fixes to atomics, in general providing compiler barriers for smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs or MIPS32 systems using cmpxchg64(). - Conversion to the new generic VDSO infrastructure courtesy of Vincenzo Frascino. - Removal of undefined behavior in set_io_port_base(), fixing the behavior of some MIPS kernel configurations when built with recent clang versions. - Initial MIPS32 huge page support, functional on at least Ingenic SoCs. - pte_special() is now supported for some configurations, allowing among other things generic fast GUP to be used. - Miscellaneous fixes & cleanups. And platform specific changes: - Major improvements to Ingenic SoC support from Paul Cercueil, mostly enabled by the inclusion of the new TCU (timer-counter unit) drivers he's spent a very patient year or so working on. Plus some fixes for X1000 SoCs from Zhou Yanjie. - Netgear R6200 v1 systems are now supported by the bcm47xx platform. - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems" * tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (89 commits) MIPS: Detect bad _PFN_SHIFT values MIPS: Disable pte_special() for MIPS32 with RiXi MIPS: ralink: deactivate PCI support for SOC_MT7621 mips: compat: vdso: Use legacy syscalls as fallback MIPS: Drop Loongson _CACHE_* definitions MIPS: tlbex: Remove cpu_has_local_ebase MIPS: tlbex: Simplify r3k check MIPS: Select R3k-style TLB in Kconfig MIPS: PCI: refactor ioc3 special handling mips: remove ioremap_cachable mips/atomic: Fix smp_mb__{before,after}_atomic() mips/atomic: Fix loongson_llsc_mb() wreckage mips/atomic: Fix cmpxchg64 barriers MIPS: Octeon: remove duplicated include from dma-octeon.c firmware: bcm47xx_nvram: Allow COMPILE_TEST firmware: bcm47xx_nvram: Correct size_t printf format MIPS: Treat Loongson Extensions as ASEs MIPS: Remove dev_err() usage after platform_get_irq() MIPS: dts: mscc: describe the PTP ready interrupt MIPS: dts: mscc: describe the PTP register range ... |
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Linus Torvalds
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f97c81dc6c |
ARM: SoC: late updates for v5.4
This is some material that we picked up into our tree late or that had complex inter-depondencies. The fact that there are these interdependencies tends to meant that these are often actually the most interesting new additions: The new Aspeed AST2600 baseboard management controller is added, this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some dependencies on other device drivers. After many years, support for the MMP2 based OLPC XO-1.75 finally makes it into the kernel. The Armada 3720 based Turris Mox open source router platform is a late addition and it follows some preparatory work across multiple branches. The OMAP2+ platform had some large-scale cleanup involving driver changes and DT changes, here we finish it off, dropping a lot of the now-unused platform data. The TI K3 platform that got added for 5.3 gains a lot more support for individual bits on the SoC, this part just came late for the merge window. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJdf6P3AAoJEJpsee/mABjZMFUP/i/J9CNJjEec0cWCG1XgP/qh SpKFf2g9Y9QzqAzDDovo7atTGHTCG8C0fn8W+bkv9h7dWj2uxRtFISM9COomUoHa 0qXUL9bbDB3LAvstLV451p4c67XsJUazV9KZPD7VsCquucWbDDYaGPz+0reSRm6y imK2jXqD0leG0CNbgRXfh64J32TF3M0/XnwbsNJreCmQvwUvkYLL5VNi/qcnvfyp k0g1/5OzH9mLertoVKWqJ9o1919Yvxdl6/eyDmTPmX08bs03WnPbCEzRVO/zkOKZ O6RcAlsjiLblQdfbDJKfbaYDDaE53d2NwdCvBIdSPmDoYM5eYjQC4PmDM0+0dmHe bFd9giBjzU2Uab7ylgeoVl6pX1ISk6bwmZxNup45cy0xyw8wuky02Wq2bQTuZbgI UcBlOGWR4aH/OCpNafn+ovDBYGc64I7EQobG7UiilrVq/libx1Uo7yjlWSxe4j8n wFchiB8It24WUiS4JhJFrTklkaf5JW3K3czdDATW7aZKjv+fnHU5GMre/hvNP4z7 qROlP69/eqNXG25VOcwWPQE8yhP43+ZgyvoVwDh1H6VZdy9WxgYyEoiBAhFfcrng +RVAT4rzylPmKP8oygVF1fpTHTS8xHrYBbjkdRaj5KqmTDdqI/nMsYoq+E0R1ScV EsnyNVq7wnvH12zrOv+I =Qtkp -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC late updates from Arnd Bergmann: "This is some material that we picked up into our tree late or that had complex inter-depondencies. The fact that there are these interdependencies tends to meant that these are often actually the most interesting new additions: - The new Aspeed AST2600 baseboard management controller is added, this is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some dependencies on other device drivers. - After many years, support for the MMP2 based OLPC XO-1.75 finally makes it into the kernel. - The Armada 3720 based Turris Mox open source router platform is a late addition and it follows some preparatory work across multiple branches. - The OMAP2+ platform had some large-scale cleanup involving driver changes and DT changes, here we finish it off, dropping a lot of the now-unused platform data. - The TI K3 platform that got added for 5.3 gains a lot more support for individual bits on the SoC, this part just came late for the merge window" [ This pull request itself wasn't actually sent late at all by Arnd, but I waited on the branches that it used to be pulled first, so it ends up being merged much later than the other ARM SoC pull requests this merge window - Linus ] * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits) ARM: dts: dir685: Drop spi-cpol from the display ARM: dts: aspeed: Add AST2600 pinmux nodes ARM: dts: aspeed: Add AST2600 and EVB ARM: exynos: Enable support for ARM architected timers ARM: samsung: Fix system restart on S3C6410 ARM: dts: mmp2: add OLPC XO 1.75 machine ARM: dts: mmp2: rename the USB PHY node ARM: dts: mmp2: specify reg-shift for the UARTs ARM: dts: mmp2: add camera interfaces ARM: dts: mmp2: fix the SPI nodes ARM: dts: mmp2: trivial whitespace fix arm64: dts: marvell: add DTS for Turris Mox dt-bindings: marvell: document Turris Mox compatible arm64: dts: marvell: armada-37xx: add SPI CS1 pinctrl arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address arm64: dts: ti: k3-j721e-main: Add hwspinlock node arm64: dts: ti: k3-am65-main: Add hwspinlock node arm64: dts: k3-j721e: Add gpio-keys on common processor board dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E ... |
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Linus Torvalds
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a703d279c5 |
We have a small collection of core framework updates this time, mostly around
clk registration by clk providers and debugfs "nice to haves" for rate constraints. I'll highlight that we're now setting the clk_init_data pointer inside struct clk_hw to NULL during clk_register(), which may break some drivers that thought they could use that pointer during normal operations. That change has been sitting in next for a while now but maybe something is still broken. We'l see. Other than that the core framework changes aren't invasive and they're fixing bugs, simplifying, and making things better. On the clk driver side we got the usual addition of new SoC support, new features for existing drivers, and bug fixes scattered throughout. The biggest diffstat is the Amlogic driver that gained CPU clk support in addition to migrating to the new way of specifying clk parents. After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got support for various new SoCs and clock controllers from those vendors. Core: - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs - Set clk_init_data pointer inside clk_hw to NULL after registration - Make clk_bulk_get_all() return an 'id' corresponding to clock-names - Evict parents from parent cache when they're unregistered New Drivers: - Add clock driver for i.MX8MN SoCs - Support aspeed AST2600 SoCs - Support for Mediatek MT6779 SoCs - Support qcom SM8150 GCC and RPMh clks - Support qcom QCS404 WCSS clks - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) - Addition of clock driver for Rockchip rk3308 SoCs Updates: - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Add SDIO gate support to aspeed driver - Add missing of_node_put() calls in various clk drivers - Migrate Amlogic driver to new clock parent description method - Add DVFS support to Amlogic Meson g12 - Add Amlogic Meson g12a reset support to the axg audio clock controller - Add sm1 support to the Amlogic Meson g12a clock controller - Switch i.MX8MM clock driver to platform driver - Add Hifi4 DSP related clocks for i.MX8QXP SoC - Fix Audio PLL setting and parent clock for USB - Misc i.MX8 clock driver improvements and corrections - Set floor ops for Qualcomm SD clks so that rounding works - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1 - Enable the Allwinner V3 SoC and fix the i2s clock for H6 -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl2FQEMRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXHQw//XHnT5DPphpP8ua4x8wuJARdf0n58Vcdb 8fZxxs4QN7uuKhg6aMI4kgwBn+9tgIr65hvN0Gn9Wm5Bsbs3XZvdIo7DvQDrYg7W NE7192iy2Dg+m+C24YLO7ceZgqVepbjeN+6oeUK88Ui+H+XlOKfJvjfnJ+HxN9Ip sHnLakIxqlaWvzwTUOHOcsrHyQD2OXupbfNMxLnmr8T/kBh/nqwNEG3aYCppICsg LpJL9Bv2V3QSk8uBszTgKK5ybWo14aDQPx4rrhgsneD0h7DSnx6M3jvngxMra6W0 fnare4FQlkbPmgAj+XtB7RdCzsuwoke/7TJsvDLQrEbyOYTGnl7bYS8NOSrIg5Tp w4UPpXrMTQK7e/6okL1OJYAXXYurxep8QjsjpF3nahxC3IVzAZ9uio6ehJrDNEPC ErqOSPQTMkjOA2npovsQKCH3Mv/yGzAigpsQassPneWwp//NupMLKmmIm6645Xw2 6kqSlVFYz81lhzIylGEQKIoiLcszpB6qqWUzGVt0B94joRbvg0m//8BDaZbHeTqP m/acRYHRC1utpkAZEnBZRsd79cI+EeuARROUfGsoUMfOueTc4+qQ7Yrjbj4rTvnC lLM9Qz9h1QkfyRF1IHHPw/fS5twpNTUdO9c1+3qzS3AQfl5dZWpChoF9Um+ycVPR nQrpk05pHEY= =z8wK -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have a small collection of core framework updates this time, mostly around clk registration by clk providers and debugfs "nice to haves" for rate constraints. I'll highlight that we're now setting the clk_init_data pointer inside struct clk_hw to NULL during clk_register(), which may break some drivers that thought they could use that pointer during normal operations. That change has been sitting in next for a while now but maybe something is still broken. We'l see. Other than that the core framework changes aren't invasive and they're fixing bugs, simplifying, and making things better. On the clk driver side we got the usual addition of new SoC support, new features for existing drivers, and bug fixes scattered throughout. The biggest diffstat is the Amlogic driver that gained CPU clk support in addition to migrating to the new way of specifying clk parents. After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got support for various new SoCs and clock controllers from those vendors. Core: - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs - Set clk_init_data pointer inside clk_hw to NULL after registration - Make clk_bulk_get_all() return an 'id' corresponding to clock-names - Evict parents from parent cache when they're unregistered New Drivers: - Add clock driver for i.MX8MN SoCs - Support aspeed AST2600 SoCs - Support for Mediatek MT6779 SoCs - Support qcom SM8150 GCC and RPMh clks - Support qcom QCS404 WCSS clks - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) - Addition of clock driver for Rockchip rk3308 SoCs Updates: - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Add SDIO gate support to aspeed driver - Add missing of_node_put() calls in various clk drivers - Migrate Amlogic driver to new clock parent description method - Add DVFS support to Amlogic Meson g12 - Add Amlogic Meson g12a reset support to the axg audio clock controller - Add sm1 support to the Amlogic Meson g12a clock controller - Switch i.MX8MM clock driver to platform driver - Add Hifi4 DSP related clocks for i.MX8QXP SoC - Fix Audio PLL setting and parent clock for USB - Misc i.MX8 clock driver improvements and corrections - Set floor ops for Qualcomm SD clks so that rounding works - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1 - Enable the Allwinner V3 SoC and fix the i2s clock for H6" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: Drop !clk checks in debugfs dumping clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: mvebu: ap80x: add AP807 clock support clk: mvebu: ap806: Prepare the introduction of AP807 clock support clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver clk: mvebu: ap806: be more explicit on what SaR is clk: mvebu: ap80x-cpu: add AP807 CPU clock support clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock dt-bindings: ap806: Document AP807 clock compatible dt-bindings: ap80x: Document AP807 CPU clock compatible clk: sprd: add missing kfree clk: at91: allow 24 Mhz clock as input for PLL clk: Make clk_bulk_get_all() return a valid "id" clk: actions: Fix factor clk struct member access clk: qcom: rcg: Return failure for RCG update clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h ... |
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Stephen Boyd
|
b6c444de05 |
Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and 'clk-actions' into clk-next
- Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Evict parents from parent cache when they're unregistered * clk-cdce-regulator: clk: clk-cdce925: Add regulator support dt-bindings: clock: cdce925: Add regulator documentation * clk-bcm: clk: bcm2835: Mark PLLD_PER as CRITICAL clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support clk: bcm2835: Introduce SoC specific clock registration dt-bindings: bcm2835-cprman: Add bcm2711 support * clk-evict-parent-cache: clk: Evict unregistered clks from parent caches * clk-actions: clk: actions: Fix factor clk struct member access |
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Stephen Boyd
|
91bcbc11d6 |
Merge branches 'clk-renesas', 'clk-rockchip', 'clk-const' and 'clk-simplify' into clk-next
* clk-renesas: clk: renesas: cpg-mssr: Set GENPD_FLAG_ALWAYS_ON for clock domain clk: renesas: r9a06g032: Set GENPD_FLAG_ALWAYS_ON for clock domain clk: renesas: mstp: Set GENPD_FLAG_ALWAYS_ON for clock domain dt-bindings: clk: emev2: Rename bindings documentation file clk: renesas: rcar-usb2-clock-sel: Use devm_platform_ioremap_resource() helper * clk-rockchip: clk: rockchip: Add clock controller for the rk3308 clk: rockchip: Add dt-binding header for rk3308 dt-bindings: Add bindings for rk3308 clock controller clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driver * clk-const: clk: spear: Make structure i2s_sclk_masks constant * clk-simplify: clk/ti: Use kmemdup rather than duplicating its implementation clk: fix devm_platform_ioremap_resource.cocci warnings |
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Stephen Boyd
|
a1ff1ce300 |
Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' into clk-next
- Set clk_init_data pointer inside clk_hw to NULL after registration * clk-init-destroy: clk: Overwrite clk_hw::init with NULL during clk_register() clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered clk: ti: Don't reference clk_init_data after registration clk: qcom: Remove error prints from DFS registration rtc: sun6i: Don't reference clk_init_data after registration clk: zx296718: Don't reference clk_init_data after registration clk: milbeaut: Don't reference clk_init_data after registration clk: socfpga: deindent code to proper indentation phy: ti: am654-serdes: Don't reference clk_init_data after registration clk: sprd: Don't reference clk_init_data after registration clk: socfpga: Don't reference clk_init_data after registration clk: sirf: Don't reference clk_init_data after registration clk: qcom: Don't reference clk_init_data after registration clk: meson: axg-audio: Don't reference clk_init_data after registration clk: lochnagar: Don't reference clk_init_data after registration clk: actions: Don't reference clk_init_data after registration * clk-doc: clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h clk: Document of_parse_clkspec() some more clk: Remove extraneous 'for' word in comments * clk-imx: (32 commits) clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: imx: imx8mn: fix audio pll setting clk: imx8mn: Add necessary frequency support for ARM PLL table clk: imx8mn: Add missing rate_count assignment for each PLL structure clk: imx8mn: fix int pll clk gate clk: imx8mn: Add GIC clock clk: imx8mn: Fix incorrect parents clk: imx8mm: Fix incorrect parents clk: imx8mq: Fix sys3 pll references clk: imx8mq: Unregister clks when of_clk_add_provider failed clk: imx8mm: Unregister clks when of_clk_add_provider failed clk: imx8mq: Mark AHB clock as critical clk: imx8mn: Keep uart clocks on for early console clk: imx: Remove unused function statement clk: imx7ulp: Make sure earlycon's clock is enabled clk: imx8mm: Switch to platform driver clk: imx: imx8mm: fix audio pll setting ... * clk-allwinner: clk: sunxi-ng: h6: Allow I2S to change parent rate clk: sunxi-ng: v3s: add Allwinner V3 support clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU clk: sunxi-ng: v3s: add the missing PLL_DDR1 |
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Stephen Boyd
|
f5c7305db3 |
Merge branches 'clk-qcom', 'clk-mtk', 'clk-armada', 'clk-ingenic' and 'clk-meson' into clk-next
- Support qcom SM8150 RPMh clks - Set floor ops for qcom sd clks - Support qcom QCS404 WCSS clks - Support for Mediatek MT6779 SoCs - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) * clk-qcom: clk: qcom: rcg: Return failure for RCG update clk: qcom: fix QCS404 TuringCC regmap clk: qcom: clk-rpmh: Add support for SM8150 dt-bindings: clock: Document SM8150 rpmh-clock compatible clk: qcom: clk-rpmh: Convert to parent data scheme dt-bindings: clock: Document the parent clocks clk: qcom: gcc: Use floor ops for SDCC clocks clk: qcom: gcc-qcs404: Use floor ops for sdcc clks clk: qcom: gcc-sdm845: Use floor ops for sdcc clks clk: qcom: define probe by index API as common API clk: qcom: Add WCSS gcc clock control for QCS404 clk: qcom: msm8916: Don't build by default clk: qcom: gcc: Add global clock controller driver for SM8150 dt-bindings: clock: Document gcc bindings for SM8150 clk: qcom: clk-alpha-pll: Add support for Trion PLLs clk: qcom: clk-alpha-pll: Remove post_div_table checks clk: qcom: clk-alpha-pll: Remove unnecessary cast * clk-mtk: clk: mediatek: Runtime PM support for MT8183 mcucfg clock provider clk: mediatek: Register clock gate with device clk: mediatek: add pericfg clocks for MT8183 dt-bindings: clock: mediatek: add pericfg for MT8183 clk: mediatek: Add MT6779 clock support clk: mediatek: Add dt-bindings for MT6779 clocks dt-bindings: mediatek: bindings for MT6779 clk clk: reset: Modify reset-controller driver * clk-armada: clk: mvebu: ap80x: add AP807 clock support clk: mvebu: ap806: Prepare the introduction of AP807 clock support clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver clk: mvebu: ap806: be more explicit on what SaR is clk: mvebu: ap80x-cpu: add AP807 CPU clock support clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock dt-bindings: ap806: Document AP807 clock compatible dt-bindings: ap80x: Document AP807 CPU clock compatible clk: mvebu: ap806: Fix clock name for the cluster clk: mvebu: add CPU clock driver for Armada 7K/8K clk: mvebu: add helper file for Armada AP and CP clocks dt-bindings: ap806: add the cluster clock node in the syscon file * clk-ingenic: clk: ingenic: Use CLK_OF_DECLARE_DRIVER macro clk: ingenic/jz4740: Fix "pll half" divider not read/written properly * clk-meson: (23 commits) clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock clk: meson: g12a: add support for SM1 GP1 PLL dt-bindings: clk: meson: add sm1 periph clock controller bindings clk: meson: axg-audio: add g12a reset support dt-bindings: clock: meson: add resets to the audio clock controller clk: meson: g12a: expose CPUB clock ID for G12B clk: meson: g12a: add notifiers to handle cpu clock change clk: meson: add g12a cpu dynamic divider driver clk: core: introduce clk_hw_set_parent() clk: meson: remove clk input helper clk: meson: remove ee input bypass clocks clk: meson: clk-regmap: migrate to new parent description method clk: meson: meson8b: migrate to the new parent description method clk: meson: axg: migrate to the new parent description method clk: meson: gxbb: migrate to the new parent description method clk: meson: g12a: migrate to the new parent description method clk: meson: remove ao input bypass clocks clk: meson: axg-aoclk: migrate to the new parent description method clk: meson: gxbb-aoclk: migrate to the new parent description method ... |
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Linus Torvalds
|
b682242f60 |
- qcom : enable support for ipq8074, sm1850 and sm7180.
add child device node for qcs404. misc fixes. - mediatek : enable support for mt8183. misc rejig of cmdq driver. new client-reg dt property. - armada: use device-managed registration api -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAl2CUw8ACgkQf9lkf8eY P5XWdQ/+JMGoG8nbTkFdvgnRXvxdtZLylOTotnEpYtIOQ6qAckkOc0rGih3qXXRq 5FUCynImnx0Pqjso8ny8xSqfGy2B1f87tg+GD2r38XjLPo+5gJMkd5aCZ4JtEKZQ ms+23pPXCLhh6bej6WW3fmuwk8T3USWfGGhRFQOHN9e152dThXt3vvLo40vy/GD5 xT2qChONXmyPrG1F3qJhGcHuiubBzZ2mxfEC294PyVwWKdaJ5StlBmSQpomJsJP3 v04SNI8P/gMtNhFfIVks9Hj1eu2PlO7p+4DpyhBDQii5Dzv+bSnJHIJch6DOYdou h1aezWGHdJ5IcJTZcKVq0a8wyCoOGFU6znQQKRDtIdpgoDfGVmIe2bheFB4ePXOQ XI9gsNGBrgS4uA5lJKJyJrAokXpTCiwA69c7UULRPKa0jbmVwbrJxxbLYL4k5euC Qi6r3qPxvJ+3kYzegqtzHRYx9s+3Bt0CkHG8hv/XtETzM2Jg7TXy9yEF6d53jFAx f0eU7PWdfM8TbQYGQ67BRYtSITaL8TgVafby5S1T9jLA5QnCAf4/TMCtJjxvCOVp hMBm9JCnQ2U9c8geGkcU51Oz78sdTByE+q0Rzw6C9jFQxECRiSC/a7tvI7Pkui4y w9UpCJNfypGHi+WT/UuCePi2JlnPRVCquKR2TEb8BZQKTEV4owk= =V6QY -----END PGP SIGNATURE----- Merge tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - qcom: - enable support for ipq8074, sm1850 and sm7180 - add child device node for qcs404 - misc fixes - mediatek: - enable support for mt8183 - misc rejig of cmdq driver - new client-reg dt property - armada: - use device-managed registration api * tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox: qcom-apcs: fix max_register value mailbox: qcom: Add support for IPQ8074 APCS dt-bindings: mailbox: qom: Add ipq8074 APPS compatible mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCs dt-bindings: mailbox: Add APSS shared for SM8150 and SC7180 SoCs mbox: qcom: replace integer with valid macro mbox: qcom: add APCS child device for QCS404 mailbox: mediatek: cmdq: clear the event in cmdq initial flow mailbox: mediatek: cmdq: support mt8183 gce function mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data dt-binding: gce: add binding for gce client reg property dt-binding: gce: add gce header file for mt8183 dt-binding: gce: remove thread-num property mailbox: armada-37xx-rwtm: Use device-managed registration API |
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Linus Torvalds
|
e3a008ac12 |
Devicetree updates for v5.4:
- A bunch of DT binding conversions to DT schema format - Clean-ups of the Arm idle-states binding - Support a default number of cells in of_for_each_phandle() when the cells name is missing - Expose dtbs_check and dt_binding_check in the make help - Convert writting-schema.md to ReST - HiSilicon reset controller binding updates - Add documentation for MT8516 RNG -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAl2Dj38QHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhw4qcEACE16/eR0h9FSnhN0QpyFlGrfUTy86K5Z4N IoJsGind4G7+TrNA6GGZwQkNRt3roWdrkqnLLvcted+8IVaXOFm0n12w2u0yoYvk C4pqxH2HRUC9U9eBjyDxdiplH9yYZPuy8bFwLPSQk0bkCd6D3I8iDe6qHm1arin3 sYIQ03jbZKowHixOuMNvu9rBiun79Lm5FfGUSi7EYab3KZ4Zt9HX1IiySRYVOWZT z6bjWbVfFe7HgbImwaB+WUYumUyNu5dh4AyqIidb9o6BB6ZENfnBNWPi0VDFuSGT 4wVc8XrcU3d7bt6Sstt+g3WZjn+JBMLNBkNnMjZ+nlp3OoR5F6Tf1RO6mrZtsENa sAspr18zNQK7CNBy0uKzBT32Z0oN1wXnsKRS5P1o5/8aEjRr0m8stxes3hOQhtuJ Y6rKLN9kGrQIeSY7nagWuGFaJ1uunGXCSgam+kb6YI8nDa3DUbzeIhYMIcqgz/Sx Gx2txPzKMHXgzF7Zc+5db9X3E7pg8Y1zrhk7o2oKiFVWrnwlEJivMcRHq9n3anOr RGAJPjrRfzwZNIQgYNflYHAdxVLyKKhpxEQDdo/5PXeMRYtghOH+rIxwoS31FHSs u/4nf0uHFQfkmSg7nSKicfSWt5ORR5G/H9cc83SRoix35kfPubirkawJ/tkcVuO4 3n0NeGERtA== =ZO6c -----END PGP SIGNATURE----- Merge tag 'devicetree-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree updates from Rob Herring: - a bunch of DT binding conversions to DT schema format - clean-ups of the Arm idle-states binding - support a default number of cells in of_for_each_phandle() when the cells name is missing - expose dtbs_check and dt_binding_check in the make help - convert writting-schema.md to ReST - HiSilicon reset controller binding updates - add documentation for MT8516 RNG * tag 'devicetree-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits) of: restore old handling of cells_name=NULL in of_*_phandle_with_args() bus: qcom: fix spelling mistake "ambigous" -> "ambiguous" of: Let of_for_each_phandle fallback to non-negative cell_count iommu: pass cell_count = -1 to of_for_each_phandle with cells_name dt-bindings: arm: Convert Realtek board/soc bindings to json-schema dt-bindings: arm: Convert Actions Semi bindings to jsonschema dt-bindings: Correct spelling in example schema dt-bindings: cpu: Add a support cpu type for cortex-a55 dt-bindings: gpu: mali-midgard: Add samsung exynos5250 compatible dt-bindings: arm: idle-states: Move exit-latency-us explanation dt-bindings: arm: idle-states: Add punctuation to improve readability dt-bindings: arm: idle-states: Correct "constraint guarantees" dt-bindings: arm: idle-states: Correct references to wake-up delay dt-bindings: arm: idle-states: Use "e.g." and "i.e." consistently pinctrl-mcp23s08: Fix property-name in dt-example dt-bindings: Clarify interrupts-extended usage dt-bindings: Convert Arm Mali Utgard GPU to DT schema dt-bindings: Convert Arm Mali Bifrost GPU to DT schema dt-bindings: Convert Arm Mali Midgard GPU to DT schema dt-bindings: irq: Convert Allwinner NMI Controller to a schema ... |
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Linus Torvalds
|
6cfae0c26b |
Char/Misc driver patches for 5.4-rc1
Here is the big char/misc driver pull request for 5.4-rc1. As has been happening in previous releases, more and more individual driver subsystem trees are ending up in here. Now if that is good or bad I can't tell, but hopefully it makes your life easier as it's more of an aggregation of trees together to one merge point for you. Anyway, lots of stuff in here: - habanalabs driver updates - thunderbolt driver updates - misc driver updates - coresight and intel_th hwtracing driver updates - fpga driver updates - extcon driver updates - some dma driver updates - char driver updates - android binder driver updates - nvmem driver updates - phy driver updates - parport driver fixes - pcmcia driver fix - uio driver updates - w1 driver updates - configfs fixes - other assorted driver updates All of these have been in linux-next for a long time with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXYIT1g8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ym9lwCgrHZlMMvfYNVm6GQ5ge58JJsVTL4AoNatTcL4 hfVMA6pCHWBjV65xVSf6 =Tijw -----END PGP SIGNATURE----- Merge tag 'char-misc-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver pull request for 5.4-rc1. As has been happening in previous releases, more and more individual driver subsystem trees are ending up in here. Now if that is good or bad I can't tell, but hopefully it makes your life easier as it's more of an aggregation of trees together to one merge point for you. Anyway, lots of stuff in here: - habanalabs driver updates - thunderbolt driver updates - misc driver updates - coresight and intel_th hwtracing driver updates - fpga driver updates - extcon driver updates - some dma driver updates - char driver updates - android binder driver updates - nvmem driver updates - phy driver updates - parport driver fixes - pcmcia driver fix - uio driver updates - w1 driver updates - configfs fixes - other assorted driver updates All of these have been in linux-next for a long time with no reported issues" * tag 'char-misc-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (200 commits) misc: mic: Use PTR_ERR_OR_ZERO rather than its implementation habanalabs: correctly cast variable to __le32 habanalabs: show correct id in error print habanalabs: stop using the acronym KMD habanalabs: display card name as sensors header habanalabs: add uapi to retrieve aggregate H/W events habanalabs: add uapi to retrieve device utilization habanalabs: Make the Coresight timestamp perpetual habanalabs: explicitly set the queue-id enumerated numbers habanalabs: print to kernel log when reset is finished habanalabs: replace __le32_to_cpu with le32_to_cpu habanalabs: replace __cpu_to_le32/64 with cpu_to_le32/64 habanalabs: Handle HW_IP_INFO if device disabled or in reset habanalabs: Expose devices after initialization is done habanalabs: improve security in Debug IOCTL habanalabs: use default structure for user input in Debug IOCTL habanalabs: Add descriptive name to PSOC app status register habanalabs: Add descriptive names to PSOC scratch-pad registers habanalabs: create two char devices per ASIC habanalabs: change device_setup_cdev() to be more generic ... |
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Linus Torvalds
|
4feaab05dc |
LED updates for 5.4-rc1
-----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQUwxxKyE5l/npt8ARiEGxRG/Sl2wUCXYAIeQAKCRBiEGxRG/Sl 2/SzAQDEnoNxzV/R5kWFd+2kmFeY3cll0d99KMrWJ8om+kje6QD/cXxZHzFm+T1L UPF66k76oOODV7cyndjXnTnRXbeCRAM= =Szby -----END PGP SIGNATURE----- Merge tag 'leds-for-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds Pull LED updates from Jacek Anaszewski: "In this cycle we've finally managed to contribute the patch set sorting out LED naming issues. Besides that there are many changes scattered among various LED class drivers and triggers. LED naming related improvements: - add new 'function' and 'color' fwnode properties and deprecate 'label' property which has been frequently abused for conveying vendor specific names that have been available in sysfs anyway - introduce a set of standard LED_FUNCTION* definitions - introduce a set of standard LED_COLOR_ID* definitions - add a new {devm_}led_classdev_register_ext() API with the capability of automatic LED name composition basing on the properties available in the passed fwnode; the function is backwards compatible in a sense that it uses 'label' data, if present in the fwnode, for creating LED name - add tools/leds/get_led_device_info.sh script for retrieving LED vendor, product and bus names, if applicable; it also performs basic validation of an LED name - update following drivers and their DT bindings to use the new LED registration API: - leds-an30259a, leds-gpio, leds-as3645a, leds-aat1290, leds-cr0014114, leds-lm3601x, leds-lm3692x, leds-lp8860, leds-lt3593, leds-sc27xx-blt Other LED class improvements: - replace {devm_}led_classdev_register() macros with inlines - allow to call led_classdev_unregister() unconditionally - switch to use fwnode instead of be stuck with OF one LED triggers improvements: - led-triggers: - fix dereferencing of null pointer - fix a memory leak bug - ledtrig-gpio: - GPIO 0 is valid Drop superseeded apu2/3 support from leds-apu since for apu2+ a newer, more complete driver exists, based on a generic driver for the AMD SOCs gpio-controller, supporting LEDs as well other devices: - drop profile field from priv data - drop iosize field from priv data - drop enum_apu_led_platform_types - drop superseeded apu2/3 led support - add pr_fmt prefix for better log output - fix error message on probing failure Other misc fixes and improvements to existing LED class drivers: - leds-ns2, leds-max77650: - add of_node_put() before return - leds-pwm, leds-is31fl32xx: - use struct_size() helper - leds-lm3697, leds-lm36274, leds-lm3532: - switch to use fwnode_property_count_uXX() - leds-lm3532: - fix brightness control for i2c mode - change the define for the fs current register - fixes for the driver for stability - add full scale current configuration - dt: Add property for full scale current. - avoid potentially unpaired regulator calls - move static keyword to the front of declarations - fix optional led-max-microamp prop error handling - leds-max77650: - add of_node_put() before return - add MODULE_ALIAS() - Switch to fwnode property API - leds-as3645a: - fix misuse of strlcpy - leds-netxbig: - add of_node_put() in netxbig_leds_get_of_pdata() - remove legacy board-file support - leds-is31fl319x: - simplify getting the adapter of a client - leds-ti-lmu-common: - fix coccinelle issue - move static keyword to the front of declaration - leds-syscon: - use resource managed variant of device register - leds-ktd2692: - fix a typo in the name of a constant - leds-lp5562: - allow firmware files up to the maximum length - leds-an30259a: - fix typo - leds-pca953x: - include the right header" * tag 'leds-for-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds: (72 commits) leds: lm3532: Fix optional led-max-microamp prop error handling led: triggers: Fix dereferencing of null pointer leds: ti-lmu-common: Move static keyword to the front of declaration leds: lm3532: Move static keyword to the front of declarations leds: trigger: gpio: GPIO 0 is valid leds: pwm: Use struct_size() helper leds: is31fl32xx: Use struct_size() helper leds: ti-lmu-common: Fix coccinelle issue in TI LMU leds: lm3532: Avoid potentially unpaired regulator calls leds: syscon: Use resource managed variant of device register leds: Replace {devm_}led_classdev_register() macros with inlines leds: Allow to call led_classdev_unregister() unconditionally leds: lm3532: Add full scale current configuration dt: lm3532: Add property for full scale current. leds: lm3532: Fixes for the driver for stability leds: lm3532: Change the define for the fs current register leds: lm3532: Fix brightness control for i2c mode leds: Switch to use fwnode instead of be stuck with OF one leds: max77650: Switch to fwnode property API led: triggers: Fix a memory leak bug ... |
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Chunfeng Yun
|
f9e55ac22c |
clk: mediatek: add pericfg clocks for MT8183
Add pericfg clocks for MT8183, it's used when support USB remote wakeup Cc: Weiyi Lu <weiyi.lu@mediatek.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lkml.kernel.org/r/1566980533-28282-2-git-send-email-chunfeng.yun@mediatek.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Stefan Wahren
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80766f8726 |
dt-bindings: bcm2835-cprman: Add bcm2711 support
The new BCM2711 supports an additional clock for the emmc2 block. So we need an additional compatible. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net> |
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Bibby Hsieh
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8fedf805fa |
dt-binding: gce: add gce header file for mt8183
Add documentation for the mt8183 gce. Add gce header file defined the gce hardware event, subsys number and constant for mt8183. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> |
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Linus Torvalds
|
cef7298262 |
ARM: DT updates for v5.4
This is another huge branch with close to 450 changessets related to devicetree files, roughly half of this for 32-bit and 64-bit respectively. There are lots of cleanups and additional hardware support for platforms we already support based on SoCs from Renesas, ST-Microelectronics, Intel/Altera, Rockchips, Allwinner, Broadcom and other manufacturers. A total of 6 new SoCs and 37 new boards gets added this time, one more SoC will come in a follow-up branch. Most of the new boards are for 64-bit ARM SoCs, the others are typically for the 32-bit Cortex-A7. Going more into details for SoC platforms with new hardware support: The Snapdragon 855 (SM8150) is Qualcomm's current high-end phone platform, usually paired with an external 5G modem. So far we only support the Qualcomm SM8150 MTP reference platform, but no actual products. For the slightly older Qualcomm platforms, support for several interesting products is getting added: Three laptops based on Snapdragon 835/MSM8998 (Asus NovaGo, HP Envy X2 and Lenovo Miix 630), one laptop based on Snapdragon 850/sdm850 (Lenovo Yoga C630) and several phones based on the older Snapdragon 410/MSM8916 (Samsung A3 and A5, Longcheer L8150 aka Android One 2nd gen "seed" aka Wileyfox Swift). Mediatek MT7629 is a new wireless network router chip, similar to the older MT7623. It gets added together with the reference board implementation. Allwinner V3 is a repackaged version of the existing low-end V3s chip, and is used in the tiny Lichee Pi Zero plus, also added here. There is also a new TV set-top box based on Allwinner H6, the Tanix TX6, and the eMMC variant of the Olimex A64-Olinuxino development board. NXP i.MX8M Nano is a new member of the ever-expanding i.MX SoC family, similar to the i.MX8M Mini. As usual, there is a large number of new boards for i.MX SoCs: Einfochips i.MX8QXP AI_ML, SolidRun Hummingboard Pulse baseboard and System-on-Module, Boundary Devices i.MX8MQ Nitrogen8M, and TechNexion PICO-PI-IMX8M-DEV for the 64-bit i.MX8 line. For 32-bit, we get the Kontron i.MX6UL N6310 SoM with two baseboards, the PHYTEC phyBOARD-Segin SoM with three baseboards, and the Zodiac Inflight Innovations i.MX7 RMU2 board. In a different NXP product line, the Layerscape LS1046A "Freeway" reference board gets added. Amlogic SM1 (S905X3) and G12B (S922X, A311D) are updated chips from their set-top-box line and smart speaker with newer CPU and GPU cores compared to their predecessors. Both are now also supported by the Khadas VIM3 development board series, and the dts files for that get reorganized a bit to better deal with all variants. Another board based on SM1 that gets added is the SEI Robotics SEI610. There are a handful of new x86 and Power9 server boards using Aspeed BMC chips that are gaining support for running Linux on the BMC through the OpenBMC project: Facebook Minipack/Wedge100/Wedge40, Lenovo Hr855xg2, and Mihawk. Notably these are still new machines using SoCs based on the ARM9 and ARM11 CPU cores, as support for the new Cortex-A7 based AST2600 is still ramping up. There are three new end-user products using 32-bit Rockchips SoCs: Mecer Xtreme Mini S6 is an Android "mini PC" box based on the low-end RK3229 chip, while the two AOpen products Chromebox Mini (Fievel) and Chromebase Mini (Tiger) run ChromeOS and are meant for commercial settings (digital signage, PoS, ...). One more single-board computer based on the popular 64-bit RK3399 is added: the Leez RK3399 P710. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJdf6StAAoJEJpsee/mABjZDfEP/3h0GusRkoQ6PJ5FHsj4nIR6 NJK8RxmX4B4ctXxBc+Rbt8bHp1d/IdHL4Jcqe7xgR2OIVQPloJz1lFrLaF0wn4Mu G1EP2DzcLym3K0lBwhByvXfU1s2lhaTYdT594J8kTEVgcPXe79LKqH42A1T+1IlC 7+xAh9sU++NLo64w+Iam3d3T72ugyeO7THWiie7Rb9wACS94i7cZwvasur35aHxf Ut5nOQYPbTuVVvN1FfZAdrHJpK9r7pbJLVwHLMdHnUYup2XDmoC6iuDrKlsWxqjs SBL0u+dO5pkdKQp17RZFQZwrx2Y97E9KLWaT9Cqb7nwJ+ftYf419TUioQvmyJRZd DEsCz6GVCCOs2zFcGj+9iGRr5wA2O3I42dOZkkkTciztksFwSmomrSlwAgVBT2ms In6K3g2DrN31aDGFW9dZnxBXHVHWXkqr/TN4UIO2h0jfR4bazAvPzBiDpJdkz1NY KPpDrdTRA2k4UnSimot/7Pw8y2NtsTDVJeQS1KydSe44PiLLumO8hg+FfnhJoW5s oaSjX89549JvUIrA7TbXPxpyGS8oo7a1XkQyzfWZs8l7JMWoR5oK/VdiuDBL7YDE XFlcZmCmB+kUgtSgXjw9FflkoMn06usVZBo1rnWFApYmzZ3htnniNSgz/zjMJpXn OtQTQnP2LzS+ioxqB2Se =Bm5T -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM DT updates from Arnd Bergmann: "This is another huge branch with close to 450 changessets related to devicetree files, roughly half of this for 32-bit and 64-bit respectively. There are lots of cleanups and additional hardware support for platforms we already support based on SoCs from Renesas, ST-Microelectronics, Intel/Altera, Rockchips, Allwinner, Broadcom and other manufacturers. A total of 6 new SoCs and 37 new boards gets added this time, one more SoC will come in a follow-up branch. Most of the new boards are for 64-bit ARM SoCs, the others are typically for the 32-bit Cortex-A7. Going more into details for SoC platforms with new hardware support: - The Snapdragon 855 (SM8150) is Qualcomm's current high-end phone platform, usually paired with an external 5G modem. So far we only support the Qualcomm SM8150 MTP reference platform, but no actual products. - For the slightly older Qualcomm platforms, support for several interesting products is getting added: Three laptops based on Snapdragon 835/MSM8998 (Asus NovaGo, HP Envy X2 and Lenovo Miix 630), one laptop based on Snapdragon 850/sdm850 (Lenovo Yoga C630) and several phones based on the older Snapdragon 410/MSM8916 (Samsung A3 and A5, Longcheer L8150 aka Android One 2nd gen "seed" aka Wileyfox Swift). - Mediatek MT7629 is a new wireless network router chip, similar to the older MT7623. It gets added together with the reference board implementation. - Allwinner V3 is a repackaged version of the existing low-end V3s chip, and is used in the tiny Lichee Pi Zero plus, also added here. There is also a new TV set-top box based on Allwinner H6, the Tanix TX6, and the eMMC variant of the Olimex A64-Olinuxino development board. - NXP i.MX8M Nano is a new member of the ever-expanding i.MX SoC family, similar to the i.MX8M Mini. As usual, there is a large number of new boards for i.MX SoCs: Einfochips i.MX8QXP AI_ML, SolidRun Hummingboard Pulse baseboard and System-on-Module, Boundary Devices i.MX8MQ Nitrogen8M, and TechNexion PICO-PI-IMX8M-DEV for the 64-bit i.MX8 line. For 32-bit, we get the Kontron i.MX6UL N6310 SoM with two baseboards, the PHYTEC phyBOARD-Segin SoM with three baseboards, and the Zodiac Inflight Innovations i.MX7 RMU2 board. - In a different NXP product line, the Layerscape LS1046A "Freeway" reference board gets added. - Amlogic SM1 (S905X3) and G12B (S922X, A311D) are updated chips from their set-top-box line and smart speaker with newer CPU and GPU cores compared to their predecessors. Both are now also supported by the Khadas VIM3 development board series, and the dts files for that get reorganized a bit to better deal with all variants. Another board based on SM1 that gets added is the SEI Robotics SEI610. - There are a handful of new x86 and Power9 server boards using Aspeed BMC chips that are gaining support for running Linux on the BMC through the OpenBMC project: Facebook Minipack/Wedge100/Wedge40, Lenovo Hr855xg2, and Mihawk. Notably these are still new machines using SoCs based on the ARM9 and ARM11 CPU cores, as support for the new Cortex-A7 based AST2600 is still ramping up. - There are three new end-user products using 32-bit Rockchips SoCs: Mecer Xtreme Mini S6 is an Android "mini PC" box based on the low-end RK3229 chip, while the two AOpen products Chromebox Mini (Fievel) and Chromebase Mini (Tiger) run ChromeOS and are meant for commercial settings(digital signage, PoS, ...). - One more single-board computer based on the popular 64-bit RK3399 is added: the Leez RK3399 P710" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (467 commits) arm64: dts: qcom: Add Lenovo Yoga C630 ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit ARM; dts: aspeed: mihawk: File should not be executable ARM: dts: aspeed: swift: Change power supplies to version 2 ARM: dts: aspeed: vesnin: Add secondary SPI flash chip ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option ARM: dts: aspeed-g4: Add all flash chips ARM: dts: exynos: Enable GPU/Mali T604 on Arndale board ARM: dts: exynos: Enable GPU/Mali T604 on Chromebook Snow ARM: dts: exynos: Add GPU/Mali T604 node to Exynos5250 ARM: dts: exynos: Fix min/max buck4 for GPU on Arndale board ARM: dts: exynos: Mark LDO10 as always-on on Peach Pit/Pi Chromebooks ARM: dts: exynos: Remove not accurate secondary ADC compatible arm64: dts: rockchip: limit clock rate of MMC controllers for RK3328 arm64: dts: meson-sm1-sei610: add stdout-path property back arm64: dts: meson-sm1-sei610: enable DVFS arm64: dts: khadas-vim3: add support for the SM1 based VIM3L dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi arm64: dts: meson: g12a: add reset to tdm formatters ... |
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Linus Torvalds
|
399eb9b6cb |
ARM: SoC driver updates for v5.4
The branch contains driver changes that are tightly connected to SoC specific code. Aside from smaller cleanups and bug fixes, here is a list of the notable changes. New device drivers: - The Turris Mox router has a new "moxtet" bus driver for its on-board pluggable extension bus. The same platform also gains a firmware driver. - The Samsung Exynos family gains a new Chipid driver exporting using the soc device sysfs interface - A similar socinfo driver for Qualcomm Snapdragon chips. - A firmware driver for the NXP i.MX DSP IPC protocol using shared memory and a mailbox Other changes: - The i.MX reset controller driver now supports the NXP i.MX8MM chip - Amlogic SoC specific drivers gain support for the S905X3 and A311D chips - A rework of the TI Davinci framebuffer driver to allow important cleanups in the platform code - A couple of device drivers for removed ARM SoC platforms are removed. Most of the removals were picked up by other maintainers, this contains whatever was left. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJdf6SUAAoJEJpsee/mABjZAfwP/01bXBOlGVusNH2zuh8IUSHb //5sTdWpwa2ugRekLOJUOjo2p9Fu70yH6xr4RUHI0rcRjZA0xR3bZPx45gI8LRHQ tfb25LaKqfgZjWMCJ8due1Lh7B6ffOQukryMtM/LoiCtqsy7b6aThEKaLpM9/Owl t53o4wKaVQJK5He9JQom9NOZidkl7tYLHmDQTOXhX2UEA/i45vtfjdsEBvoFPbTx +bYvlqs+SWlpDJk29j+oBOeKadPF+TFboLDiUCxH44MC3OsH51zjtKVBRTtbNMkb ek/ci5x9hCeHcYSEigNq2EMzEln09Yxyvjk8U/jLiJ1h1kz3p5MjqJbVMF1rYXpe ALuAwinM8Zv2o5/UOCkiQTWq79PtpOKHZKpNBXkaJ8kyqBLMSy8Fs3hCvXrDnjnQ TC8jX7UBqHRV2rbQIYehAQAxTvcRgTbqusQGLkUJInlux6go57LoMYHPABpHftJV kRdVeT0KzdCz1pvQwyekIog5hPLNTBi4jw6eQcOgeENvAea1MJa8lMMfKcVbIdS0 ZVvxLl+K6noEKAv5lSeHAzjXq+cQFr3zDCsWy351mJETDHmE8zjsaHN1SgbRYLEk ZqzNwUYaPYBis38g85qaY/TSsJrWJ+jP8u7s9HTw3Oywg8SRy5vtW177s00/9VOd PYZ2UpqUeX8cdvggqUUU =lxFi -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "This contains driver changes that are tightly connected to SoC specific code. Aside from smaller cleanups and bug fixes, here is a list of the notable changes. New device drivers: - The Turris Mox router has a new "moxtet" bus driver for its on-board pluggable extension bus. The same platform also gains a firmware driver. - The Samsung Exynos family gains a new Chipid driver exporting using the soc device sysfs interface - A similar socinfo driver for Qualcomm Snapdragon chips. - A firmware driver for the NXP i.MX DSP IPC protocol using shared memory and a mailbox Other changes: - The i.MX reset controller driver now supports the NXP i.MX8MM chip - Amlogic SoC specific drivers gain support for the S905X3 and A311D chips - A rework of the TI Davinci framebuffer driver to allow important cleanups in the platform code - A couple of device drivers for removed ARM SoC platforms are removed. Most of the removals were picked up by other maintainers, this contains whatever was left" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits) bus: uniphier-system-bus: use devm_platform_ioremap_resource() soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access firmware: ti_sci: Allow for device shared and exclusive requests bus: imx-weim: remove incorrect __init annotations fbdev: remove w90x900/nuc900 platform drivers spi: remove w90x900 driver net: remove w90p910-ether driver net: remove ks8695 driver firmware: turris-mox-rwtm: Add sysfs documentation firmware: Add Turris Mox rWTM firmware driver dt-bindings: firmware: Document cznic,turris-mox-rwtm binding bus: moxtet: fix unsigned comparison to less than zero bus: moxtet: remove set but not used variable 'dummy' ARM: scoop: Use the right include dt-bindings: power: add Amlogic Everything-Else power domains bindings soc: amlogic: Add support for Everything-Else power domains controller fbdev: da8xx: use resource management for dma fbdev: da8xx-fb: drop a redundant if fbdev: da8xx-fb: use devm_platform_ioremap_resource() ... |
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Linus Torvalds
|
52a5525214 |
IOMMU Updates for Linux v5.4:
Including: - Batched unmap support for the IOMMU-API - Support for unlocked command queueing in the ARM-SMMU driver - Rework the ATS support in the ARM-SMMU driver - More refactoring in the ARM-SMMU driver to support hardware implemention specific quirks and errata - Bounce buffering DMA-API implementatation in the Intel VT-d driver for untrusted devices (like Thunderbolt devices) - Fixes for runtime PM support in the OMAP iommu driver - MT8183 IOMMU support in the Mediatek IOMMU driver - Rework of the way the IOMMU core sets the default domain type for groups. Changing the default domain type on x86 does not require two kernel parameters anymore. - More smaller fixes and cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAl1/pdoACgkQK/BELZcB GuMvCw/+K1GPyyZbPWAuXcnclraSZTHXS1lV0yilBXXyT2omFRQpRJYZGN/8NTbE SqD2FtzTKGuGSy2jA0drd3RcMKK/zZsFYnJShiM3FHLXatZdaFrnkK7vRHuzKlHf dvOlH7gHKtjIPPXodUEb0xd/oRAEIVsKjJyq1fBMARPPAluhU7mIFUI/xbGvX17g LM00hIxEhVNsSPemU2kTVISNBPVneecNVLlKXySjp0YPW/+sf8R7tTvwlSXX6h3I JM6wOU479O8mBvIcpAjfZlanHCHtqLk0ybaPx666DjdgYx6cUBHbDCF0P57XnGJA HNeVGtBwGQb8VWgbPLJKrStSOzYudDG8ndctqfKYN7uiPDjYM2/sqXcwQSVXR9vX AjT2s0GFEWT/AJhgBSeg9PJilEX1hPtomGKcQhKfR0wRGycixeZJFbwToQqzJrZN 7XoORbZPH1S5W6sjXsXH3eVPW3EGnKipulJSPGDqFLa2aIUG+PXuu/A+iJS6sADh mqzVfcEs3/NYsro40eA/iQc0t99ftJXgpX18KxYprjyL6VWcwC/xeHcT/Zw9abxz r7dYDGTR0z6RIew0GOaeZVdZJh/J6yraKCNDS0ARZgol6JPaU7HGHhh6Ohdmmu8L Gtsgdxp4NeLEgp4mQiRvvpQ5pPJ/YR+oCOx3v+PPnKRLhMTxymQ= =UF08 -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - batched unmap support for the IOMMU-API - support for unlocked command queueing in the ARM-SMMU driver - rework the ATS support in the ARM-SMMU driver - more refactoring in the ARM-SMMU driver to support hardware implemention specific quirks and errata - bounce buffering DMA-API implementatation in the Intel VT-d driver for untrusted devices (like Thunderbolt devices) - fixes for runtime PM support in the OMAP iommu driver - MT8183 IOMMU support in the Mediatek IOMMU driver - rework of the way the IOMMU core sets the default domain type for groups. Changing the default domain type on x86 does not require two kernel parameters anymore. - more smaller fixes and cleanups * tag 'iommu-updates-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (113 commits) iommu/vt-d: Declare Broadwell igfx dmar support snafu iommu/vt-d: Add Scalable Mode fault information iommu/vt-d: Use bounce buffer for untrusted devices iommu/vt-d: Add trace events for device dma map/unmap iommu/vt-d: Don't switch off swiotlb if bounce page is used iommu/vt-d: Check whether device requires bounce buffer swiotlb: Split size parameter to map/unmap APIs iommu/omap: Mark pm functions __maybe_unused iommu/ipmmu-vmsa: Disable cache snoop transactions on R-Car Gen3 iommu/ipmmu-vmsa: Move IMTTBCR_SL0_TWOBIT_* to restore sort order iommu: Don't use sme_active() in generic code iommu/arm-smmu-v3: Fix build error without CONFIG_PCI_ATS iommu/qcom: Use struct_size() helper iommu: Remove wrong default domain comments iommu/dma: Fix for dereferencing before null checking iommu/mediatek: Clean up struct mtk_smi_iommu memory: mtk-smi: Get rid of need_larbid iommu/mediatek: Fix VLD_PA_RNG register backup when suspend memory: mtk-smi: Add bus_sel for mt8183 memory: mtk-smi: Invoke pm runtime_callback to enable clocks ... |
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Arnd Bergmann
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375a7baddb |
Merge branch 'aspeed/dt-3' into arm/late
* aspeed/dt-3: ARM: dts: aspeed: Add AST2600 pinmux nodes ARM: dts: aspeed: Add AST2600 and EVB clk: Add support for AST2600 SoC clk: aspeed: Move structures to header clk: aspeed: Add SDIO gate |