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5 Commits

Author SHA1 Message Date
Arnd Bergmann
5d388143fa i2c: gxp: fix build failure without CONFIG_I2C_SLAVE 
The gxp_i2c_slave_irq_handler() is hidden in an #ifdef, but the
caller uses an IS_ENABLED() check:

drivers/i2c/busses/i2c-gxp.c: In function 'gxp_i2c_irq_handler':
drivers/i2c/busses/i2c-gxp.c:467:29: error: implicit declaration of function 'gxp_i2c_slave_irq_handler'; did you mean 'gxp_i2c_irq_handler'? [-Werror=implicit-function-declaration]

It has to consistently use one method or the other to avoid warnings,
so move to IS_ENABLED() here for readability and build coverage, and
move the #ifdef in linux/i2c.h to allow building it as dead code.

Fixes: 4a55ed6f89f5 ("i2c: Add GXP SoC I2C Controller")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Nick Hawkins <nick.hawkins@hpe.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
 2023-05-03 17:27:29 +02:00
Dan Carpenter
65609d3206 i2c: gxp: fix an error code in probe 
This is passing IS_ERR() instead of PTR_ERR() so instead of an error
code it prints and returns the number 1.

Fixes: 4a55ed6f89f5 ("i2c: Add GXP SoC I2C Controller")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: Nick Hawkins <nick.hawkins@hpe.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
 2023-03-03 21:00:54 +01:00
Wolfram Sang
4b3dfb0ed6 i2c: gxp: return proper error on address NACK 
According to Documentation/i2c/fault-codes.rst, NACK after sending an
address should be -ENXIO.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
 2023-03-03 21:00:26 +01:00
Wolfram Sang
1d092308ce i2c: gxp: remove "empty" switch statement 
There used to be error messages which had to go. Now, it only consists
of 'break's, so it can go.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
 2023-03-03 20:57:29 +01:00
Nick Hawkins
4a55ed6f89 i2c: Add GXP SoC I2C Controller 
The GXP SoC supports 10 I2C engines. Each I2C engine is completely
independent and can function both as an I2C master and I2C slave. The
I2C master can operate in a multi master environment. The engines support
a scalable speed from 8kHZ to 1.5 Mhz.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
 2023-02-17 23:18:20 +01:00