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This adds reset support for Luton and Jaguar2 in the ocelot-reset
driver. They are both MIPS based belonging to the Vcore III family.
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This adds reset support for Sparx5 in the ocelot-reset driver.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Switch the SI to boot mode so on a warm reboot, the SI is able to access
the flash.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
The Microsemi Ocelot SoC has a register allowing to reset the MIPS core.
Unfortunately, the syscon-reboot driver can't be used directly (but almost)
as the reset control may be disabled using another register.
Cc: linux-pm@vger.kernel.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
