8786 Commits

Author SHA1 Message Date
Eric W. Biederman
009f608ab2 signal/arm64: Remove arm64_force_sig_info
The function has no more callers so remove it.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:55:00 +02:00
Eric W. Biederman
b4d5557caa signal/arm64: Add and use arm64_force_sig_mceerr as appropriate
Add arm64_force_sig_mceerr for consistency with arm64_force_sig_fault,
and use it in the one location that can take advantage of it.

This removes the fiddly filling out of siginfo before sending a signal
reporting an memory error to userspace.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:54:51 +02:00
Eric W. Biederman
feca355b3d signal/arm64: Add and use arm64_force_sig_fault where appropriate
Wrap force_sig_fault with a helper that calls arm64_show_signal
and call arm64_force_sig_fault where appropraite.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2018-09-27 21:54:43 +02:00
Eric W. Biederman
559d8d91a8 signal/arm64: Only call set_thread_esr once in do_page_fault
This code is truly common between the signal sending cases so share it.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2018-09-27 21:54:33 +02:00
Eric W. Biederman
2d2837fab5 signal/arm64: Only perform one esr_to_fault_info call in do_page_fault
As this work is truly common between all of the signal sending cases
there is no need to repeat it between the different cases.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2018-09-27 21:54:26 +02:00
Eric W. Biederman
effb093ad2 signal/arm64: Expand __do_user_fault and remove it
Not all of the signals passed to __do_user_fault can be handled
the same way so expand the now tiny __do_user_fault in it's callers
and remove it.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:54:18 +02:00
Eric W. Biederman
aefab2b4c0 signal/arm64: For clarity separate the 3 signal sending cases in do_page_fault
It gets easy to confuse what is going on when some code is shared and some not
so stop sharing the trivial bits of signal generation to make future updates
easier to understand.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:54:10 +02:00
Eric W. Biederman
9ea3a9743c signal/arm64: Consolidate the two hwpoison cases in do_page_fault
These two cases are practically the same and use siginfo differently
from the other signals sent from do_page_fault.  So consolidate them
to make future changes easier.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:54:02 +02:00
Eric W. Biederman
f29ad209e4 signal/arm64: Factor set_thread_esr out of __do_user_fault
This pepares for sending signals with something other than
arm64_force_sig_info.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:53:54 +02:00
Eric W. Biederman
1628a7cc85 signal/arm64: Factor out arm64_show_signal from arm64_force_sig_info
Filling in siginfo is error prone and so it is wise to use more
specialized helpers to do that work.  Factor out the arm specific
unhandled signal reporting from the work of delivering a signal so
the code can be modified to use functions that take the information
to fill out siginfo as parameters.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:53:46 +02:00
Eric W. Biederman
24b8f79dd8 signal/arm64: Remove unneeded tsk parameter from arm64_force_sig_info
Every caller passes in current for tsk so there is no need to pass
tsk.  Instead make tsk a local variable initialized to current.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:53:35 +02:00
Eric W. Biederman
6fa998e83e signal/arm64: Push siginfo generation into arm64_notify_die
Instead of generating a struct siginfo before calling arm64_notify_die
pass the signal number, tne sicode and the fault address into
arm64_notify_die and have it call force_sig_fault instead of
force_sig_info to let the generic code generate the struct siginfo.

This keeps code passing just the needed information into
siginfo generating code, making it easier to see what
is happening and harder to get wrong.  Further by letting
the generic code handle the generation of struct siginfo
it reduces the number of sites generating struct siginfo
making it possible to review them and verify that all
of the fiddly details for a structure passed to userspace
are handled properly.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-09-27 21:52:54 +02:00
Borislav Petkov
d913e8966a Merge branch 'tip-x86-hygon' into edac-for-4.20
... to pick up a dependent commit and share it with the tip tree, branch
tip:x86/cpu.

Signed-off-by: Borislav Petkov <bp@suse.de>
2018-09-27 18:36:24 +02:00
Ard Biesheuvel
c296146c05 arm64/kernel: jump_label: Switch to relative references
On a randomly chosen distro kernel build for arm64, vmlinux.o shows the
following sections, containing jump label entries, and the associated
RELA relocation records, respectively:

  ...
  [38088] __jump_table      PROGBITS         0000000000000000  00e19f30
       000000000002ea10  0000000000000000  WA       0     0     8
  [38089] .rela__jump_table RELA             0000000000000000  01fd8bb0
       000000000008be30  0000000000000018   I      38178   38088     8
  ...

In other words, we have 190 KB worth of 'struct jump_entry' instances,
and 573 KB worth of RELA entries to relocate each entry's code, target
and key members. This means the RELA section occupies 10% of the .init
segment, and the two sections combined represent 5% of vmlinux's entire
memory footprint.

So let's switch from 64-bit absolute references to 32-bit relative
references for the code and target field, and a 64-bit relative
reference for the 'key' field (which may reside in another module or the
core kernel, which may be more than 4 GB way on arm64 when running with
KASLR enable): this reduces the size of the __jump_table by 33%, and
gets rid of the RELA section entirely.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-s390@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Jessica Yu <jeyu@kernel.org>
Link: https://lkml.kernel.org/r/20180919065144.25010-4-ard.biesheuvel@linaro.org
2018-09-27 17:56:47 +02:00
Thor Thayer
74121b9aa3 arm64: dts: stratix10: Correct System Manager register size
Correct the register size of the System Manager node.

Cc: stable@vger.kernel.org
Fixes: 78cd6a9d8e154 ("arm64: dts: Add base stratix 10 dtsi")
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-09-27 09:33:24 -05:00
Rodrigo Exterckötter Tjäder
679294497b arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay
The PHY found on the A64-OLinuXino requires a TX delay in order to
operate properly. Olimex uses a 600ps second delay in their BSP, and
that has been found to work, so let's use that value in the current
DT.

Signed-off-by: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-09-27 18:20:35 +08:00
Jisheng Zhang
087682f5a7 arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC
Add initial dtsi file to support Synaptics AS370 SoC with quad
Cortex-A53 CPUs.

Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
2018-09-27 14:48:43 +08:00
Suzuki K Poulose
70a39be676 arm64: dts: msm8916: Update coresight bindings for hardware ports
Switch to updated coresight bindings for hw ports

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-26 11:59:36 -05:00
Arnd Bergmann
ba61ab1a23 arm64: zynqmp: SoC changes for v4.20
- Adding firmware API for SoC with debugfs interface
   Firmware driver communicates to Platform Management Unit (PMU) by using
   SMC instructions routed to Arm Trusted Firmware (ATF). Initial version
   adds support for base firmware driver with query and clock APIs.
 
   EEMI spec is available here:
   https://www.xilinx.com/support/documentation/user_guides/ug1200-eemi-api.pdf
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlurMMcACgkQykllyylKDCGE6gCfY2tOaxQCcBUzmh5ZXSUiQdeM
 BA8AoJgu8dBLcD/U9S5+lDlCEMY26eSh
 =tgPT
 -----END PGP SIGNATURE-----

Merge tag 'zynqmp-soc-for-v4.20-v2' of https://github.com/Xilinx/linux-xlnx into next/drivers

arm64: zynqmp: SoC changes for v4.20

- Adding firmware API for SoC with debugfs interface
  Firmware driver communicates to Platform Management Unit (PMU) by using
  SMC instructions routed to Arm Trusted Firmware (ATF). Initial version
  adds support for base firmware driver with query and clock APIs.

  EEMI spec is available here:
  https://www.xilinx.com/support/documentation/user_guides/ug1200-eemi-api.pdf

* tag 'zynqmp-soc-for-v4.20-v2' of https://github.com/Xilinx/linux-xlnx:
  firmware: xilinx: Add debugfs for query data API
  firmware: xilinx: Add debugfs interface
  firmware: xilinx: Add clock APIs
  firmware: xilinx: Add query data API
  firmware: xilinx: Add Zynqmp firmware driver
  dt-bindings: firmware: Add bindings for ZynqMP firmware

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-09-26 17:18:53 +02:00
Christoph Hellwig
3cfa210bf3 xen: don't include <xen/xen.h> from <asm/io.h> and <asm/dma-mapping.h>
Nothing Xen specific in these headers, which get included from a lot
of code in the kernel.  So prune the includes and move them to the
Xen-specific files that actually use them instead.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-26 08:45:18 -06:00
Christoph Hellwig
c39ae60dfb block: remove ARCH_BIOVEC_PHYS_MERGEABLE
Take the Xen check into the core code instead of delegating it to
the architectures.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-26 08:45:11 -06:00
Christoph Hellwig
20e3267601 xen: provide a prototype for xen_biovec_phys_mergeable in xen.h
Having multiple externs in arch headers is not a good way to provide
a common interface.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-26 08:45:10 -06:00
Thierry Reding
d9fd22447b arm64: tegra: I2C on Tegra194 is not compatible with Tegra114
Tegra194 contains a version of the I2C controller that is no longer
compatible with the version found in Tegra114.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26 15:50:59 +02:00
Antoine Tenart
dd0da407bb arm64: dts: marvell: armada-cp110: describe more PPv2 interrupts
This patch describes 3 additional interrupts per PPv2 port. Those
interrupts will be used later in future versions of the Marvell PPv2
driver, and now the device tree description matches the hardware
capabilities.

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26 14:29:46 +02:00
Antoine Tenart
eeee84f7a6 arm64: dts: marvell: armada-cp110: change the PPv2 IRQ names
This patch changes the PPv2 IRQ names in the CP110 device tree to match
a corresponding change in the Marvell PPv2 driver. The reason this was
updated is the IRQ where names after Tx/Rx interrupts, but this is not
true and can be configured. A following patch will add more of them and
the names wouldn't make sense.

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26 14:29:23 +02:00
Baruch Siach
a612083327 arm64: dts: add support for SolidRun Clearfog GT 8K
The SolidRun Clearfog GT-8K is based on Marvell Armada 8040 SoC.

  https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k

The following devices were tested with this DT on top of kernel
v4.19-rc4:

  * 1GB Ethernet WAN

  * 4 ports 1GB Ethernet switch (2.5GB uplink)

  * SFP port

  * SATA on CON3 PCIe slot

  * USB3 type A port

  * SD card and eMMC

  * 2 LEDs

  * 2 push buttons

[gregory: fix block comment alignement]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-09-26 14:23:59 +02:00
Heiko Stuebner
91e75bde63 arm64: dts: rockchip: add missing address and size cells for rk3399 mipi dsi
DSI controllers are also the hosts of their dsi bus and therefore contain
nodes describing the attached panels with their reg properties containing
the virtual ids.

The dsi controller nodes on rk3399 lacked the #address-cells and #size-cells
for these subnodes, so add them.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26 13:39:18 +02:00
Chen-Yu Tsai
cd7ab133db arm64: dts: rockchip: Enable SPI NOR flash on Rock64
The Pine64 Rock64 board comes with a GigaDevice GD25Q128CSIG
or GD25Q127CSIG chip, which is a 128 Mbit SPI NOR flash chip
that supports the JEDEC read-ID command.

This patch enables the SPI controller and adds a device node
for the flash chip using the generic "jedec,spi-nor" comaptible.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26 13:37:52 +02:00
Akash Gajjar
e4f3fb4909 arm64: dts: rockchip: add initial dts support for Rockpro64
Rockpro64 is a rockchip RK3399 based board from pine64.org.
This patch adds basic device node support for Rockpro64 board and make it able
to bring up.

Peripheral Works
- Sdcard
- USB 2.0, 3.0
- Leds
- Ethernet
- Debug console

Not working:
- USB Type-C

Signed-off-by: Akash Gajjar <Akash_Gajjar@mentor.com>
Acked-by: Deepak Das <Deepak_Das@mentor.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-09-26 13:31:55 +02:00
Takeshi Kihara
158928f38e arm64: dts: renesas: r8a77965: Add Sound and Audio DMAC device nodes
Based on a similar patch of the R8A7796 device tree
by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26 12:31:04 +02:00
Ulrich Hecht
bcf3003438 arm64: dts: renesas: r8a77995: draak: Enable HDMI display output
Adds LVDS decoder, HDMI encoder and connector for the Draak board.

The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
EXTAL externals clocks. Two of them are provided to the SoC on the Draak
board, hook them up in DT.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26 11:16:41 +02:00
Laurent Pinchart
74fe39abbf arm64: dts: renesas: r8a77990: ebisu: Enable VGA and HDMI outputs
Add the LVDS decoder, HDMI encoder, VGA encoder and HDMI and VGA
connectors, and wire up the display-related nodes with clocks, pinmux
and regulators.

The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and
EXTAL externals clocks. Two of them are provided to the SoC on the Ebisu
board, hook them up in DT.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26 11:14:22 +02:00
Kieran Bingham
0dc733988b arm64: dts: renesas: r8a77995: Add LVDS support
The r8a77995 D3 platform has 2 LVDS channels connected to the DU.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
[uli: moved lvds* into the soc node, added PM domains, resets]
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26 11:13:39 +02:00
Jianxin Pan
9c8c52f7cb arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support
Try to add basic DT support for the Amlogic's Meson-G12A S905D2 SoC,
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer, UART. It's capable of booting up into the serial console.

Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-26 02:04:58 -07:00
Rob Herring
b739c177e1 arm64: dts: fsl: Fix I2C and SPI bus warnings
dtc has new checks for I2C and SPI buses. Fix the SPI bus node names
and warnings in unit-addresses.

arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@57: I2C bus unit address format error, expected "53"
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dtb: Warning (i2c_bus_reg): /soc/i2c@2180000/eeprom@56: I2C bus unit address format error, expected "52"

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-26 17:01:53 +08:00
Laurent Pinchart
13ee2bfc54 arm64: dts: renesas: r8a77990: Add display output support
The R8A77990 (E3) platform has one RGB output and two LVDS outputs
connected to the DU. Add the DT nodes for the DU, LVDS encoders and
supporting VSP and FCP.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-26 11:00:52 +02:00
Rajan Vaja
76582671eb firmware: xilinx: Add Zynqmp firmware driver
This patch is adding communication layer with firmware.
Firmware driver provides an interface to firmware APIs.
Interface APIs can be used by any driver to communicate to
PMUFW(Platform Management Unit). All requests go through ATF.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-26 08:47:31 +02:00
Christoph Hellwig
1a0afc14b5 Revert "dma-mapping: clear dev->dma_ops in arch_teardown_dma_ops"
This reverts commit 46053c73685411915d3de50c5a0045beef32806b.

This change breaks architectures setting up dma_ops in their own magic
way and not using arch_setup_dma_ops, so revert it.

Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2018-09-25 15:12:26 -07:00
Nathan Chancellor
b5bb425871 arm64: percpu: Initialize ret in the default case
Clang warns that if the default case is taken, ret will be
uninitialized.

./arch/arm64/include/asm/percpu.h:196:2: warning: variable 'ret' is used
uninitialized whenever switch default is taken
[-Wsometimes-uninitialized]
        default:
        ^~~~~~~
./arch/arm64/include/asm/percpu.h:200:9: note: uninitialized use occurs
here
        return ret;
               ^~~
./arch/arm64/include/asm/percpu.h:157:19: note: initialize the variable
'ret' to silence this warning
        unsigned long ret, loop;
                         ^
                          = 0

This warning appears several times while building the erofs filesystem.
While it's not strictly wrong, the BUILD_BUG will prevent this from
becoming a true problem. Initialize ret to 0 in the default case right
before the BUILD_BUG to silence all of these warnings.

Reported-by: Prasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Dennis Zhou <dennis@kernel.org>
2018-09-25 13:26:48 -07:00
Thor Thayer
6b2da9ff05 arm64: dts: stratix10: Add peripheral EDAC nodes
Add the usb and ethernet peripheral ECC nodes using the rria10 format.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/1537883342-30180-7-git-send-email-thor.thayer@linux.intel.com
2018-09-25 21:22:57 +02:00
Thor Thayer
446fd7afdc arm64: dts: stratix10: Add SDRAM node
Add the SDRAM node to follow the Arria10 layout and bindings. The
Arria10 SDRAM functions expect this node.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/1537883342-30180-4-git-send-email-thor.thayer@linux.intel.com
2018-09-25 21:18:56 +02:00
Thor Thayer
3ce078ffe2 arm64: dts: stratix10: Additions to EDAC System Manager
Add the phandle, address, size and ranges to the Stratix10 System
Manager node to match the existing Arria10 EDAC implementation.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/1537883342-30180-2-git-send-email-thor.thayer@linux.intel.com
2018-09-25 21:10:57 +02:00
Liviu Dudau
74cf77e8be arm64: dts: broadcom: Use the .dtb name in the rule, rather than .dts
Commit a7eb26392b893 ("arm64: dts: broadcom: Add reference to Compute
Module IO Board V3") adds the bcm2837-rpi-cm3-io3.dts file as a target
in the Makefile, rather than the .dtb name. This will skip the
generation of the .dtb file at compile time and will fail the dtbs_install
target.

Fixes: a7eb26392b893 ("arm64: dts: broadcom: Add reference to Compute Module IO Board V3")
Signed-off-by: Liviu Dudau <liviu@dudau.co.uk>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-25 11:49:51 -07:00
Olof Johansson
478bf0b470 ARM64: hisilicon: defconfig updates for 4.20
- Enable integrated NIC driver(hns3) for hisilicon SoCs
 - Enable PCIe Port bus to support some PCIe features like
   AER, hotplug, PME and DPC
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJbpPB2AAoJEAvIV27ZiWZcskQP/R46DBO5oq8y1UUjPFTr7Rxb
 MAwSgEFGPuI+bDafgSVMKGU92soMDeyE467dxvUz2Ik42ZQHIgjQIAqSx1QNrfjh
 0hqPMBgnyiBUMSOmyCrvADNnYHu0gs+maGVDcZfkhmghq3mGkH5vtdh0kkZ5PaeY
 tifDhis36E7fr/rynSdpcmQELt/9Hbueh6/Cn4+hnWR/bNA0wcpmdwYMXH1Sx0ma
 iAVYJAyJYwOS8feZcQyTm2ZhRbIyX8QURT/rP66+J/u0PgGgBF4rmLvLHCeMeKzD
 SYb+7a2IenLplqXTZjNHC/k3adO89nfCG6GsHr1UsDBgXnwc+oVT40enf7P8ibww
 mPEw/3ISnUiFjrcpN25w+1M5/NaG98DCM2a0jCTr51jJavjXbB+ZCtYI7Z8VmvDE
 /lD94PPgvR4O2vEG3jsWJwTuIdjvF0Vm8efpCPohV7MPghn+2OYXKUy5K+oeVtLx
 WaHat7ucV9ONkxsOUMUvtMvI+ZWTNTiw3mcWvK79+GYwSVz9iET4U6RY1fITMcZM
 odRNxnk97wh7CWuO3N2y2kBrIQk4GC2tssqxL2r4rICQeeusNvxFWvpp7p7tHl3P
 CMnpLGZ/XxS2LD2yUvXeIxL7Ouo+Whf/tYamPJUxXOf1zT4K6q4O/YQYmZIiZmSB
 UcFKOl9+9xnFRZieU6fF
 =Gn5v
 -----END PGP SIGNATURE-----

Merge tag 'hisi-defconfig-for-4.20' of git://github.com/hisilicon/linux-hisi into next/defconfig

ARM64: hisilicon: defconfig updates for 4.20

- Enable integrated NIC driver(hns3) for hisilicon SoCs
- Enable PCIe Port bus to support some PCIe features like
  AER, hotplug, PME and DPC

* tag 'hisi-defconfig-for-4.20' of git://github.com/hisilicon/linux-hisi:
  arm64: defconfig: Enable PCIEPORTBUS
  arm64: defconfig: enable HiSilicon HNS3 driver

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-25 11:39:42 -07:00
Ryder Lee
0b6286dd96 arm64: dts: mt7622: add bananapi BPI-R64 board
Add support for the bananapi R64 (BPI-R64) development board from
BIPAI KEJI. Detailed hardware information for BPI-R64 which could be
found on http://wiki.banana-pi.org/Banana_Pi_BPI-R64

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 17:08:29 +02:00
Ryder Lee
8be2c4ae2f arm64: dts: mt7622: fix ram size for rfb1
Fix ram size to 512 megabytes and sort nodes in alphabetical order.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 17:08:28 +02:00
Ryder Lee
e1dd05824a arm64: dts: mt7622: add a bluetooth 5 device node
Add a built-in bluetooth 5 support for MT7622.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 17:08:28 +02:00
Ryder Lee
9cc7f0de9e arm64: dts: mt7622: add timer, CCI-400 and PMU nodes
Add device tree entries for timer, ARM CCI-400 and its PMU.
Otherwise, we add a cortex-a53-pmu node to enable hw perfevents.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 17:08:00 +02:00
Jun Yao
8eb7e28d4c arm64/mm: move runtime pgds to rodata
Now that deliberate writes to swapper_pg_dir are made via the fixmap, we
can defend against errant writes by moving it into the rodata section.
Since tramp_pg_dir and reserved_ttbr0 must be at a fixed offset from
swapper_pg_dir, and are not modified at runtime, these are also moved
into the rodata section. Likewise, idmap_pg_dir is not modified at
runtime, and is moved into rodata.

Signed-off-by: Jun Yao <yaojun8558363@gmail.com>
Reviewed-by: James Morse <james.morse@arm.com>
[Mark: simplify linker script, commit message]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-09-25 15:10:55 +01:00
Jun Yao
2330b7ca78 arm64/mm: use fixmap to modify swapper_pg_dir
Once swapper_pg_dir is in the rodata section, it will not be possible to
modify it directly, but we will need to modify it in some cases.

To enable this, we can use the fixmap when deliberately modifying
swapper_pg_dir. As the pgd is only transiently mapped, this provides
some resilience against illicit modification of the pgd, e.g. for
Kernel Space Mirror Attack (KSMA).

Signed-off-by: Jun Yao <yaojun8558363@gmail.com>
Reviewed-by: James Morse <james.morse@arm.com>
[Mark: simplify ifdeffery, commit message]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-09-25 15:10:55 +01:00