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Add a compatible string for Microcrystal rv2123 as the reset procedure seem
to be differing. However, the current driver works just fine.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Document SoC specific bindings for RZ/G2M (r8a774a1) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Document SoC specific compatible strings for r8a77470. No driver change
is needed as the fallback strings will activate the right code.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Document SoC specific bindings for R-Car M3-W (r8a7796) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
- Parse the 4BAIT SFDP section
- Add a bunch of SPI NOR entries to the flash_info table
- Add the concept of SFDP fixups and use it to fix a bug on MX25L25635F
- A bunch of minor cleanups/comestic changes
-----BEGIN PGP SIGNATURE-----
iQJQBAABCgA6FiEEKmCqpbOU668PNA69Ze02AX4ItwAFAlwVQUYcHGJvcmlzLmJy
ZXppbGxvbkBib290bGluLmNvbQAKCRBl7TYBfgi3ACIYD/sG0+vRIKK8+NgNUHYy
nzKICKvdnBrm2RWi+6va5n2pYggyNy1VhWEjmqWLupjxn7NGkjZiBilhfj8Iv6YN
HScNy7FLHM6pxTKpsZKQLLGKvaUXODgvZwiw3L6T5T3JaJ5nlpE5g8jQy8sCzfjK
pwKdrOw17caZgoY0bMe2ppCObIDLd+mY+WSHbo6tb4/fohpTX1l9QZYHjfgHU9vP
CG0z3sU0JCNGXsbQMngfeuyXFjJ4OKdnklbVTeZl673AYtQMBhQEIGNVkVefuBP3
p8hU0CWRn0Yikc1HGTENvYCnQ7ju3z+16rnLxy3A5CPHhCDrTgUmM8HabYbh+0Si
0Y1wXpEOZ0OZQ7uMs2Q8SK0GLyxqdxkE0ibHgb7K/aLb+yg8oB7DB4Uenb06CiaQ
KAZWGgWZlSondX+/GI7YcQozslFFCfixAw6H0kCpQW0/2piXNqsN5BOROEqjueXW
xeMG0DNnzrQ6/vB9ukLESSB/YvVwfUvt6GSjqMSDdXwx6zyKSvHJ+chCxlK46+Hm
zIVcvNT3mpwcuVnQOZZeCaiIrDUAySEq/8Ztp9O5/CfkzdQyMWxDPoY9A0HjL2p3
FmRN7aAB9jJcdHc2tLwcKPRepjliIUMLf0NXdTSizzQz8WJqULZRBN0VWW4sCbLc
+tTisYjX8fYUz9+kHUcQ4XY16g==
=JXhP
-----END PGP SIGNATURE-----
Merge tag 'spi-nor/for-4.21' of git://git.infradead.org/linux-mtd into mtd/next
Core changes:
- Parse the 4BAIT SFDP section
- Add a bunch of SPI NOR entries to the flash_info table
- Add the concept of SFDP fixups and use it to fix a bug on MX25L25635F
- A bunch of minor cleanups/comestic changes
NAND core changes:
- kernel-doc miscellaneous fixes.
- Third batch of fixes/cleanup to the raw NAND core impacting various
controller drivers (ams-delta, marvell, fsmc, denali, tegra, vf610):
* Stopping to pass mtd_info objects to internal functions
* Reorganizing code to avoid forward declarations
* Dropping useless test in nand_legacy_set_defaults()
* Moving nand_exec_op() to internal.h
* Adding nand_[de]select_target() helpers
* Passing the CS line to be selected in struct nand_operation
* Making ->select_chip() optional when ->exec_op() is implemented
* Deprecating the ->select_chip() hook
* Moving the ->exec_op() method to nand_controller_ops
* Moving ->setup_data_interface() to nand_controller_ops
* Deprecating the dummy_controller field
* Fixing JEDEC detection
* Providing a helper for polling GPIO R/B pin
Raw NAND chip drivers changes:
- Macronix:
* Flagging 1.8V AC chips with a broken GET_FEATURES(TIMINGS)
Raw NAND controllers drivers changes:
- Ams-delta:
* Fixing the error path
* SPDX tag added
* May be compiled with COMPILE_TEST=y
* Conversion to ->exec_op() interface
* Dropping .IOADDR_R/W use
* Use GPIO API for data I/O
- Denali:
* Removing denali_reset_banks()
* Removing ->dev_ready() hook
* Including <linux/bits.h> instead of <linux/bitops.h>
* Changes to comply with the above fixes/cleanup done in the core.
- FSMC:
* Adding an SPDX tag to replace the license text
* Making conversion from chip to fsmc consistent
* Fixing unchecked return value in fsmc_read_page_hwecc
* Changes to comply with the above fixes/cleanup done in the core.
- Marvell:
* Preventing timeouts on a loaded machine (fix)
* Changes to comply with the above fixes/cleanup done in the core.
- OMAP2:
* Pass the parent of pdev to dma_request_chan() (fix)
- R852:
* Use generic DMA API
- sh_flctl:
* Converting to SPDX identifiers
- Sunxi:
* Write pageprog related opcodes to the right register: WCMD_SET (fix)
- Tegra:
* Stop implementing ->select_chip()
- VF610:
* Adding an SPDX tag to replace the license text
* Changes to comply with the above fixes/cleanup done in the core.
- Various trivial/spelling/coding style fixes.
SPI-NAND drivers changes:
- Removing the depreacated mt29f_spinand driver from staging.
- Adding support for:
* Toshiba TC58CVG2S0H
* GigaDevice GD5FxGQ4xA
* Winbond W25N01GV
- A bunch of new irqchip drivers (RDA8810PL, Madera, imx-irqsteer)
- Updates for new (and old) platforms (i.MX8MQ, F1C100s)
- A number of SPDX cleanups
- A workaround for a very broken GICv3 implementation
- A platform-msi fix
- Various cleanups
-----BEGIN PGP SIGNATURE-----
iQJJBAABCgAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAlwZI8cVHG1hcmMuenlu
Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDyokP+gKoKbZMc1E7dX6WxUrKh2N+fMJF
uVbuGF2s57CLG955YNuyo8BK4meWJIHGO3JahwE8I/9eu0G7PaudYvpZgP7s/sxD
XHLWFVHB1mq4lExMcluT0jG4ZpX7EKvYB1KGqgYM1ScOS9Uubb4ZG9T5GPhUT/YM
w1BAtHaZmCAg8d0wNPUMaAFc9Bd2B9Z1C8nwS+wpdJRxYxE9x8BES42r95rbXCG6
5Cq2ol/NbF4RbFodel4YdiAIKfrQtXyQ3N3twC5GRXln4XLjUfzs4mA5rxLLoeGZ
2UGXeIk0GcokSWF/e+0p3tQDWKwdbqoBhbRbqk7u5ZWuEWTRf4Zot3IlCVpJAMM3
iRw5XChWxovC+/oqgin4sp1gNpSRgf5mMvR1EauR5DTVtwlOjUBKaPEyKLrPITOo
B42EJugJ94J0YVdT9RUJsOSXIdOiYFE6I9F4i/XioLYq5FItBB56/81ARZgEncpg
FEdtseCCtRC3WWGzghxZsSzCW3iGi8wdddRdZmOXCNdPtH03TZg0dGPS+KIn8Soh
eVSGImV/4efN6hh6fSryeR02fYT3DKGgDQUiV4e/1SOSzxy6VjjrOh48tB8qn/M7
NbFZMqDKnltsXT2C+bh6zjhorbVCkj8AEtx1oF0d7iIyBxor3eHUelTz6VglNlLq
RFetH+Yjh9nt9ReO
=1Mk9
-----END PGP SIGNATURE-----
Merge tag 'irqchip-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier:
- A bunch of new irqchip drivers (RDA8810PL, Madera, imx-irqsteer)
- Updates for new (and old) platforms (i.MX8MQ, F1C100s)
- A number of SPDX cleanups
- A workaround for a very broken GICv3 implementation
- A platform-msi fix
- Various cleanups
Add hwlocks as optional property
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This adds the DT binding for the Freescale IRQSTEER interrupt
multiplexer found in the i.MX8 familiy SoCs.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The "num-lanes" property is not used, remove it.
Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Adding a new compatible for 24c2048.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAlwRQA4ACgkQEacuoBRx
13JR8BAAoo10W2lAP4dG2W5/n+q3frMq7o5p2UoBVKaYfPVygkZmtCRsNCBDuANO
j2VdpSR5EfAJuAiBow0Jn1ey75OwOWdjJ7ljlpNYKrMc+9o9ViQs0pf5Snt2Nwe4
UmnBmiZygcEd17frahCCTfQxXyvSAnTdAb5VfiblOq+VnefdaJYB2JgCg4zVxmqA
2CKwzmeyehe5AfFxeZk0ZtqRgiaWdKOH/yDstjw93C9pbysou17ceFWAglOcV0yY
4zjau9jGfx88mN2Zh2QukmxK4dsx+QkXXyCHdPzXeMiYOZLNDzaP7zCFsd824AWf
GkoRSYi7mS6eIe8Tf2QKLwxMq+CS7dsZtMloXlpz9hBz8KxpIKpHTi6ERgvc5phW
DpjlxHqw08GG+CwOhTLgv3hGGPCTV6v9VzDzwIICViVh2d6DmqRBQfR1SIs6tlmA
30mbI2AU85H9PGJGD8to+ietGWWxjbdVuKf68/nmfCWqvoVi3jEM/iU1pUo91fS1
8ru+f28MvA/3KpVto2aJiOu4XK0Yyg1jZe5UED010A6oFMqGhpyB5HOgfLaQY1kO
xdb/Cq295NpbtbkWPDBup/2TGWo0jcdLklZOvK4MTRqhHx+pzfbqkd0wUTebNFXU
AxXXD4TuuyWakBnvqaRXqyAg0RL5719gREl1GhWgpb+oWAD9uoE=
=tkO6
-----END PGP SIGNATURE-----
Merge tag 'at24-4.21-updates-for-wolfram' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into i2c/for-5.0
at24: updates for 4.21
Adding a new compatible for 24c2048.
Add Freescale MAG3110 dt-bindings and remove it from trivial-devices
dt-bingding doc.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
[robh: fixup trivial-devices.txt change for trivial-devices.yaml]
Signed-off-by: Rob Herring <robh@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlwW4/oeHHRvcnZhbGRz
QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiG2QMH/Rl6iMpTUX23tMHe
eXQzAOSvQXaWlFoX25j1Jvt8nhS7Uy8vkdpYTCOI/7DF0Jg4O/6uxcZkErlwWxb8
MW1rMgpfO+OpDLSLXAO2GKxaKI3ArqF2BcOQA2mji1/jR2VUTqmIvBoudn5d+GYz
19aCyfdzmVTC38G9sBhhcqJ10EkxLiHe2K74bf4JxVuSf2EnTI4LYt5xJPDoT0/C
6fOeUNwVhvv5a4svvzJmortq7x7BwyxBQArc7PbO0MPhabLU4wyFUOTRszgsGd76
o5JuOFwgdIIHlSSacGla6rKq10nmkwR07fHfRFFwbvrfBOEHsXOP2hvzMZX+FLBK
IXOzdtc=
=XlMc
-----END PGP SIGNATURE-----
Merge tag 'v4.20-rc7' into patchwork
Linux 4.20-rc7
* tag 'v4.20-rc7': (403 commits)
Linux 4.20-rc7
scripts/spdxcheck.py: always open files in binary mode
checkstack.pl: fix for aarch64
userfaultfd: check VM_MAYWRITE was set after verifying the uffd is registered
fs/iomap.c: get/put the page in iomap_page_create/release()
hugetlbfs: call VM_BUG_ON_PAGE earlier in free_huge_page()
memblock: annotate memblock_is_reserved() with __init_memblock
psi: fix reference to kernel commandline enable
arch/sh/include/asm/io.h: provide prototypes for PCI I/O mapping in asm/io.h
mm/sparse: add common helper to mark all memblocks present
mm: introduce common STRUCT_PAGE_MAX_SHIFT define
alpha: fix hang caused by the bootmem removal
XArray: Fix xa_alloc when id exceeds max
drm/vmwgfx: Protect from excessive execbuf kernel memory allocations v3
MAINTAINERS: Daniel for drm co-maintainer
drm/amdgpu: drop fclk/gfxclk ratio setting
IB/core: Fix oops in netdev_next_upper_dev_rcu()
dm thin: bump target version
drm/vmwgfx: remove redundant return ret statement
drm/i915: Flush GPU relocs harder for gen3
...
When a serial port continuously experiences input overrun from
(1) continuous receive characters from remote and or (2) hardware
issues, its interrupt handler can preempt other tasks especially
when the system is busy (ie. boot up period). This can cause other
tasks to get starved of processing time from the CPU.
When this dts binding is enabled and input overrun on the serial port
is detected, serial port receive will be throttled to give some breathing
room for processing other tasks. Value provided will be in milliseconds.
&serial0{
overrun-throttle-ms = <500>;
};
Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
- Add the HSIC support for imx
-----BEGIN PGP SIGNATURE-----
iQEwBAABCAAaBQJcF1bIExxwZXRlci5jaGVuQG54cC5jb20ACgkQSFkpgVDWcbv1
Xgf/RIlKRdLOiO0wCJWkmiHRIU/YE0V6QNwhMKCUK2PfAqLI3px/a/uOam7U8ysn
6TvrUYxy/V7yBDCw6bR8bbJeP5gFjZPEnqd4RV6YZzP7Zc6FJ/10cLMWWGfB61JV
xqcVzJGjZ/AuU00TDDEeKXnGB4w6iH47x0ywimxlHSEhSUGQEoogopgtlr8JfnWg
bVQ9wr1jkUmkDymVFaHzrYSWVIToejGOB2kNRmhGpxKIUq3Mv/X0Vux50+egNpDK
ikyVo5oIr1cU0nVlAl2lquoTf6F7gRo2GduY9stw2VR6VxUUvd2cj57bJlhiwqPe
3jRiXjWtZKsWEcSpMhaT8ks+Og==
=Q7/x
-----END PGP SIGNATURE-----
Merge tag 'usb-ci-v4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb into usb-next
Peter writes:
- Improve the over-current handling for imx
- Add the HSIC support for imx
* tag 'usb-ci-v4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb:
usb: chipidea: imx: allow to configure oc polarity on i.MX25
usb: chipidea: imx: Warn if oc polarity isn't specified
usb: chipidea: imx: support configuring for active low oc signal
doc: usb: ci-hdrc-usb2: Add pinctrl properties for HSIC pin groups
usb: chipidea: host: override ehci->hub_control
usb: chipidea: imx: add HSIC support
usb: chipidea: add flag for imx hsic implementation
Qcom's implementation of arm,mmu-500 works well with current
arm-smmu driver implementation. Adding a soc specific compatible
along with arm,mmu-500 makes the bindings future safe.
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
The driver fetches a thermal zone using the string "cpu_thermal" for
tuning operation. Add a note for the same.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Commit 26a4f38d13 ("dt-bindings: mmc: sdhci-of-arasan: Add new
compatible for AM654 MMC PHY") added a new compatible for supporting
controllers on TI's AM65x SOCs. It turns out that the controller is
not compatible with the arasan driver's phy and consumer model as it
requires some phy registers for core sdhci functionality. This calls
for the binding to branch out to a new driver.
Therefore, add a deprecated message for the ti,am654-sdhci-5.1 binding.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
In sdhci-msm-v5 and beyond, the MCI registers are removed, so there is only
one register region required.
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Document support for the RZ/A2 (R7S9210) SoC.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The TI TMP451 temperature sensors are compatible with the National LM90
temperature sensors.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
These are Negative Temperature Coefficient thermistors, like the others
in the list.
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The tmp108 does have an alert output that can be used as interrupt source
and can of course also be used as part of a thermal sensor setup for things
like thermal-based cpu frequencies, so document the necessary properties.
Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* clk-renesas:
clk: renesas: rcar-gen3: Add HS400 quirk for SD clock
clk: renesas: rcar-gen3: Add documentation for SD clocks
clk: renesas: rcar-gen3: Set state when registering SD clocks
clk: renesas: r8a77995: Simplify PLL3 multiplier/divider
clk: renesas: r8a77995: Add missing CPEX clock
clk: renesas: r8a77995: Remove non-existent SSP clocks
clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks
clk: renesas: r8a77995: Correct parent clock of DU
clk: renesas: r8a77990: Correct parent clock of DU
clk: renesas: r8a77970: Add CPEX clock
clk: renesas: r8a77965: Add CPEX clock
clk: renesas: r8a7796: Add CPEX clock
clk: renesas: r8a7795: Add CPEX clock
clk: renesas: r8a774a1: Add CPEX clock
dt-bindings: clock: r8a7796: Remove CSIREF clock
dt-bindings: clock: r8a7795: Remove CSIREF clock
clk: renesas: Mark rza2_cpg_clk_register static
clk: renesas: r7s9210: Add USB clocks
clk: renesas: r8a77970: Add RPC clocks
clk: renesas: r7s9210: Add SDHI clocks
* clk-allwinner:
clk: sunxi-ng: a64: Allow parent change for VE clock
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks
clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL
clk: sunxi-ng: h3: Allow parent change for ve clock
clk: sunxi-ng: add support for suniv F1C100s SoC
dt-bindings: clock: Add Allwinner suniv F1C100s CCU
clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent
clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output
clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL
clk: sunxi-ng: a64: Fix gate bit of DSI DPHY
clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I
clk: sunxi-ng: Add support for H6 DE3 clocks
dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description
clk: sunxi-ng: h6: Set video PLLs limits
clk: sunxi-ng: Use u64 for calculation of NM rate
clk: sunxi-ng: Adjust MP clock parent rate when allowed
clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width
clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock
* clk-tegra:
clk: tegra: Return the exact clock rate from clk_round_rate
clk: tegra30: Use Tegra CPU powergate helper function
soc/tegra: pmc: Drop SMP dependency from CPU APIs
clk: tegra: Fix maximum audio sync clock for Tegra124/210
clk: tegra: get rid of duplicate defines
clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC
clk: tegra20: Turn EMC clock gate into divider
* clk-meson: (25 commits)
clk: meson: axg-audio: use the clk input helper function
clk: meson: add clk-input helper function
clk: meson: Mark some things static
clk: meson: meson8b: add the read-only video clock trees
clk: meson: meson8b: add the fractional divider for vid_pll_dco
clk: meson: meson8b: fix the offset of vid_pll_dco's N value
clk: meson: Fix GXL HDMI PLL fractional bits width
clk: meson: meson8b: add the CPU clock post divider clocks
clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3
clk: meson: clk-regmap: add read-only gate ops
clk: meson: meson8b: allow changing the CPU clock tree
clk: meson: meson8b: run from the XTAL when changing the CPU frequency
clk: meson: meson8b: add support for more M/N values in sys_pll
clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL
clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel
clk: meson: clk-pll: check if the clock is already enabled
clk: meson: meson8b: fix the width of the cpu_scale_div clock
clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table
clk: meson: meson8b: use the HHI syscon if available
dt-bindings: clock: meson8b: use the registers from the HHI syscon
...
* clk-rockchip:
clk: rockchip: add clock-id to gate of ACODEC for rk3328
clk: rockchip: add clock ID of ACODEC for rk3328
clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328
clk: rockchip: fix I2S1 clock gate register for rk3328
clk: rockchip: make rk3188 hclk_vio_bus critical
clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering
clk: rockchip: fix rk3188 sclk_smc gate data
clk: rockchip: fix typo in rk3188 spdif_frac parent
- NXP QorIQ T1023 SoC support
- Introduce a 'protected-clocks' binding for firmware protected clks
- Shrink code some with DEFINE_SHOW_ATTRIBUTE()
* clk-qoriq-t1023:
clk: qoriq: add more chips support
* clk-protected-binding:
clk: qcom: Support 'protected-clocks' property
dt-bindings: clk: Introduce 'protected-clocks' property
* clk-define-show-macro:
clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macro
clk: nomadik: Change to use DEFINE_SHOW_ATTRIBUTE macro
* clk-static:
clk: stm32mp1: drop pointless static qualifier in stm32_register_hw_clk()
This patch adds board specific bindings required for dais, In particular
for compressed dais and dai direction.
Board specific setup involves setting up some of dais as compressed dais
and also specify direction of any dai. Some of the dais might only
support capture/playback depending on the board level wiring.
These two new dt properties will allow such flexibilty at board level dts.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
simple-card and simple-scu-card are very similar driver,
but the former is supporting normal sound card,
the latter is supporting DPCM sound card.
We couldn't use normal sound and DPCM sound in same time by
one sound card. This patch merges both sound card into
simple-card. Now we can use both feature on same driver.
simple-card is now supporting .compatible = "simple-scu-audio-card".
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
audio-graph-card and audio-graph-scu-card are very similar driver,
but the former is supporting normal sound card,
the latter is supporting DPCM sound card.
We couldn't use normal sound and DPCM sound in same sound card by
audio-graph-card.
This patch merges both feature into it on Documentation.
Now we can use both feature on same driver.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Low-Power Clock Gate (LPCG) modules contain a local programming
model to control the clock gates for the peripherals. An LPCG module
is used to locally gate the clocks for the associated peripheral.
Note:
This level of clock gating is provided after the clocks are generated
by the SCU resources and clock controls. Thus even if the clock is
enabled by these control bits, it might still not be running based
on the base resource.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor.
There are many devices out there with this restriction in place
and there has been no update to this firmware since last few years,
making those devices totally unusable for upstream development.
IIDR register value conflicts with other SoCs, using compatible seems
to be the only way to apply quirks required for msm8996 based SoCs.
Without this quirk many qcom SoCs (atleast 3 that I know) are
unable to boot mainline.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Convert trivial-devices.txt to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
The Brownstone board is compatible with "mrvl,mmp2". The actual DTS
already contains the string -- add it to the binding doc as well.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Tegra SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: devicetree@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Convert ZTE SoC bindings to DT schema format using json-schema.
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Add missing description for Ultra96, zcu104, zcu106 and zcu111.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Xilinx SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Convert VIA SoC bindings to DT schema format using json-schema.
Cc: Tony Prisk <linux@prisktech.co.nz>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert ST STi SoC bindings to DT schema format using json-schema.
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert CSR SiRF SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Barry Song <baohua@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert QCom SoC bindings to DT schema format using json-schema.
Acked-by: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert TI NSpire SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert TI Davinci SoC bindings to DT schema format using json-schema.
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
In the past, there have been words on various lists that if LDO3 is
disabled in u-boot, but enabled in the DTS, the axp209 driver would
fail to continue/hang. Several enable/disable patches have been
issues to devicetree's in both the kernel and u-boot to address
this issue.
What really happened however, was that the AXP209 shuts down without
a notice and without setting an interrupt. This is caused when LDO3
gets overloaded, for example with large capacitors on the LDO3 output.
Normally, we would expect that AXP209 would source 200 mA as per
datasheet and set and trigger an interrupt when being overloaded.
For some reason however, this does not happen.
As a work-around, implement software-based 'regulator-soft-start'
property for AXP209 LDO3 regulator, which is used to first bring up
the LDO3 to the lowest possible voltage and then enable the LDO.
After that, we can set the requested voltage as usual.
Combining this setting with the regulator-ramp-delay allows LDO3 to
come up slowly and staggered, potentially reducing overall inrush current.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
The AXP209 supports ramping up voltages on several regulators such as
DCDC2 and LDO3, therefore we can use the standard 'regulator-ramp-delay'
property for those 2 regulators.
Note that the voltage ramp only works when the regulator is already
enabled. E.g. when going from say 0.7 V to 3.6 V.
When turning on the regulator, no voltage ramp is performed in hardware.
What this means, is that if the bootloader brings up the voltage at 0.7 V,
the ramp delay property is properly applied. If however, the bootloader
leaves the power off, no ramp delay is applied when the power is
enabled by the regulator framework.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Convert Calxeda SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Altera SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert ARM Primecell binding to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert ARM timers to DT schema format using json-schema.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert the i2c-gpio binding to DT schema format using json-schema. This
serves as an example of how to include other schema (i2c-controller.yaml
in this case).
Signed-off-by: Rob Herring <robh@kernel.org>
Convert Altera clkmgr to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Add a how-to doc on writing DT schema documentation. This gives a
description of each section and details on how to validate the DT schema
file. The DT schema are written using json-schema vocabulary in a YAML
encoded document. Using jsonschema gives us access to existing tooling.
A YAML encoding gives us something easy to edit. The example is
annotated to help explain what each section does.
This example is just the tip of the iceberg, but is it the part most
developers writing bindings will interact with. Backing all this up
are meta-schema (to validate the binding schemas), some DT core schema,
YAML encoded DT output with dtc, and a small number of python scripts to
run validation.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
This adds the build infrastructure for checking DT binding schema
documents and validating dts files using the binding schema.
Check DT binding schema documents:
make dt_binding_check
Build dts files and check using DT binding schema:
make dtbs_check
Optionally, DT_SCHEMA_FILES can be passed in with a schema file(s) to
use for validation. This makes it easier to find and fix errors
generated by a specific schema.
Currently, the validation targets are separate from a normal build to
avoid a hard dependency on the external DT schema project and because
there are lots of warnings generated.
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Michal Marek <michal.lkml@markovi.net>
Cc: linux-doc@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kbuild@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Added documentation for I2S IP core DT bindings.
Signed-off-by: Maruthi Srinivas Bayyavarapu <maruthi.srinivas.bayyavarapu@xilinx.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Staging graduation
* ad2s90
- Driver for this resolver to digital chip.
New drivers and device support.
* ad5686
- Add support for ad5310r DAC and associated fix in value read back.
* exynos-adc
- Support for S5PV210 which is slightly different from other parts.
* mcp41010
- Driver supporting MCP41010, MCP41050, MCP41100, MCP42010, MCP42050 and
MCP42100 microchip potentiometers.
New ACPI ids.
* ak8975
- AKM9911 ACPI HID.
* kxcjk-1013
- KXJ2109 ACPI HID.
- KIOX010A ACPI HID.
New features
* ad5933
- Explicit DT binding.
* ad2s90
- Explicit DT binding including dropping spi setup that is done via dt
in favour of verifying the settings form DT.
* adt7316
- Explicit DT binding and support for gpio, irq_flags etc.
* stm32-adc
- Runtime power management.
Minor fixes and cleanups
* core
- Protect against missing info structure.
* ad2s90
- SPDX
- Add documentation fo the mutex.
* ad7280a
- Check allocation failure.
- Fix an accidental replacement of an error return.
* adt7316
- Switch some variables to be local and rename for consistency with other
drivers.
- Revert a false handling of 0 as an error introduced earlier this cycle.
* bmi160
- Use devm functions throughout probe() to avoid need for remove().
* hid-sensor-hub
- White space cleanup.
* hts221
- MAINTAINERS entry.
* lis302
- Use generic name in the DT binding doc.
* Messon-saradc
- Check for allocation error.
- Fix some presented clock names that break clk debugfs.
* qcom-spmi-adc
- A fix for initialization of the prescale property. Came late in the
cycle, so merge window is probably the best route for this.
* st_lsm6dsx
- Allow for variable read length to support wider range of slave devices.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAlwRULkRHGppYzIzQGtl
cm5lbC5vcmcACgkQVIU0mcT0FojIIQ/+PSR0V3gW/eXZIoVFcqbjqAYvYQQkK5rH
zOstRvKkgs+gTTB1S+dhTQL80PJBrrfSDRB1E85fJ2hx2kh80k0/zukAG73PsIF0
uqJazrHx5W6WeTj4xmN4rpLRG25DwkCHRMmDdfM6atCVhdz1bYSM56vEGAnXfVMf
fPMbZ7EviN6EnKTtFSPI4F8BhVzesHAzIYGp+DYpMZdqa4nhr2dZyxVuRz3jpPEI
xutODWVKP/0O7vQGBjSlCjx/BMSWGQM5+B0gandKzQULuMwHqi2QMXeD13pxaKQm
Vy2cAEd6YLTGxIHKcw93qCWJjDZz06owvwMHvkoUmPTZXvPavLo+TyYia7rOTzPu
IimDIPf0ci5qIDksxqtSiEzkFDF5YMyfnDJnAC8Ogm98NRC7FNnD5edXsc9sfI23
CBOH5fdGoIV4lNxvuEarnFJ0VdV8ifY8tubrI2l0kf/v0D5tGbcddClFpennkfjf
vjqmkBc2KgD+83SSNgSAcqUKbqxfh4JsXVPpHx8WMLDUA/4S3GcBwVF7fkLqwmCQ
jEuF/zYOoGwvmzDNY1LSkhlWCE16MmXhu0yDQgekA0XLQ2ODynbkV3LQCwdq4dNR
/ZMoBRJ9PSZC35sGkNcFIKm5Nw6Ibl8R1c7WEqxA8vkLhBjJ99CwIsK0M5YcHaak
fCWXUnJzpF4=
=+vyl
-----END PGP SIGNATURE-----
Merge tag 'iio-for-4.21b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
Second set of IIO new device support, features and cleanups for the 4.21 cycle.
Staging graduation
* ad2s90
- Driver for this resolver to digital chip.
New drivers and device support.
* ad5686
- Add support for ad5310r DAC and associated fix in value read back.
* exynos-adc
- Support for S5PV210 which is slightly different from other parts.
* mcp41010
- Driver supporting MCP41010, MCP41050, MCP41100, MCP42010, MCP42050 and
MCP42100 microchip potentiometers.
New ACPI ids.
* ak8975
- AKM9911 ACPI HID.
* kxcjk-1013
- KXJ2109 ACPI HID.
- KIOX010A ACPI HID.
New features
* ad5933
- Explicit DT binding.
* ad2s90
- Explicit DT binding including dropping spi setup that is done via dt
in favour of verifying the settings form DT.
* adt7316
- Explicit DT binding and support for gpio, irq_flags etc.
* stm32-adc
- Runtime power management.
Minor fixes and cleanups
* core
- Protect against missing info structure.
* ad2s90
- SPDX
- Add documentation fo the mutex.
* ad7280a
- Check allocation failure.
- Fix an accidental replacement of an error return.
* adt7316
- Switch some variables to be local and rename for consistency with other
drivers.
- Revert a false handling of 0 as an error introduced earlier this cycle.
* bmi160
- Use devm functions throughout probe() to avoid need for remove().
* hid-sensor-hub
- White space cleanup.
* hts221
- MAINTAINERS entry.
* lis302
- Use generic name in the DT binding doc.
* Messon-saradc
- Check for allocation error.
- Fix some presented clock names that break clk debugfs.
* qcom-spmi-adc
- A fix for initialization of the prescale property. Came late in the
cycle, so merge window is probably the best route for this.
* st_lsm6dsx
- Allow for variable read length to support wider range of slave devices.
* tag 'iio-for-4.21b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (37 commits)
iio: adc: qcom-spmi-adc5: Initialize prescale properly
dt-bindings: iio: adc: exynos-adc: Add S5PV210 variant
iio: adc: Allow selection of Exynos ADC on S5PV210
iio: adc: exynos-adc: Add S5PV210 variant
iio: bmi160: use all devm functions in probe
iio: dac: ad5686: fix bit shift read register
iio:dac:ad5686: Add AD5310R support
Revert "Staging: iio: adt7316: Add an extra check for 'ret' equals to 0"
dt-bindings: iio: accel: use a generic node name for lis302
iio: core: check 'info' value before registering the device
staging: iio: adc: ad7280a: fix overwrite of the returned value
staging: iio: adc: ad7280a: check for devm_kasprint() failure
iio: humidity: hts221: add entry in MAINTAINERS file
iio: magnetometer: ak8975: Add the "AKM9911" ACPI HID
staging:iio:ad2s90: Move out of staging
staging:iio:ad2s90: Add comment to device state mutex
staging:iio:ad2s90: Replace license text w/ SPDX identifier
dt-bindings:iio:resolver: Add docs for ad2s90
staging:iio:ad2s90: Add max frequency check at probe
staging:iio:ad2s90: Remove spi setup that should be done via dt
...
This patch describes the compatible and the device tree
bindings necessary for the MCP16502 PMIC.
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add the DT binding documentation for axg's SPDIF input.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add compatible string for Alwinner suniv F1C100s SoC interrupt
controller which is stripped version of sun4i
Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
The commit adds the device tree binding documentation for the MediaTek DWMAC
found on MediaTek MT2712.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Convert Rockchip SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
[move to per-board entries after confirming with Rob
and added recently added boards]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
Our usual pull request with the changes shared between the H3 and H5 SoCs.
The major changes for this release are:
- Addition of the video engine for the H5
- H3 Camera support
- New board: Emlid Neutis N5, Mapleboard MP130
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXAqJJwAKCRDj7w1vZxhR
xTq4AP9SxrPeKDTBD4mKV+PVuJ2qq919M6o+mcxDkCecEMfbagD+JLkt2uGzdpb8
eC6CuieHvJq1y/akfDpRBf0ZZD0/bw0=
=yRd0
-----END PGP SIGNATURE-----
Merge tag 'sunxi-h3-h5-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3/H5 changes for 4.21
Our usual pull request with the changes shared between the H3 and H5 SoCs.
The major changes for this release are:
- Addition of the video engine for the H5
- H3 Camera support
- New board: Emlid Neutis N5, Mapleboard MP130
* tag 'sunxi-h3-h5-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h5: Add Video Engine node
ARM/arm64: dts: allwinner: Move H3/H5 syscon label over to soc-specific nodes
arm64: dts: allwinner: h5: Add system-control node with SRAM C1
ARM: dts: sun8i: h3: Fix the system-control register range
ARM: dts: sun8i: Add the H3/H5 CSI controller
ARM: dts: sun8i-h3: Add dts for the Mapleboard MP130
arm64: dts: allwinner: new board - Emlid Neutis N5
dt-bindings: vendor-prefix: new vendor - Emlid
ARM: dts: sun8i-h3: add sy8106a to orange pi plus
Signed-off-by: Olof Johansson <olof@lixom.net>
A few patches to enable a new Allwinner SoC based on an armv5 CPU.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXAqCUwAKCRDj7w1vZxhR
xcmLAP9AuTgQD5JiKVImc5Vo3bmgUFY0Afu5+iivBIpqeH9NiwD/U5qjdZ+fvdVz
61l0nMXHL44JazTSI9K1br0roJmxpQA=
=HPpM
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc
Allwinner core changes for 4.21
A few patches to enable a new Allwinner SoC based on an armv5 CPU.
* tag 'sunxi-core-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
dt-bindings: watchdog: Add Allwinner ARMv5 F1C100s wdt
ARM: sunxi: add Allwinner ARMv5 SoCs
dt-bindings: arm: Add new Allwinner ARMv5 F1C100s SoC
ARM: Check ARCH_MULTI_V7 to differentiate ARMv5/v7 Allwinner SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Aisheng that improves SCU power domain bindings by
defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain
driver support on top of it.
- A series from Lucas that updates gpcv2 driver for scalability and
adds i.MX8MQ support into the driver.
- Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power
domain on imx6sx has 7 clocks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcDbkEAAoJEFBXWFqHsHzO1C4H/05Khi/tWF6xZNMw7C4Q6wf6
WIFhB73tTLxZ8W0n8gIS+Y2YKFw6+dy8J/ZpkFBpe+f6rqVsyTzUvGB+6Ii3Nomu
V2juCn8XaHfv32FfaPBCelnitcpgFrnEvXYS6u8mSEt1DSu8rK2y2yMcnrkdcurq
Jy9eAYjUrdXYGsH9uw36mco7q25I5wSnXOLzZ0SLXSqB//a9YlzPKGRmQqF0uQ3t
K8uT5PwqEBrjNAP6sTvSzMf6vSeXD5MGqrEvd/LnGp6IPwx7R+z4Y+HUw/RtTIdg
rP1hAt3PLDD7Ibk+GHH5q/M2+9fI2dn2y44JXGOlQvqdmoLVg1vCpTLEj8OioFU=
=/3Mg
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
i.MX drivers change for 4.21:
- A series from Aisheng that improves SCU power domain bindings by
defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain
driver support on top of it.
- A series from Lucas that updates gpcv2 driver for scalability and
adds i.MX8MQ support into the driver.
- Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power
domain on imx6sx has 7 clocks.
* tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpc: Increase GPC_CLK_MAX to 7
soc: imx: gpcv2: add support for i.MX8MQ SoC
soc: imx: gpcv2: move register access table to domain data
soc: imx: gpcv2: prefix i.MX7 specific defines
firmware: imx: add SCU power domain driver
firmware: imx: add pm svc headfile
dt-bindings: fsl: scu: update power domain binding
firmware: imx: remove resource id enums
dt-bindings: imx: add scu resource id headfile
Signed-off-by: Olof Johansson <olof@lixom.net>
Those patches are all about our SRAM driver, to enable new SoCs: the
F1c100s, the H5 and the A64 C1 SRAM, that is used by the video decoding
engine.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXAqDmQAKCRDj7w1vZxhR
xQxsAPwMd/pS6L2+mRZuBrog4P4PHSHO4cSY76YpYanjygNh6AEAm/IfGtiHaFwe
A4Mjtwmw7Rg/HmvETBlgGLE7aAHppw8=
=UHav
-----END PGP SIGNATURE-----
Merge tag 'sunxi-drivers-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers
Allwinner drivers changes for 4.21
Those patches are all about our SRAM driver, to enable new SoCs: the
F1c100s, the H5 and the A64 C1 SRAM, that is used by the video decoding
engine.
* tag 'sunxi-drivers-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
dt-bindings: sram: Add Allwinner suniv F1C100s
soc: sunxi: sram: Add support for the H5 SoC system control
soc: sunxi: sram: Enable EMAC clock access for H3 variant
soc: sunxi: Change to use DEFINE_SHOW_ATTRIBUTE macro
Signed-off-by: Olof Johansson <olof@lixom.net>
timer and emmc pins) from its first real-world user.
RK3188 improvements (OPPv2, cpu node updates) to prepare for a new
devicetree, the BQ Edison 2 Quad-Core.
VPU device node for rk3288, right now only the jpeg encoder part
will be in the kernel but hopefully other codecs will follow.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlwQw64QHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgRFJB/0WHQQtzWXEtFYxgaoWFAgkK8/Lq2LxDBTa
aMx+slPBqMEpLOP3jfxHRy4C+dL2GX2LgaHPJN1ImwSEjUAfPsfO47LNUBl4w0Sx
t2ulAX/TC4wz5Wa78NsGxaszHgpxmDTYeO7ue1nYJ13YlJZ2MIp/Nr9903rWve6h
hPSzkUVe4Vuiz+KLXchzkRWS13zVhy0t9FyPyhJqzZ4ESDhS74g6cm6wuUB0XHXS
EHvhSvgdMa8x1/2flEIXGUAScAWydiglZcraNr3LmrN6dG8PS/IhbGsxp5KCzMTZ
DAGR47tpbXQ1N5HZEqk30yiYMDN/cNeeo2wF9nR9Df//Bj/AwnI6
=A+kY
-----END PGP SIGNATURE-----
Merge tag 'v4.21-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
RV1108 improvements (uart-dma, clocks, interrupt numbers, gmac support
timer and emmc pins) from its first real-world user.
RK3188 improvements (OPPv2, cpu node updates) to prepare for a new
devicetree, the BQ Edison 2 Quad-Core.
VPU device node for rk3288, right now only the jpeg encoder part
will be in the kernel but hopefully other codecs will follow.
* tag 'v4.21-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add internal timer support for rv1108
ARM: dts: rockchip: add BQ Edison 2 QC devicetree
ARM: dts: rockchip: add VPU device node for RK3288
ARM: dts: rockchip: update cpu supplies on rk3188
ARM: dts: rockchip: add phandles to secondary cpu cores
ARM: dts: rockchip: add cpu-core resets for rk3188
ARM: dts: rockchip: convert rk3188 to opp-v2
ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s
ARM: dts: rockchip: Add UART DMA support for rv1108
ARM: dts: rockchip: Assign the proper GPIO clocks for rv1108
ARM: dts: rockchip: Fix the PMU interrupt number for rv1108
ARM: dts: rockchip: Pass the 'arm,cpu-registers-not-fw-configured' property on rv1108
ARM: dts: rockchip: Pass the 'clock-latency' property on rv1108
ARM: dts: rockchip: Add rv1108 GMAC support
ARM: dts: rockchip: add rv1108 eMMC pin settings
Signed-off-by: Olof Johansson <olof@lixom.net>
- It includes the initial device tree for i.MX7ULP SoC and EVK board
support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcDd7aAAoJEFBXWFqHsHzOgNEIAKc4dqYzWmfJTMnJGO+Bb1Rc
BPkENpRWk6rWVBuxXwN4MTupXIgj96bBHWsg3kplgcthMRAl2wgomHTpNWXk8R9m
Fn6sH9yIoeqr+xs6BzzQ8COrFBXg8CEZgKLgy+9nhfFi3xNf6pN6IQLgqrGF17MC
zFH+sM0rqlh1l3BfHXMuwHvbhw+ms6Qo6z68OGSXmu0bUPThm2FV/Akivqp+INSI
CeFyZ8RMTkEKVSkFEryZaprKgqlIYW2Kl54yeALjvG03mtn1onaZKqsNV7YonYMC
X+mZPLnwjBUnLi2HbKrStmTR0ePQjg5x1tMT+Eco7Cjj4h6H6uBu0IYMi4PiN7o=
=aOId
-----END PGP SIGNATURE-----
Merge tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX7ULP device tree for 4.21:
- It includes the initial device tree for i.MX7ULP SoC and EVK board
support.
* tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx: add imx7ulp evk support
ARM: dts: imx: add common imx7ulp dtsi support
dt-bindings: fsl: add imx7ulp pm related components bindings
dt-bindings: fsl: add compatible for imx7ulp evk
clk: imx: add imx7ulp clk driver
clk: imx: implement new clk_hw based APIs
clk: imx: make mux parent strings const
dt-bindings: clock: add imx7ulp clock binding doc
clk: imx: add imx7ulp composite clk support
clk: imx: add pfdv2 support
clk: imx: add pllv4 support
clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
clk: imx: add gatable clock divider support
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards support: emtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
and vf610 based Liebherr's BK4 device, ZII SCU4 AIB board.
- Add flexcan support for i.MX6UL SoC, turn on stop mode wakeup feature
for flexcan, and enable devices on a few i.MX6 NXP boards.
- Enable AUO G101EVN010 lcd panel and Goodix touch support for
imx6ul-ccimx6ulsbcpro board.
- Enable sensors support for imx6qdl-sabresd board: egalax touch, light,
magnetometer and accelerometer sensor.
- Switch more boards to use SPDX identifier.
- Fix memory node duplication in i.MX device tree sources.
- Correct GIC PPI interrupts mask for i.MX6UL and i.MX7 SoCs.
- Drop 'snps,dw-pcie' compatible from LS1021A PCIe device to avoid
incorrect device matching.
- Add the gpu nodes for the adreno 200 GPU on iMX51 and iMX53, which
are now supported by the freedreno driver.
- Add DCP device support for i.MX6ULL, which requires explicit clock
enabling.
- Add '#thermal-sensor-cells' for thermal device and '#cooling-cells'
for cooling devices.
- Add missing clock information for EPIT on i.MX25 SoC.
- Add PWM and qdma devices for LS1021A SoC.
- Update cooling maps of LS1021A SoC to include all devices affected by
individual trip points.
- Random device addition and cleanup on various boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcDcmeAAoJEFBXWFqHsHzO9uIH/2e87ayMkmIugUt57aJUOWRG
pbNZZQXHsupVVu0VtYnKp3XBuhMXzvbhhihn9x9pyV+EJ2V4dgtU6gS2EDH2G9pl
TCJItVDOZgllamIg2/McVkuQLsH8tEybud4wlWve96eP22mn6CyCPiDtmdvKYigA
QQEFeSI8YgG1VLbXmhmox0HcowOm2C8asw8sSuo15Y2tWjAcCzKK0p3izRJQhSWn
G/uAUwQQB7e2zrTXfTiJpMWEt664C0tqlhZLlfaPpvmufIbDcpbLHp7mK3iW0rZA
Pjr1uT00rpnRkPkLvtT6tKTi2KviCwua1R58aUXW3ju1Fw6DJC1vSuPyNClCuyk=
=dGG8
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree update for 4.21:
- New boards support: emtrion emCON-MX6, imx6ul-pico-pi, imx7d-sdb-reva
and vf610 based Liebherr's BK4 device, ZII SCU4 AIB board.
- Add flexcan support for i.MX6UL SoC, turn on stop mode wakeup feature
for flexcan, and enable devices on a few i.MX6 NXP boards.
- Enable AUO G101EVN010 lcd panel and Goodix touch support for
imx6ul-ccimx6ulsbcpro board.
- Enable sensors support for imx6qdl-sabresd board: egalax touch, light,
magnetometer and accelerometer sensor.
- Switch more boards to use SPDX identifier.
- Fix memory node duplication in i.MX device tree sources.
- Correct GIC PPI interrupts mask for i.MX6UL and i.MX7 SoCs.
- Drop 'snps,dw-pcie' compatible from LS1021A PCIe device to avoid
incorrect device matching.
- Add the gpu nodes for the adreno 200 GPU on iMX51 and iMX53, which
are now supported by the freedreno driver.
- Add DCP device support for i.MX6ULL, which requires explicit clock
enabling.
- Add '#thermal-sensor-cells' for thermal device and '#cooling-cells'
for cooling devices.
- Add missing clock information for EPIT on i.MX25 SoC.
- Add PWM and qdma devices for LS1021A SoC.
- Update cooling maps of LS1021A SoC to include all devices affected by
individual trip points.
- Random device addition and cleanup on various boards.
* tag 'imx-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (82 commits)
ARM: dts: imx51-zii-rdu1: Do not specify "power-gpio" for hpa1
ARM: dts: imx6ul: Remove extra space between node name and brace
ARM: dts: imx6qdl-sabresd: Use GPIO_ACTIVE_HIGH for regulators
ARM: dts: imx6ul: add flexcan support
ARM: dts: imx5: add gpu nodes
ARM: dts: imx6qdl-sabresd: add accelerometer sensor support
ARM: dts: imx6qdl-sabresd: add magnetometer sensor support
ARM: dts: imx6qdl-sabresd: add light sensor support
ARM: dts: imx6qdl-sabresd: Move regulators outside of "simple-bus"
ARM: dts: imx6qdl: Fix memory node duplication
ARM: dts: imx6dl-mamoj: Add a memory node
ARM: dts: imx53-voipac-dmm-668: Fix memory node duplication
ARM: dts: vf610-zii-scu4-aib: Add HI8435 support
ARM: dts: imx6qdl-sabresd: add egalax touch screen support on i2c2 bus
ARM: dts: imx7s: Add flexcan stop mode wakeup support
ARM: dts: imx6ul: Add flexcan stop mode wakeup support
ARM: dts: imx6qdl: Add flexcan stop mode wakeup support
ARM: dts: imx6sx: Add flexcan stop mode wakeup support
ARM: dts: imx6ul-pico: Add the imx6ul-pico-pi variant
ARM: dts: imx6ul-pico-hobbit: Extend peripherals support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Our usual set of arm64 DT changes, with the biggest additions being:
- Support for the video decoding engine in the A64
- Support for the audio codec in the A64
- USB Support in the H6
- HDMI Support in the H6
- EMAC Support in the H6
- New board: Orange Pi Lite2
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXAqGvQAKCRDj7w1vZxhR
xeObAQDZGMVjFjiWlC0jYjBQoCHMf1dlu6iPd4qe8h3GS1XUVQD/c8SJaMj5oLX1
HKjtqQD+sJRUQdcWlwAsqEEKyKUhfQs=
=aAr3
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt64-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner arm64 DT changes for 4.21
Our usual set of arm64 DT changes, with the biggest additions being:
- Support for the video decoding engine in the A64
- Support for the audio codec in the A64
- USB Support in the H6
- HDMI Support in the H6
- EMAC Support in the H6
- New board: Orange Pi Lite2
* tag 'sunxi-dt64-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (27 commits)
arm64: dts: allwinner: a64: Fix up RTC device node and clock references
arm64: dts: allwinner: a64: Add Video Engine node
arm64: dts: allwinner: a64: Add support for the SRAM C1 section
arm64: dts: allwinner: a64: pinebook: enable power supplies
arm64: dts: allwinner: a64: sopine-baseboard: enable power supplies
arm64: dts: allwinner: axp803: add AC and battery power supplies
arm64: dts: allwinner: a64: bananapi-m64: Enable audio codec
arm64: dts: allwinner: a64: enable sound on Pinebook
arm64: dts: allwinner: a64: enable sound on Pine64 and SoPine
arm64: dts: allwinner: a64: add nodes necessary for analog sound support
arm64: dts: allwinner: h6: orangepi: Add device nodes for LEDs
arm64: dts: allwinner: h6: orangepi: Enable USB 2.0 host and OTG ports
arm64: dts: allwinner: h6: orangepi: Add board-wide 5V regulator
arm64: dts: allwinner: h6: fix EMAC compatible string sequence
arm64: dts: allwinner: a64: Add device node for Mali-400 GPU
dt-bindings: gpu: mali-utgard: Add compatible for A64 Mali
arm64: dts: allwinner: h6: enable USB2 on Pine H64
arm64: dts: allwinner: h6: add USB Vbus regulator for Pine H64
arm64: dts: allwinner: h6: add USB2-related device nodes
arm64: dts: allwinner: h6: Enable HDMI output on Pine H64 board
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a quite big pull request this time, with a huge number of changes
(and patches) due to us fixing the vast majority of the DTC warnings our DT
had.
We also have a bunch of other good, more meaningful, changes:
- Support for the new Allwinner T3 (rebranded R40) and f1c100s (armv5)
SoCs
- AXP803 PMIC AC Power supply support
- Rework of the oscillators tree
- Two new boards: the t3-cqa3t-bv3 and Lichee Pi Nano
Plus a few enhancements here and there.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXAqFhwAKCRDj7w1vZxhR
xcQzAQDJu0dPrs3SQlWdDhOa0iFVp/7gmN4iRMxMScIIjrRUgAEAzmhUjQNNTNLc
OPF9XzMdT12rs2SAbk2XXtWH1hN8KQA=
=vSCG
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT changes for 4.21
This is a quite big pull request this time, with a huge number of changes
(and patches) due to us fixing the vast majority of the DTC warnings our DT
had.
We also have a bunch of other good, more meaningful, changes:
- Support for the new Allwinner T3 (rebranded R40) and f1c100s (armv5)
SoCs
- AXP803 PMIC AC Power supply support
- Rework of the oscillators tree
- Two new boards: the t3-cqa3t-bv3 and Lichee Pi Nano
Plus a few enhancements here and there.
* tag 'sunxi-dt-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (84 commits)
ARM: dts: sunxi: Fix PMU compatible strings
ARM: dts: sun8i: r40: Add RTC device node
ARM: dts: sunxi: h3/h5: Fix up RTC device node and clock references
ARM: dts: sun8i: a23/a33: Fix up RTC device node
ARM: dts: sun8i: r40: Add clock accuracy for external oscillators
ARM: dts: sunxi: h3/h5: Add clock accuracy for external oscillators
ARM: dts: sun8i: a33: Drop audio codec oversampling rate to 128 fs
ARM: dts: sun8i: h3: Remove unnecessary reserved memory node
ARM: dts: sun8i: a33: Remove unnecessary reserved memory node
ARM: dts: suniv: Add device tree for Lichee Pi Nano
ARM: dts: suniv: add initial DTSI file for F1C100s
ARM: dts: axp81x: add AC power supply subnode
ARM: dts: sun8i: v3s: Remove skeleton and memory to avoid warnings
ARM: dts: sun8i: v3s: Provide default muxing for relevant controllers
ARM: dts: sun8i: v3s: Change pinctrl nodes to avoid warning
ARM: dts: sun8i: v3s: Change LRADC node names to avoid warnings
ARM: dts: sun8i: h3: Remove leading zeros from unit-addresses
ARM: dts: sun8i: BPI-M2M: Remove i2c nodes
ARM: dts: sun8i: a23/a33: Provide default muxing for relevant controllers
ARM: dts: sunxi: reference: Move the muxing back to the common DTSI
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Add information about new compatible for S5PV210
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Add documentation for regulator modes and suspend states.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Document the bindings.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
So it looks like folks are interested in dwc3 again. Almost 64% of the
changes are in dwc3 this time around with some other bits in gadget
functions and dwc2.
There are two important parts here: a. removal of the waitqueue from
dwc3's dequeue implementation, which will guarantee that gadget
functions can dequeue from any context and; b. better method for
starting isochronous transfers to avoid, as much as possible, missed
isoc frames.
Apart from these, we have the usual set of non-critical fixes and new
features all over the place.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCAA7FiEElLzh7wn96CXwjh2IzL64meEamQYFAlwQ7sQdHGZlbGlwZS5i
YWxiaUBsaW51eC5pbnRlbC5jb20ACgkQzL64meEamQbioA//fSpx5SV7undE1skG
lgjx7Uv2lqnU1kJxhTtyH54tZVhGMmaz4mDVJ3bRk4xotdh3BGQ7nRuui9PDGZmC
81bSjRBVvHXG0xtQQ1AjNc6vTf5h2MVRAZ4U2dp7pkNOgkoWQSakyH3Tz4Brhpfh
UWHLaVYrCb2R68b1pmQbJ6ckSkOu9Wt1yj3SJxvSOkRdbSgb9+khTNZJyyWuGort
zw6pcK33AuLwfOuz7qk8Wihqwi6BOgSrCGU8UfspBRfGhZrw3DSTnS3wYZjdR0QF
2/jwoBwt59i2hpFsMHmMYGU+307oVQ6Y9b/PXpnj4KqIG2CROB8eirDFkToxe4hC
Udy06IA70HUTBKzFmK1gCKZCZW3t2sB+zHtoVHJ8EARlFHWdLxLp83hA9p2Llfon
41iKnkf9CTiO2koEEzuOUOQW+KctIawryiUi4m+C5ZhJBKNk4GvIpXAg1JC9QX9E
GyqEICkg1dvc3GG5HYjPU7xq8mEdcHVOrHoiUci4zo9hMh6nHt7dboNeXQ13LNU9
joEqLvKEhUsm0J7cKWYOpxlHmNWGWNgqRas4Mot9zLUP7yYrxqLT5b2hD3PcjPl4
Jl+rbm4/2YMztWAnCU85EEPwVgJx9k7uyAEtXtQaWUValsVsWUWI1/F//IjYeLZI
AUx1euoarbCp6mXIoHLsOHV02uc=
=n8VS
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
USB changes for v4.21
So it looks like folks are interested in dwc3 again. Almost 64% of the
changes are in dwc3 this time around with some other bits in gadget
functions and dwc2.
There are two important parts here: a. removal of the waitqueue from
dwc3's dequeue implementation, which will guarantee that gadget
functions can dequeue from any context and; b. better method for
starting isochronous transfers to avoid, as much as possible, missed
isoc frames.
Apart from these, we have the usual set of non-critical fixes and new
features all over the place.
* tag 'usb-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (56 commits)
usb: dwc2: Fix disable all EP's on disconnect
usb: dwc3: gadget: Disable CSP for stream OUT ep
usb: dwc2: disable power_down on Amlogic devices
Revert "usb: dwc3: pci: Use devm functions to get the phy GPIOs"
USB: gadget: udc: s3c2410_udc: convert to DEFINE_SHOW_ATTRIBUTE
usb: mtu3: fix dbginfo in qmu_tx_zlp_error_handler
usb: dwc3: trace: add missing break statement to make compiler happy
usb: dwc3: gadget: Report isoc transfer frame number
usb: gadget: Introduce frame_number to usb_request
usb: renesas_usbhs: Use SIMPLE_DEV_PM_OPS macro
usb: renesas_usbhs: Remove dummy runtime PM callbacks
usb: dwc2: host: use hrtimer for NAK retries
usb: mtu3: clear SOFTCONN when clear USB3_EN if work as HS mode
usb: mtu3: enable SETUPENDISR interrupt
usb: mtu3: fix the issue about SetFeature(U1/U2_Enable)
usb: mtu3: enable hardware remote wakeup from L1 automatically
usb: mtu3: remove QMU checksum
usb/mtu3: power down device ip at setup
usb: dwc2: Disable power down feature on Samsung SoCs
usb: dwc3: Correct the logic for checking TRB full in __dwc3_prepare_one_trb()
...
*) Change phy set_mode ops to take both mode and setmode as arguments
*) Add phy_configure() and phy_validate() API's mostly used for MIPI D-PHY
*) Add helpers to get default values of parameters define in MIPI D-PHY spec
*) Add driver for TI's CPSW Port PHY Interface Mode selection
*) Add driver for Cadence Sierra PHY used with USB and PCIe
*) Add driver for Freescale i.MX8MQ USB3 PHY
*) Fixes QMP PHY bindings to allow the clocks provided by the PHY to be
pointed at in device tree
*) Fix for using fully specified regions (in device tree) for configuring
the second lane in dual lane PHYs in QMP PHY
*) Add support for Allwinner H6 USB2 PHY in phy-sun4i-usb driver
*) Update phy-rcar-gen3-usb driver to follow the hardware manual
*) Add support for fine grained power management in mapphone-mdm6600 driver
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEEUXMr/TfP2p4suIY5Dlx4XIBNgtkFAlwQj94OHGtpc2hvbkB0
aS5jb20ACgkQDlx4XIBNgtmYrA/9HK7yfOWfNLJ7DB8bi4yPx5hd657sLohSdDEX
0Pxx9PRuxjLYlaHQh8XbHEdvnLIbbGgnHbfvkkHjxJx272G+QAWMi7/SwF3a2ZpY
ev7U1gvWvCTqS/3RsEmxmwiX9esszcOgya2ia5TcyvTIHLla0QXTOUCmOQBejWhJ
Wfe3siSzxn6O4BITsoRUu+0Ek3bScW/cFdby5B62zBrs912p1qlGx20ihvjywB6I
uR5q1w5DxCbC9KZLTkQgfPXki69r1EaCYzdcEKnUON59OXceIy/TKDx/ewZBOjtR
/d+lWybsLMF5MXIy2UKlaKxLrk4AVdsQ6zmfU23uTqCT3rWn7OPEvbzSj3nBXpgi
SNzBTt9wHT4ZAGOq4fmhgF1Gn1gx4tEcarvAfeyyzv1riVgGbwlxSaUpWWvkya/E
zDBqROi/9VU+WX+De+E2KTCAOjJpcnVpLx8euA7uSD2m0nF4Kp4YiyAJiH/ZDQba
ghhR4DiD1xhjO77U+tM7mD+68ZyKsQubqzO+h4rztjZ/QRCWqGtOCg9sSQBxSz86
llEklLB3156dkLnHRMd0NIuSqYGOkHLWdTBrXNr2HaK7ZWvN6jxhC2puziIlmIZl
8m94QyY5pmuTJdQsWA/MEoWFglQqLBDxAVuoMH4d/XFx7PBNxiaTGOOEgX7MhfVM
9di9hak=
=JLIJ
-----END PGP SIGNATURE-----
Merge tag 'phy-for-4.21_v1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
phy: for 4.21
*) Change phy set_mode ops to take both mode and setmode as arguments
*) Add phy_configure() and phy_validate() API's mostly used for MIPI D-PHY
*) Add helpers to get default values of parameters define in MIPI D-PHY spec
*) Add driver for TI's CPSW Port PHY Interface Mode selection
*) Add driver for Cadence Sierra PHY used with USB and PCIe
*) Add driver for Freescale i.MX8MQ USB3 PHY
*) Fixes QMP PHY bindings to allow the clocks provided by the PHY to be
pointed at in device tree
*) Fix for using fully specified regions (in device tree) for configuring
the second lane in dual lane PHYs in QMP PHY
*) Add support for Allwinner H6 USB2 PHY in phy-sun4i-usb driver
*) Update phy-rcar-gen3-usb driver to follow the hardware manual
*) Add support for fine grained power management in mapphone-mdm6600 driver
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-4.21_v1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (30 commits)
phy: qcom-qmp: Expose provided clocks to DT
dt-bindings: phy-qcom-qmp: Move #clock-cells to child
phy: qcom-qmp: Utilize fully-specified DT registers
dt-bindings: phy-qcom-qmp: Fix register underspecification
phy: ti: fix semicolon.cocci warnings
phy: dphy: Add configuration helpers
phy: Add MIPI D-PHY configuration options
phy: Add configuration interface
phy: Add MIPI D-PHY mode
phy: add driver for Freescale i.MX8MQ USB3 PHY
dt-bindings: phy: add binding for Freescale i.MX8MQ USB3 PHY
phy: Use of_node_name_eq for node name comparisons
net: ethernet: ti: cpsw: add support for port interface mode selection phy
dt-bindings: net: ti: cpsw: switch to use phy-gmii-sel phy
phy: ti: introduce phy-gmii-sel driver
dt-bindings: phy: add cpsw port interface mode selection phy bindings
phy: mvebu-cp110-comphy: fix spelling in structure name
phy: mapphone-mdm6600: Improve phy related runtime PM calls
phy: renesas: rcar-gen3-usb2: follow the hardware manual procedure
phy: cadence: Add driver for Sierra PHY
...
The phy-qcom-qmp bindings specified #clock-cells as 1. This was never used
because of_clk_add_provider() was never called, so there was no way anybody
could reference these clocks from DT. Furthermore, even if they could be
accessed, the bindings never specified what should go in that additional
cell.
Fix these incomplete and broken bindings. Move the #clock-cells into the
child node, since that is the actual clock provider, and not all
instances of qcom-qmp-phy are clock providers. Also set #clock-cells to
zero, since there's nothing to pass to it.
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Add register regions for the second lane of dual-lane nodes.
This additional specification is needed so that the driver can stop
reaching beyond the tx and rx register allocations to get at the
second lane registers in a dual-lane PHY.
While in there, document #clock-cells as optional for PHYs that don't
provide a pipe clock. Also, document the pcs_misc register region, which
was being quietly supplied and used.
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This adds the binding for the USB3 PHY found on the i.MX8M SoC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The cpsw-phy-sel driver was replaced with new PHY driver phy-gmii-sel, so
deprecate cpsw-phy-sel bindings and update CPSW binding to use phy-gmii-sel
PHY bindings.
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Add DT binding documentation for Sierra PHY. The PHY supports
a number of different protocols, including PCIe and USB.
The PHY lanes may be configured as single or multi-lane links.
Each link is treated as a separate sub-node. For example, if
there are 4 lanes in total the first 2 might be configured as
a multi-lane PCIe link while the other two are single lane
USB links, and in this case there would be 3 sub-nodes.
There are two resets for the PHY block (one for APB register
access, one for the PHY link) and separate resets for each
link. For multi-lane links, the reset corresponds to the
reset line on the master lane, the resets on other lanes
have no effect.
Signed-off-by: Alan Douglas <adouglas@cadence.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The USB2.0 PHY on Allwinner H6 is similar to the ones on the ones on
older SoCs, but with holes in PHY number (USB1 and USB2 are missing, in
which USB1 is a USB3 PHY).
Add binding for the PHY.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
The "at," prefix was never correct for Atmel, so fix the few occurrences
that got it wrong. Use "atmel," instead.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Acked-by: Peter Rosin <peda@axentia.se>
[wsa: merged two patches into one, dropped 'trivial-devices' hunk which
needs to go in seperately]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Add support for the internal timer peripheral on RV1108.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Allow the PHY drivers to get the ref clock from the DT.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Document the new amd,imageon compatible, used for non-qcom hardware that
uses the drm/msm driver (iMX5).
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
This allows controlling which of the 8 lanes are used for 6 bit color.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
This contains a few cleanups of and additions to existing device tree
bindings, such as XUSB, EMC, PMC and thermal.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlwKfkQTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoapRD/0dpJfxARsf0gH8vzO2MSQrUFaXFxPF
9C86G5RzoVGTbEXwLQoOH9k73Cup+eyjnlMcMXHHTkuINJhi5Bil+6lyztCa/P/n
4z5mZeMfv7LZaHq+/nUHSD0qjzSkz5ZaKdEXTZNijb4hjQE7x5zphOrYd4OLNrOF
1nfhHkLjmTW77cJCkG+70OQ4MP+hBQg8sHcbDrfTD5bweVb3ZcD7Bp81w4gKLrdk
K4/DYxHBfzL2Y6JCgVtvHfgrWkw3cfOzznnfuHkC37OvYSVFdgkpkSNr6V+a+dQ1
AcCJ5RIyZsSSVatQT9j/QexE/eLYQUvCN/hM1VG1hZv3QFnGpTgTuF1zEw3v4rjF
dN7a8OC2jkmaueQIFFHPiUgpq16FL4Tixu8DKDrU+KHmM9JJZC4PgP+5N+NdVGmq
VAEjHUIgbKSToyePdic24MCuJ8TCWB75IWVw9zPLmcmQiJMTzWVwLuiEnd3/dYuW
pqgrj31e30BJQ6Sgs1nKKrg6MRS0RNjaelTXhJP07P7IMgtec7xEhDlZQY6SQssV
Us8M2IYSRiUocynykJCeNCkve22X2Cmtc2q68jsWhKDf/HZM8fgjbatetNDJNfFz
Zr48QSyIGcp0Uba+M0LpeIHDDasgtE/YUjkNOOHc7cap2yK45L0/5E/iosXA3H1m
VAI1vmcNJFTmcw==
=3PUd
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.21-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
dt-bindings: Changes for v4.21-rc1
This contains a few cleanups of and additions to existing device tree
bindings, such as XUSB, EMC, PMC and thermal.
* tag 'tegra-for-4.21-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: tegra186-pmc: Add interrupt controller properties
dt-bindings: thermal: tegra-bpmp: Add Tegra194 support
dt: bindings: Move tegra20-emc binding to memory-controllers directory
dt: bindings: tegra20-emc: Document clock property
dt: bindings: tegra20-emc: Document interrupt property
dt-bindings: usb: xhci-tegra: Add power-domain details
Signed-off-by: Olof Johansson <olof@lixom.net>
* Move 'renesas,prr' binding to its own document
- Prepration for converting board-level bindings to json-schema
* Document iW-RainboW-G20D-Qseven-RZG1N board and iWave RZ/G1N SOM
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlwJecUACgkQ189kaWo3
T7510w//U1h7Z/B2PjYArQiUKPWtXYfEVkda9lrmWGImknJTioadoMYN9paTHLJU
w9SFAZpVan9QEzUZ19GKjJau7FEP798/YZHqL4+pxNLuGltJZ7a6CtBefxwqOnj0
QZJhqBBKl7Su76a96BgjN4m7uMPARES49LdngXJ8Ob4SM0EnJsUf4FPyaksnpMJ5
i0mm+KlmBinmkqmq9lBb8vcRoHY5zqkpiN2JUudJ7ooFhfHJzFwBdCGNIxUcikFi
SDfeH7qb8ofpRp1Xa6G21835afllKc0lR2fgB7KxrVVtbAF8OmGcFJfjRYVIY6sF
XSV8g9Vj0hjcbuQVXiBbZiJuw/1cXg/Pl1bhsoSZu1I4XojDv0QlP6OOB785VRxB
lsLfxf1GcucuvPa++fg/8YZDiA/ZVkUKwSmLS+u9Zn1acUw9c+nrC94+tW+lyzdt
628pKwBZwTnEkwq87BQgyVP8KOjL11Z6ytd1pQMZCLHItWazWi3FGFRoDdAT8Vap
rELg1t84o0zO9ozclW0vlCBp0bERplq0lRm1XDztWVcIFv27eCfPML4dLVVjoMJ7
0n/kuovzCtEiozF6rY3M3ESp4+Ah6yxZG43CEV6Q2nsi6d2iSPovpkcAeKpBij0a
WPRnKEhToJGtjS56fW9gRXe4poxdON0GshXQif+wnS31RTpNva8=
=BGWx
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-bindings-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Bindings Updates for v4.21
* Move 'renesas,prr' binding to its own document
- Prepration for converting board-level bindings to json-schema
* Document iW-RainboW-G20D-Qseven-RZG1N board and iWave RZ/G1N SOM
* tag 'renesas-dt-bindings-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
dt-bindings: arm: renesas: Move 'renesas,prr' binding to its own doc
dt-bindings: arm: renesas: Document iW-RainboW-G20D-Qseven-RZG1N board
dt-bindings: arm: renesas: Document iWave RZ/G1N SOM
Signed-off-by: Olof Johansson <olof@lixom.net>
The status quo on i.MX6 is that if "over-current-active-high" is
specified in the device tree this is configured as expected. If
the property is missing polarity isn't changed and so the
polarity is kept as setup by the bootloader. Reset default is
active high, so active low can only be used with help by the
bootloader. On i.MX7 it is similar, but there disabling of
over current detection has a similar inconsistency.
This patch introduces a new property that allows to explicitly
configure for active low over current detection and consistently
sets this up. In the absence of an explicit configuration the
bit is kept as is. On i.MX7 over current detection is used unless
disabled in the device tree.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For USB HSIC, the data and strobe pin needs to be pulled down
at default, we consider it as "idle" state. When the USB host
is ready to be used, the strobe pin needs to be pulled up,
we consider it as "active" state.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The pcf85263 RTC is compatible with the pcf85363 RTC.
The difference between the pcf85263 and pcf85363 RTC is that the latter has
64 bytes more RAM. This renders them incompatible from a DT point of view.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The example should follow the practice or using a generic node name
instead of the precise programming model, as recommended by the DTSpec.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add optional reset GPIO, as such a signal is available on the KSZ switches.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Woojung Huh <Woojung.Huh@microchip.com>
Cc: David S. Miller <davem@davemloft.net>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
When specifying external clock inputs to the CCM the current code
requires the clocks to be in a "clocks" child node of the DT root.
This is not really conformant with DT best practices.
To avoid the need to deviate from those best practices, allow the
clock inputs to be specified via standard clock handles. This is
in line with how drivers of the later CCM driver revisions on
newer i.MX SoCs handle this.
As we can't retroactively change the DT binding, allow this as an
option with a fallback to the old way of how this has been handled.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add new compatible to the device tree bindings.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Several conflicts, seemingly all over the place.
I used Stephen Rothwell's sample resolutions for many of these, if not
just to double check my own work, so definitely the credit largely
goes to him.
The NFP conflict consisted of a bug fix (moving operations
past the rhashtable operation) while chaning the initial
argument in the function call in the moved code.
The net/dsa/master.c conflict had to do with a bug fix intermixing of
making dsa_master_set_mtu() static with the fixing of the tagging
attribute location.
cls_flower had a conflict because the dup reject fix from Or
overlapped with the addition of port range classifiction.
__set_phy_supported()'s conflict was relatively easy to resolve
because Andrew fixed it in both trees, so it was just a matter
of taking the net-next copy. Or at least I think it was :-)
Joe Stringer's fix to the handling of netns id 0 in bpf_sk_lookup()
intermixed with changes on how the sdif and caller_net are calculated
in these code paths in net-next.
The remaining BPF conflicts were largely about the addition of the
__bpf_md_ptr stuff in 'net' overlapping with adjustments and additions
to the relevant data structure where the MD pointer macros are used.
Signed-off-by: David S. Miller <davem@davemloft.net>
Document the compatible strings for emtrion emCON-MX6 SoM's.
Signed-off-by: Jan Tuerk <jan.tuerk@emtrion.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Removed the compatible string "snps,dw-pcie", it is for the reference
platform driver for PCI RC IP Protoyping Kits based on the ARC SDP,
so it is not suitable for all platform with designware PCIe controller,
and platform vendors have themselves' drivers.
The compatible string "snsp,dw-pcie" was added by mistake and it's not
matched that time, but it is matched because PCIe drivers has been
collected recently.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PCIe compatible string for LS1043A was lost, so add it.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- Introduce protected-clock DT binding to fix breakage on qcom sdm845-mtp
boards where the qspi clks introduced this merge window cause the
firmware on those boards to take down the system if we try to read
the clk registers
- Fix a couple off-by-one errors found by Dan Carpenter
- Handle failure in zynq fixed factor clk driver to avoid using
uninitialized data
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlwLBpERHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSUmVRAAuswyoavqTsj09/lhEeM1w8f+2QlnCFb2
6kUuVYmQP35u2MhuXv0sHwe1Gnnf5dL4r1d2TwCdZDTJxGIT6lbkLmeKxJzeAJzO
TgVCSNxTfwNyAAY16tFSdY3sigjQCFL+0LrKTh8ID6Ub05xz2NUZ17d0eC8WTsn1
6O66QBzCOAWvJ6LO8ktnpLpRUQAoECjKs9Vn2bnpBV+jxnuqthaD6LbK/snzNgI1
NE+CKeFjs1bFP4WiXUn7HATw+GQxmMN3MOB9KSd36OILQYA5eMYS0voJW6V/LmJv
5HImYCPc+vBhptLWflzQrbGmGV57zTH3V6OVXd0BD/tBxbIF/l56Xpv8YDC0ahe3
RklehCka/o+cF7O9/sRLwLKKNYVNJs+JOX+MxJ3Pv/ANMaeZepMtTII38IcJFKQS
aVXKbAwHvxWDI88PmdykO2gS5Nu6sdjkriQ63FdvRFL9UmnCTl3ruk/9Ww8aV04v
cwwHJlw6sHVcRnzHJidh3UAyvEY8cSD9nbS2zV+xbiw1nR3S94hTx05N4UCc2Q/6
7dRlZ9B+STni4YOnQlU0u6ApICrZEkcZk30dW7bX154x9WKbX7yusOCrpHa2Bx5b
xvdNmuiSjNjLjmi2ZR0nFF/DAhBW9dAva/keeV7IC0Gilakgp33/MvUiLPFZ0piz
5/vCWZx88FY=
=t1kp
-----END PGP SIGNATURE-----
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd:
"A few clk driver fixes this time:
- Introduce protected-clock DT binding to fix breakage on qcom
sdm845-mtp boards where the qspi clks introduced this merge window
cause the firmware on those boards to take down the system if we
try to read the clk registers
- Fix a couple off-by-one errors found by Dan Carpenter
- Handle failure in zynq fixed factor clk driver to avoid using
uninitialized data"
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: zynqmp: Off by one in zynqmp_is_valid_clock()
clk: mmp: Off by one in mmp_clk_add()
clk: mvebu: Off by one bugs in cp110_of_clk_get()
arm64: dts: qcom: sdm845-mtp: Mark protected gcc clocks
clk: qcom: Support 'protected-clocks' property
dt-bindings: clk: Introduce 'protected-clocks' property
clk: zynqmp: handle fixed factor param query error
The example should follow the practice or using a generic node name
instead of the precise programming model, as recommended by the DTSpec.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This introduces two new compatibles for the cedrus driver, for the
A64 and H5 platforms.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Add the R8A77980 SoC support to the R-Car VIN driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Add the R-Car V3H (AKA R8A77980) SoC support to the R-Car CSI2 driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
From LPC18xx and LPC43xx User Manuals the GPIO controller consists of
the following weakly connected blocks:
* GPIO pin interrupt block at 0x40087000,
* GPIO GROUP0 interrupt block at 0x40088000,
* GPIO GROUP1 interrupt block at 0x40089000,
* GPIO port block at 0x400F4000.
While all 4 sub-controller blocks have their own I/O addresses, moreover
all 3 interrupt blocks are APB0 peripherals and high-speed GPIO block is
an AHB slave, according to the hardware manual interrupt controllers and
GPIO controller block are seen as a single device, all 4 sub-controllers
have the shared reset signal RGU #28 and the same shared clock to access
registers CLK_Mx_GPIO on CCU1.
The change adds descriptions of the currently missing interrupt controller
blocks found on GPIO controller, new added properties are 'reg-names',
'resets', 'interrupt-controller' and '#interrupt-cells', also the example
is updated to reflect the changes in device tree binding description.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The register range for the RTC extends beyond 0x54.
Use the size from the user manual's memory map instead.
Fixes: 9765d2d943 ("rtc: sun6i: Add sun6i RTC driver")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add device tree bindings associating Arm TrustZone CryptoCell 703 with the
ccree driver.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Update the PSPI NPCM binding document of the spi aliases use
to define the spi ID number.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bindings should use 'reset-gpios', not 'reset-gpio'. The driver needs to
switch to the gpiod consume API to handle this correctly.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bindings should use 'reset-gpios', not 'reset-gpio'. The driver needs to
switch to the gpiod consume API to handle this correctly.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Document the iW-RainboW-G20D-Qseven-RZG1N device tree bindings,
listing it as a supported board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Document the iW-RainboW-G20M-RZ/G1N Qseven device tree bindings,
listing it as a supported system on module.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Experiments showed that on at least the H3/H5/A64 the RTC's internal
oscillator also feeds the CPUS mux in the PRCM.
Export this clock through the device tree, instead of having to use
a dummy fixed-clock device node, for the PRCM to consume. This will
properly describe the relationship between the clocks.
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The A31 does not have an external clock output directly from the RTC.
Instead, it has four muxable clock outputs: three (A, B, C) are
controlled from the CCU, and the last (D) is controlled from the PRCM.
Deprecate the usage of the external clock output for the A31 compatible.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>