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5 Commits

Author SHA1 Message Date
Ralf Baechle
7034228792 MIPS: Whitespace cleanup. 
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2013-02-01 10:00:22 +01:00
Ralf Baechle
bdf20507da MIPS: PMC-Sierra Yosemite: Remove support. 
Nobody seems to be interested anymore and upstream also never had an
ethernet driver.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-12-13 18:15:30 +01:00
Ralf Baechle
475032564e MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required. 
Most supported systems currently hardwire cpu_has_dsp to 0, so we also
can disable support for cpu_has_dsp2 resulting in a slightly smaller
kernel.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-10-11 11:10:43 +02:00
Ralf Baechle
8d9df29db2 MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions. 
Previously it was unconditionally used on all Sibyte family SOCs.  The
M3 bug has to be handled in the TLB exception handler which is extremly
performance sensitive, so this modification is expected to deliver around
2-3% performance improvment.  This is important as required changes to the
M3 workaround will make it more costly.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2010-04-12 17:26:19 +01:00
Ralf Baechle
384740dc49 MIPS: Move headfiles to new location below arch/mips/include 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2008-10-11 16:18:52 +01:00