0a7f9238f3
[ Upstream commit5831fc1fd4] If the queue isolation feature is enabled, the number of queues supported by the device changes. When PF is enabled using the current default number of queues, the default number of queues may be greater than the number supported by the device. As a result, the PF fails to be bound to the driver. After modification, if queue isolation feature is enabled, when the default queue parameter is greater than the number supported by the device, the number of enabled queues will be changed to the number supported by the device, so that the PF and driver can be properly bound. Fixes:8bbecfb402("crypto: hisilicon/qm - add queue isolation support for Kunpeng930") Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Sasha Levin <sashal@kernel.org>
87 lines
1.3 KiB
C
87 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2022 HiSilicon Limited. */
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#ifndef QM_COMMON_H
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#define QM_COMMON_H
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#define QM_DBG_READ_LEN 256
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struct qm_cqe {
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__le32 rsvd0;
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__le16 cmd_id;
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__le16 rsvd1;
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__le16 sq_head;
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__le16 sq_num;
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__le16 rsvd2;
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__le16 w7;
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};
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struct qm_eqe {
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__le32 dw0;
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};
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struct qm_aeqe {
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__le32 dw0;
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};
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struct qm_sqc {
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__le16 head;
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__le16 tail;
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__le32 base_l;
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__le32 base_h;
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__le32 dw3;
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__le16 w8;
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__le16 rsvd0;
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__le16 pasid;
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__le16 w11;
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__le16 cq_num;
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__le16 w13;
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__le32 rsvd1;
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};
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struct qm_cqc {
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__le16 head;
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__le16 tail;
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__le32 base_l;
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__le32 base_h;
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__le32 dw3;
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__le16 w8;
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__le16 rsvd0;
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__le16 pasid;
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__le16 w11;
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__le32 dw6;
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__le32 rsvd1;
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};
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struct qm_eqc {
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__le16 head;
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__le16 tail;
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__le32 base_l;
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__le32 base_h;
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__le32 dw3;
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__le32 rsvd[2];
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__le32 dw6;
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};
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struct qm_aeqc {
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__le16 head;
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__le16 tail;
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__le32 base_l;
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__le32 base_h;
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__le32 dw3;
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__le32 rsvd[2];
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__le32 dw6;
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};
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static const char * const qm_s[] = {
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"init", "start", "close", "stop",
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};
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void *hisi_qm_ctx_alloc(struct hisi_qm *qm, size_t ctx_size,
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dma_addr_t *dma_addr);
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void hisi_qm_ctx_free(struct hisi_qm *qm, size_t ctx_size,
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const void *ctx_addr, dma_addr_t *dma_addr);
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void hisi_qm_show_last_dfx_regs(struct hisi_qm *qm);
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void hisi_qm_set_algqos_init(struct hisi_qm *qm);
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#endif
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