a55c8ff252
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's another path that needs to be handled to ensure MDSS functions properly, namely the "reg bus", a.k.a the CPU-MDSS interconnect. Gating that path may have a variety of effects, from none to otherwise inexplicable DSI timeouts. Provide a way for MDSS driver to vote on this bus. A note regarding vote values. Newer platforms have corresponding bandwidth values in the vendor DT files. For the older platforms there was a static vote in the mdss_mdp and rotator drivers. I choose to be conservative here and choose this value as a default. Co-developed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/570164/ Link: https://lore.kernel.org/r/20231202224247.1282567-5-dmitry.baryshkov@linaro.org
29 lines
594 B
C
29 lines
594 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2018, The Linux Foundation
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*/
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#ifndef __MSM_MDSS_H__
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#define __MSM_MDSS_H__
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struct msm_mdss_data {
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u32 ubwc_enc_version;
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/* can be read from register 0x58 */
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u32 ubwc_dec_version;
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u32 ubwc_swizzle;
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u32 ubwc_static;
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u32 highest_bank_bit;
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u32 macrotile_mode;
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u32 reg_bus_bw;
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};
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#define UBWC_1_0 0x10000000
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#define UBWC_2_0 0x20000000
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#define UBWC_3_0 0x30000000
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#define UBWC_4_0 0x40000000
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#define UBWC_4_3 0x40030000
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const struct msm_mdss_data *msm_mdss_get_mdss_data(struct device *dev);
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#endif /* __MSM_MDSS_H__ */
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