917e9b7c23
This reverts commit abe2023b4cea192ab266b351fd38dc9dbd846df0. Changing the locking order means that scheduler/msm_job_run() can race with the recovery kthread worker, with the result that the GPU gets an extra runpm get when we are trying to power it off. Leaving the GPU in an unrecovered state. I'll need to come up with a different scheme for appeasing lockdep. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/573835/
137 lines
3.1 KiB
C
137 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#include "msm_ringbuffer.h"
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#include "msm_gpu.h"
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static uint num_hw_submissions = 8;
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MODULE_PARM_DESC(num_hw_submissions, "The max # of jobs to write into ringbuffer (default 8)");
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module_param(num_hw_submissions, uint, 0600);
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static struct dma_fence *msm_job_run(struct drm_sched_job *job)
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{
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struct msm_gem_submit *submit = to_msm_submit(job);
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struct msm_fence_context *fctx = submit->ring->fctx;
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struct msm_gpu *gpu = submit->gpu;
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struct msm_drm_private *priv = gpu->dev->dev_private;
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int i;
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msm_fence_init(submit->hw_fence, fctx);
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mutex_lock(&priv->lru.lock);
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for (i = 0; i < submit->nr_bos; i++) {
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struct drm_gem_object *obj = submit->bos[i].obj;
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msm_gem_unpin_active(obj);
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}
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submit->bos_pinned = false;
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mutex_unlock(&priv->lru.lock);
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/* TODO move submit path over to using a per-ring lock.. */
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mutex_lock(&gpu->lock);
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msm_gpu_submit(gpu, submit);
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mutex_unlock(&gpu->lock);
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return dma_fence_get(submit->hw_fence);
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}
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static void msm_job_free(struct drm_sched_job *job)
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{
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struct msm_gem_submit *submit = to_msm_submit(job);
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drm_sched_job_cleanup(job);
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msm_gem_submit_put(submit);
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}
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static const struct drm_sched_backend_ops msm_sched_ops = {
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.run_job = msm_job_run,
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.free_job = msm_job_free
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};
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struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
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void *memptrs, uint64_t memptrs_iova)
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{
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struct msm_ringbuffer *ring;
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long sched_timeout;
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char name[32];
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int ret;
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/* We assume everwhere that MSM_GPU_RINGBUFFER_SZ is a power of 2 */
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BUILD_BUG_ON(!is_power_of_2(MSM_GPU_RINGBUFFER_SZ));
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ring = kzalloc(sizeof(*ring), GFP_KERNEL);
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if (!ring) {
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ret = -ENOMEM;
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goto fail;
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}
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ring->gpu = gpu;
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ring->id = id;
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ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ,
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check_apriv(gpu, MSM_BO_WC | MSM_BO_GPU_READONLY),
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gpu->aspace, &ring->bo, &ring->iova);
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if (IS_ERR(ring->start)) {
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ret = PTR_ERR(ring->start);
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ring->start = NULL;
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goto fail;
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}
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msm_gem_object_set_name(ring->bo, "ring%d", id);
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ring->end = ring->start + (MSM_GPU_RINGBUFFER_SZ >> 2);
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ring->next = ring->start;
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ring->cur = ring->start;
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ring->memptrs = memptrs;
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ring->memptrs_iova = memptrs_iova;
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/* currently managing hangcheck ourselves: */
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sched_timeout = MAX_SCHEDULE_TIMEOUT;
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ret = drm_sched_init(&ring->sched, &msm_sched_ops, NULL,
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DRM_SCHED_PRIORITY_COUNT,
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num_hw_submissions, 0, sched_timeout,
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NULL, NULL, to_msm_bo(ring->bo)->name, gpu->dev->dev);
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if (ret) {
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goto fail;
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}
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INIT_LIST_HEAD(&ring->submits);
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spin_lock_init(&ring->submit_lock);
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spin_lock_init(&ring->preempt_lock);
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snprintf(name, sizeof(name), "gpu-ring-%d", ring->id);
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ring->fctx = msm_fence_context_alloc(gpu->dev, &ring->memptrs->fence, name);
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return ring;
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fail:
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msm_ringbuffer_destroy(ring);
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return ERR_PTR(ret);
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}
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void msm_ringbuffer_destroy(struct msm_ringbuffer *ring)
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{
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if (IS_ERR_OR_NULL(ring))
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return;
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drm_sched_fini(&ring->sched);
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msm_fence_context_free(ring->fctx);
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msm_gem_kernel_put(ring->bo, ring->gpu->aspace);
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kfree(ring);
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}
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