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Thomas Gleixner f121ab7f4a irqchip updates for 6.5

- A number of Loogson/Loogarch fixes
 
 - Allow the core code to retrigger an interrupt that has
   fired while the same interrupt is being handled on another
   CPU, papering over a GICv3 architecture issue
 
 - Work around an integration problem on ASR8601, where the CPU
   numbering isn't representable in the GIC implementation...
 
 - Add some missing interrupt to the STM32 irqchip
 
 - A bunch of warning squashing triggered by W=1 builds
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Merge tag 'irqchip-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates from Marc Zyngier:

  - A number of Loogson/Loogarch fixes

  - Allow the core code to retrigger an interrupt that has
    fired while the same interrupt is being handled on another
    CPU, papering over a GICv3 architecture issue

  - Work around an integration problem on ASR8601, where the CPU
    numbering isn't representable in the GIC implementation...

  - Add some missing interrupt to the STM32 irqchip

  - A bunch of warning squashing triggered by W=1 builds

Link: https://lore.kernel.org/r/20230623224345.3577134-1-maz@kernel.org

2023-06-26 11:05:49 +02:00

affinity.c

genirq/affinity: Move group_cpus_evenly() into lib/

2023-01-17 18:50:06 +01:00

autoprobe.c

genirq: Delay deactivation in free_irq()

2019-07-03 10:12:28 +02:00

chip.c

irqchip updates for 6.5

2023-06-26 11:05:49 +02:00

cpuhotplug.c

sched/isolation: Use single feature type while referring to housekeeping cpumask