Markos Chandras 0038df2240 MIPS: asm: atomic: Update ISA constraints for MIPS R6 support ...

MIPS R6 changed the opcodes for LL/SC instructions so we need to
set the correct ISA level.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

2015-02-17 15:37:22 +00:00

..

asm

MIPS: asm: atomic: Update ISA constraints for MIPS R6 support

2015-02-17 15:37:22 +00:00

uapi/asm

MIPS: mm: Add MIPS R6 instruction encodings

2015-02-16 14:02:50 +00:00