7590014066
Upon NIXLF_ALLOC install a unicast forwarding rule in NPC MCAM like below - Match pkt DMAC with NIXLF attached PF/VF's MAC address. - Ingress channel - Action is UCAST - Forward to PF_FUNC of this NIXLF And broadcast pkt forwarding rule as - Match L2B bit in MCAM search key - Ingress channel - Action is UCAST, for now, later it will be changed to MCAST. Only PFs can install this rule Upon NIXLF_FREE disable all MCAM entries in use by that NIXLF. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
263 lines
4.8 KiB
C
263 lines
4.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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* Marvell OcteonTx2 RVU Admin Function driver
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*
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* Copyright (C) 2018 Marvell International Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef NPC_H
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#define NPC_H
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enum NPC_LID_E {
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NPC_LID_LA = 0,
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NPC_LID_LB,
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NPC_LID_LC,
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NPC_LID_LD,
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NPC_LID_LE,
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NPC_LID_LF,
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NPC_LID_LG,
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NPC_LID_LH,
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};
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#define NPC_LT_NA 0
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enum npc_kpu_la_ltype {
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NPC_LT_LA_8023 = 1,
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NPC_LT_LA_ETHER,
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};
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enum npc_kpu_lb_ltype {
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NPC_LT_LB_ETAG = 1,
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NPC_LT_LB_CTAG,
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NPC_LT_LB_STAG,
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NPC_LT_LB_BTAG,
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NPC_LT_LB_QINQ,
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NPC_LT_LB_ITAG,
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};
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enum npc_kpu_lc_ltype {
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NPC_LT_LC_IP = 1,
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NPC_LT_LC_IP6,
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NPC_LT_LC_ARP,
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NPC_LT_LC_RARP,
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NPC_LT_LC_MPLS,
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NPC_LT_LC_NSH,
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NPC_LT_LC_PTP,
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NPC_LT_LC_FCOE,
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};
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/* Don't modify Ltypes upto SCTP, otherwise it will
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* effect flow tag calculation and thus RSS.
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*/
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enum npc_kpu_ld_ltype {
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NPC_LT_LD_TCP = 1,
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NPC_LT_LD_UDP,
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NPC_LT_LD_ICMP,
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NPC_LT_LD_SCTP,
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NPC_LT_LD_IGMP,
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NPC_LT_LD_ICMP6,
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NPC_LT_LD_ESP,
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NPC_LT_LD_AH,
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NPC_LT_LD_GRE,
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NPC_LT_LD_GRE_MPLS,
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NPC_LT_LD_GRE_NSH,
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NPC_LT_LD_TU_MPLS,
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};
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enum npc_kpu_le_ltype {
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NPC_LT_LE_TU_ETHER = 1,
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NPC_LT_LE_TU_PPP,
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NPC_LT_LE_TU_MPLS_IN_NSH,
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NPC_LT_LE_TU_3RD_NSH,
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};
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enum npc_kpu_lf_ltype {
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NPC_LT_LF_TU_IP = 1,
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NPC_LT_LF_TU_IP6,
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NPC_LT_LF_TU_ARP,
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NPC_LT_LF_TU_MPLS_IP,
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NPC_LT_LF_TU_MPLS_IP6,
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NPC_LT_LF_TU_MPLS_ETHER,
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};
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enum npc_kpu_lg_ltype {
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NPC_LT_LG_TU_TCP = 1,
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NPC_LT_LG_TU_UDP,
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NPC_LT_LG_TU_SCTP,
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NPC_LT_LG_TU_ICMP,
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NPC_LT_LG_TU_IGMP,
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NPC_LT_LG_TU_ICMP6,
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NPC_LT_LG_TU_ESP,
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NPC_LT_LG_TU_AH,
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};
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enum npc_kpu_lh_ltype {
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NPC_LT_LH_TCP_DATA = 1,
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NPC_LT_LH_HTTP_DATA,
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NPC_LT_LH_HTTPS_DATA,
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NPC_LT_LH_PPTP_DATA,
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NPC_LT_LH_UDP_DATA,
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};
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struct npc_kpu_profile_cam {
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u8 state;
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u8 state_mask;
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u16 dp0;
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u16 dp0_mask;
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u16 dp1;
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u16 dp1_mask;
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u16 dp2;
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u16 dp2_mask;
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};
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struct npc_kpu_profile_action {
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u8 errlev;
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u8 errcode;
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u8 dp0_offset;
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u8 dp1_offset;
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u8 dp2_offset;
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u8 bypass_count;
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u8 parse_done;
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u8 next_state;
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u8 ptr_advance;
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u8 cap_ena;
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u8 lid;
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u8 ltype;
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u8 flags;
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u8 offset;
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u8 mask;
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u8 right;
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u8 shift;
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};
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struct npc_kpu_profile {
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int cam_entries;
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int action_entries;
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struct npc_kpu_profile_cam *cam;
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struct npc_kpu_profile_action *action;
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};
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/* NPC KPU register formats */
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struct npc_kpu_cam {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_56 : 8;
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u64 state : 8;
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u64 dp2_data : 16;
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u64 dp1_data : 16;
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u64 dp0_data : 16;
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#else
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u64 dp0_data : 16;
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u64 dp1_data : 16;
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u64 dp2_data : 16;
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u64 state : 8;
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u64 rsvd_63_56 : 8;
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#endif
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};
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struct npc_kpu_action0 {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_57 : 7;
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u64 byp_count : 3;
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u64 capture_ena : 1;
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u64 parse_done : 1;
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u64 next_state : 8;
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u64 rsvd_43 : 1;
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u64 capture_lid : 3;
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u64 capture_ltype : 4;
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u64 capture_flags : 8;
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u64 ptr_advance : 8;
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u64 var_len_offset : 8;
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u64 var_len_mask : 8;
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u64 var_len_right : 1;
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u64 var_len_shift : 3;
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#else
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u64 var_len_shift : 3;
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u64 var_len_right : 1;
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u64 var_len_mask : 8;
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u64 var_len_offset : 8;
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u64 ptr_advance : 8;
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u64 capture_flags : 8;
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u64 capture_ltype : 4;
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u64 capture_lid : 3;
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u64 rsvd_43 : 1;
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u64 next_state : 8;
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u64 parse_done : 1;
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u64 capture_ena : 1;
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u64 byp_count : 3;
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u64 rsvd_63_57 : 7;
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#endif
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};
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struct npc_kpu_action1 {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_36 : 28;
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u64 errlev : 4;
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u64 errcode : 8;
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u64 dp2_offset : 8;
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u64 dp1_offset : 8;
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u64 dp0_offset : 8;
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#else
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u64 dp0_offset : 8;
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u64 dp1_offset : 8;
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u64 dp2_offset : 8;
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u64 errcode : 8;
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u64 errlev : 4;
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u64 rsvd_63_36 : 28;
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#endif
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};
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struct npc_kpu_pkind_cpi_def {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 ena : 1;
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u64 rsvd_62_59 : 4;
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u64 lid : 3;
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u64 ltype_match : 4;
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u64 ltype_mask : 4;
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u64 flags_match : 8;
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u64 flags_mask : 8;
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u64 add_offset : 8;
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u64 add_mask : 8;
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u64 rsvd_15 : 1;
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u64 add_shift : 3;
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u64 rsvd_11_10 : 2;
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u64 cpi_base : 10;
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#else
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u64 cpi_base : 10;
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u64 rsvd_11_10 : 2;
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u64 add_shift : 3;
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u64 rsvd_15 : 1;
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u64 add_mask : 8;
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u64 add_offset : 8;
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u64 flags_mask : 8;
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u64 flags_match : 8;
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u64 ltype_mask : 4;
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u64 ltype_match : 4;
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u64 lid : 3;
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u64 rsvd_62_59 : 4;
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u64 ena : 1;
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#endif
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};
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struct nix_rx_action {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u64 rsvd_63_61 :3;
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u64 flow_key_alg :5;
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u64 match_id :16;
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u64 index :20;
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u64 pf_func :16;
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u64 op :4;
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#else
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u64 op :4;
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u64 pf_func :16;
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u64 index :20;
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u64 match_id :16;
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u64 flow_key_alg :5;
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u64 rsvd_63_61 :3;
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#endif
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};
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#endif /* NPC_H */
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