a665eec0a2
Commit 0cef77c7798a7 ("powerpc/64s/radix: flush remote CPUs out of
single-threaded mm_cpumask") added a mechanism to trim the mm_cpumask of
a process under certain conditions. One of the assumptions is that
mm_users would not be incremented via a reference outside the process
context with mmget_not_zero() then go on to kthread_use_mm() via that
reference.
That invariant was broken by io_uring code (see previous sparc64 fix),
but I'll point Fixes: to the original powerpc commit because we are
changing that assumption going forward, so this will make backports
match up.
Fix this by no longer relying on that assumption, but by having each CPU
check the mm is not being used, and clearing their own bit from the mask
only if it hasn't been switched-to by the time the IPI is processed.
This relies on commit 38cf307c1f20 ("mm: fix kthread_use_mm() vs TLB
invalidate") and ARCH_WANT_IRQS_OFF_ACTIVATE_MM to disable irqs over mm
switch sequences.
Fixes: 0cef77c7798a7 ("powerpc/64s/radix: flush remote CPUs out of single-threaded mm_cpumask")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Michael Ellerman <mpe@ellerman.id.au>
Depends-on: 38cf307c1f20 ("mm: fix kthread_use_mm() vs TLB invalidate")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200914045219.3736466-5-npiggin@gmail.com
91 lines
2.2 KiB
C
91 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* TLB shootdown specifics for powerpc
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*
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* Copyright (C) 2002 Anton Blanchard, IBM Corp.
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* Copyright (C) 2002 Paul Mackerras, IBM Corp.
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*/
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#ifndef _ASM_POWERPC_TLB_H
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#define _ASM_POWERPC_TLB_H
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#ifdef __KERNEL__
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#ifndef __powerpc64__
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#include <linux/pgtable.h>
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#endif
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#ifndef __powerpc64__
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#include <asm/page.h>
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#include <asm/mmu.h>
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#endif
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#include <linux/pagemap.h>
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#define tlb_start_vma(tlb, vma) do { } while (0)
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#define tlb_end_vma(tlb, vma) do { } while (0)
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#define __tlb_remove_tlb_entry __tlb_remove_tlb_entry
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#define tlb_flush tlb_flush
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extern void tlb_flush(struct mmu_gather *tlb);
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/*
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* book3s:
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* Hash does not use the linux page-tables, so we can avoid
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* the TLB invalidate for page-table freeing, Radix otoh does use the
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* page-tables and needs the TLBI.
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*
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* nohash:
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* We still do TLB invalidate in the __pte_free_tlb routine before we
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* add the page table pages to mmu gather table batch.
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*/
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#define tlb_needs_table_invalidate() radix_enabled()
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/* Get the generic bits... */
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#include <asm-generic/tlb.h>
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extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
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unsigned long address);
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static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
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unsigned long address)
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{
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#ifdef CONFIG_PPC_BOOK3S_32
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if (pte_val(*ptep) & _PAGE_HASHPTE)
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flush_hash_entry(tlb->mm, ptep, address);
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#endif
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}
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#ifdef CONFIG_SMP
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static inline int mm_is_core_local(struct mm_struct *mm)
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{
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return cpumask_subset(mm_cpumask(mm),
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topology_sibling_cpumask(smp_processor_id()));
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}
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#ifdef CONFIG_PPC_BOOK3S_64
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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if (atomic_read(&mm->context.active_cpus) > 1)
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return false;
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return cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm));
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}
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#else /* CONFIG_PPC_BOOK3S_64 */
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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return cpumask_equal(mm_cpumask(mm),
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cpumask_of(smp_processor_id()));
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}
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#endif /* !CONFIG_PPC_BOOK3S_64 */
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#else /* CONFIG_SMP */
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static inline int mm_is_core_local(struct mm_struct *mm)
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{
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return 1;
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}
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static inline int mm_is_thread_local(struct mm_struct *mm)
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{
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return 1;
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}
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_POWERPC_TLB_H */
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