01ac59c344
The Bt455 is a greyscale RAMDAC, using the green color palette entries
only while still providing registers for the red and blue components,
all the three of which have to be loaded on palette updates. Chip
documentation [1] mandates that the unused red and blue registers are
written with 0.
Therefore update code to follow this requirement and given that it makes
the red and blue components unusable remove them from internal API calls
altogether.
References:
[1] "Bt454 Bt455 170 MHz Monolithic CMOS 16 Color Palette RAMDAC",
Brooktree Corporation, Document Number: L454001, Rev. I
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
71 lines
1.4 KiB
C
71 lines
1.4 KiB
C
/*
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* linux/drivers/video/bt455.h
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*
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* Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* Copyright 2016 Maciej W. Rozycki <macro@linux-mips.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*/
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#include <linux/types.h>
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/*
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* Bt455 byte-wide registers, 32-bit aligned.
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*/
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struct bt455_regs {
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volatile u8 addr_cmap;
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u8 pad0[3];
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volatile u8 addr_cmap_data;
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u8 pad1[3];
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volatile u8 addr_clr;
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u8 pad2[3];
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volatile u8 addr_ovly;
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u8 pad3[3];
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};
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static inline void bt455_select_reg(struct bt455_regs *regs, int ir)
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{
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mb();
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regs->addr_cmap = ir & 0x0f;
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}
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/*
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* Read/write to a Bt455 color map register.
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*/
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static inline void bt455_read_cmap_entry(struct bt455_regs *regs,
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int cr, u8 *grey)
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{
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bt455_select_reg(regs, cr);
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mb();
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regs->addr_cmap_data;
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rmb();
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*grey = regs->addr_cmap_data & 0xf;
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rmb();
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regs->addr_cmap_data;
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}
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static inline void bt455_write_cmap_entry(struct bt455_regs *regs,
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int cr, u8 grey)
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{
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bt455_select_reg(regs, cr);
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wmb();
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regs->addr_cmap_data = 0x0;
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wmb();
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regs->addr_cmap_data = grey & 0xf;
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wmb();
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regs->addr_cmap_data = 0x0;
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}
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static inline void bt455_write_ovly_entry(struct bt455_regs *regs,
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int cr, u8 grey)
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{
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bt455_select_reg(regs, cr);
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wmb();
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regs->addr_ovly = 0x0;
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wmb();
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regs->addr_ovly = grey & 0xf;
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wmb();
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regs->addr_ovly = 0x0;
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}
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