02ec75edaa
access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). Description of this property is added to all peripheral binding files of the peripheral under the STM32 firewall controller. It allows an accurate representation of the hardware, where various peripherals are connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
287 lines
8.1 KiB
YAML
287 lines
8.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 USB HS PHY controller
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description:
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The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
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switch. It controls PHY configuration and status, and the UTMI+ switch that
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selects either OTG or HOST controller for the second PHY port. It also sets
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PLL configuration.
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USBPHYC
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|_ PLL
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|_ PHY port#1 _________________ HOST controller
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| __ |
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| / 1|________________|
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|_ PHY port#2 ----| |________________
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| \_0| |
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|_ UTMI switch_______| OTG controller
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maintainers:
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- Amelie Delaunay <amelie.delaunay@foss.st.com>
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properties:
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compatible:
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const: st,stm32mp1-usbphyc
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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vdda1v1-supply:
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description: regulator providing 1V1 power supply to the PLL block
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vdda1v8-supply:
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description: regulator providing 1V8 power supply to the PLL block
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'#clock-cells':
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description: number of clock cells for ck_usbo_48m consumer
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const: 0
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access-controllers:
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minItems: 1
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maxItems: 2
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# Required child nodes:
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patternProperties:
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"^usb-phy@[0|1]$":
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type: object
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description:
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Each port the controller provides must be represented as a sub-node.
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properties:
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reg:
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description: phy port index.
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maxItems: 1
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phy-supply:
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description: regulator providing 3V3 power supply to the PHY.
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"#phy-cells":
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enum: [ 0x0, 0x1 ]
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connector:
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type: object
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$ref: /schemas/connector/usb-connector.yaml
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unevaluatedProperties: false
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properties:
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vbus-supply: true
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# It can be necessary to adjust the PHY settings to compensate parasitics, which can be due
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# to USB connector/receptacle, routing, ESD protection component,... Here is the list of
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# all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full-
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# Speed, LS for Low-Speed)
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st,current-boost-microamp:
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description: Current boosting in uA
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enum: [ 1000, 2000 ]
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st,no-lsfs-fb-cap:
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description: Disables the LS/FS feedback capacitor
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type: boolean
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st,decrease-hs-slew-rate:
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description: Decreases the HS driver slew rate by 10%
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type: boolean
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st,tune-hs-dc-level:
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description: |
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Tunes the HS driver DC level
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- <0> normal level
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- <1> increases the level by 5 to 7 mV
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- <2> increases the level by 10 to 14 mV
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- <3> decreases the level by 5 to 7 mV
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 0
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st,enable-fs-rftime-tuning:
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description: Enables the FS rise/fall tuning option
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type: boolean
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st,enable-hs-rftime-reduction:
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description: Enables the HS rise/fall reduction feature
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type: boolean
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st,trim-hs-current:
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description: |
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Controls HS driver current trimming for choke compensation
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- <0> = 18.87 mA target current / nominal + 0%
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- <1> = 19.165 mA target current / nominal + 1.56%
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- <2> = 19.46 mA target current / nominal + 3.12%
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- <3> = 19.755 mA target current / nominal + 4.68%
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- <4> = 20.05 mA target current / nominal + 6.24%
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- <5> = 20.345 mA target current / nominal + 7.8%
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- <6> = 20.64 mA target current / nominal + 9.36%
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- <7> = 20.935 mA target current / nominal + 10.92%
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- <8> = 21.23 mA target current / nominal + 12.48%
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- <9> = 21.525 mA target current / nominal + 14.04%
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- <10> = 21.82 mA target current / nominal + 15.6%
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- <11> = 22.115 mA target current / nominal + 17.16%
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- <12> = 22.458 mA target current / nominal + 19.01%
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- <13> = 22.755 mA target current / nominal + 20.58%
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- <14> = 23.052 mA target current / nominal + 22.16%
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- <15> = 23.348 mA target current / nominal + 23.73%
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 15
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default: 0
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st,trim-hs-impedance:
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description: |
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Controls HS driver impedance tuning for choke compensation
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- <0> = no impedance offset
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- <1> = reduce the impedance by 2 ohms
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- <2> = reduce the impedance by 4 ohms
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- <3> = reduce the impedance by 6 ohms
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 0
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st,tune-squelch-level:
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description: |
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Tunes the squelch DC threshold value
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- <0> = no shift in threshold
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- <1> = threshold shift by +7 mV
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- <2> = threshold shift by -5 mV
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- <3> = threshold shift by +14 mV
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 0
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st,enable-hs-rx-gain-eq:
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description: Enables the HS Rx gain equalizer
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type: boolean
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st,tune-hs-rx-offset:
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description: |
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Adjusts the HS Rx offset
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- <0> = no offset
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- <1> = offset of +5 mV
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- <2> = offset of +10 mV
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- <3> = offset of -5 mV
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 0
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st,no-hs-ftime-ctrl:
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description: Disables the HS fall time control of single ended signals during pre-emphasis
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type: boolean
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st,no-lsfs-sc:
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description: Disables the short circuit protection in LS/FS driver
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type: boolean
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st,enable-hs-tx-staggering:
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description: Enables the basic staggering in HS Tx mode
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type: boolean
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allOf:
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- if:
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properties:
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reg:
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const: 0
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then:
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properties:
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"#phy-cells":
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const: 0
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else:
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properties:
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"#phy-cells":
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const: 1
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description:
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The value is used to select UTMI switch output.
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0 for OTG controller and 1 for Host controller.
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required:
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- reg
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- phy-supply
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- "#phy-cells"
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additionalProperties: false
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required:
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- compatible
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- reg
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- clocks
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- "#address-cells"
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- "#size-cells"
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- vdda1v1-supply
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- vdda1v8-supply
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- usb-phy@0
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- usb-phy@1
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/stm32mp1-clks.h>
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#include <dt-bindings/reset/stm32mp1-resets.h>
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usbphyc: usbphyc@5a006000 {
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compatible = "st,stm32mp1-usbphyc";
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reg = <0x5a006000 0x1000>;
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clocks = <&rcc USBPHY_K>;
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resets = <&rcc USBPHY_R>;
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vdda1v1-supply = <®11>;
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vdda1v8-supply = <®18>;
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#address-cells = <1>;
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#size-cells = <0>;
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#clock-cells = <0>;
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usbphyc_port0: usb-phy@0 {
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reg = <0>;
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phy-supply = <&vdd_usb>;
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#phy-cells = <0>;
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st,tune-hs-dc-level = <2>;
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st,enable-fs-rftime-tuning;
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st,enable-hs-rftime-reduction;
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st,trim-hs-current = <15>;
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st,trim-hs-impedance = <1>;
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st,tune-squelch-level = <3>;
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st,tune-hs-rx-offset = <2>;
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st,no-lsfs-sc;
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connector {
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compatible = "usb-a-connector";
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vbus-supply = <&vbus_sw>;
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};
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};
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usbphyc_port1: usb-phy@1 {
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reg = <1>;
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phy-supply = <&vdd_usb>;
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#phy-cells = <1>;
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st,tune-hs-dc-level = <2>;
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st,enable-fs-rftime-tuning;
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st,enable-hs-rftime-reduction;
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st,trim-hs-current = <15>;
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st,trim-hs-impedance = <1>;
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st,tune-squelch-level = <3>;
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st,tune-hs-rx-offset = <2>;
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st,no-lsfs-sc;
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};
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};
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...
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