Mesih Kilinc 0380126eb9

clk: sunxi-ng: add support for suniv F1C100s SoC ...

The suniv F1C100s SoC (the chip in some new F-series products of
Allwinner)
has a CCU which seems to be a stripped version of the CCU in SoCs after
sun6i.

Add support for the CCU.

Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

2018-12-04 08:41:13 +01:00

..

ccu_common.c

Allwinner clock patches for 4.12

2017-04-19 09:02:00 -07:00

ccu_common.h

clk: move clock common macros out from vendor directories

2017-12-21 15:00:38 -08:00

ccu_div.c

clk: divider: fix incorrect usage of container_of

2017-12-28 15:16:04 -08:00

ccu_div.h

clk: sunxi-ng: div: Add support for fixed post-divider

2017-08-14 22:31:46 +08:00

ccu_frac.c

clk: sunxi-ng: Wait for lock when using fractional mode

2017-08-01 10:18:23 +08:00

ccu_frac.h

clk: sunxi-ng: Wait for lock when using fractional mode

2017-08-01 10:18:23 +08:00

ccu_gate.c

clk: sunxi-ng: gate: Support common pre-dividers

2017-03-06 10:25:56 +01:00

ccu_gate.h

clk: sunxi-ng: Add gate clock support

2016-07-08 18:04:38 -07:00

ccu_mmc_timing.c

clk: sunxi-ng: Add interface to query or configure MMC timing modes.

2017-08-30 14:01:47 +02:00

ccu_mp.c

clk: sunxi-ng: Adjust MP clock parent rate when allowed

2018-11-05 10:21:01 +01:00

ccu_mp.h

clk: sunxi-ng: Support fixed post-dividers on MP style clocks

2017-12-07 10:09:44 +01:00

ccu_mult.c

clk: sunxi-ng: Wait for lock when using fractional mode

2017-08-01 10:18:23 +08:00

ccu_mult.h

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

2017-11-02 11:10:55 +01:00

ccu_mux.c

clk: sunxi-ng: Staticize ccu_mux_helper_unapply_prediv()

2017-06-16 14:51:36 -07:00

ccu_mux.h

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

2017-11-02 11:10:55 +01:00

ccu_nk.c

clk: sunxi-ng: use 1 as fallback for minimum multiplier

2017-04-13 14:09:25 +02:00

ccu_nk.h

clk: sunxi-ng: Rename the internal structures

2016-10-20 19:24:20 +02:00

ccu_nkm.c

clk: sunxi-ng: nkm: add support for fixed post-divider

2017-08-14 22:45:06 +08:00

ccu_nkm.h

clk: sunxi-ng: nkm: add support for fixed post-divider

2017-08-14 22:45:06 +08:00

ccu_nkmp.c

clk: sunxi-ng: nkmp: Add constraint for maximum rate

2018-08-27 09:18:10 +02:00

ccu_nkmp.h

clk: sunxi-ng: nkmp: Add constraint for maximum rate

2018-08-27 09:18:10 +02:00

ccu_nm.c

clk: sunxi-ng: Use u64 for calculation of NM rate

2018-11-05 10:21:29 +01:00

ccu_nm.h

clk: sunxi-ng: Add maximum rate constraint to NM PLLs

2018-08-27 09:18:01 +02:00

ccu_phase.c

clk: sunxi-ng: Add phase clock support

2016-07-08 18:04:45 -07:00

ccu_phase.h

clk: sunxi-ng: Add phase clock support

2016-07-08 18:04:45 -07:00

ccu_reset.c

clk: sunxi-ng: Implement reset control status readback

2017-09-26 11:13:03 +02:00

ccu_reset.h

clk: sunxi-ng: explicitly include linux/spinlock.h

2017-06-07 15:32:12 +02:00

ccu_sdm.c

clk: sunxi-ng: Add sigma-delta modulation support

2017-10-13 09:27:06 +02:00

ccu_sdm.h

clk: sunxi-ng: Add sigma-delta modulation support

2017-10-13 09:27:06 +02:00

ccu-sun4i-a10.c

clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest setting

2018-09-07 10:20:50 +02:00

ccu-sun4i-a10.h

clk: sunxi-ng: sun4i: Export video PLLs

2017-10-17 19:32:16 +02:00

ccu-sun5i.c

clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLL

2017-10-13 09:27:29 +02:00

ccu-sun5i.h

clk: sunxi-ng: sun5i: Export video PLLs

2017-06-07 15:32:14 +02:00

ccu-sun6i-a31.c

clk: sunxi-ng: a31: Fix CLK_OUT_* clock ops

2018-02-19 08:59:50 +01:00

ccu-sun6i-a31.h

clk: sunxi-ng: sun6i: Export video PLLs

2017-09-29 10:46:10 +02:00

ccu-sun8i-a23-a33.h

clk: sunxi-ng: Add A33 CCU support

2016-09-10 11:41:19 +02:00

ccu-sun8i-a23.c

clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLL

2017-10-13 09:27:38 +02:00

ccu-sun8i-a33.c

clk: Convert to using %pOF instead of full_name

2017-07-21 15:49:54 -07:00

ccu-sun8i-a83t.c

clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs

2018-08-27 09:18:11 +02:00

ccu-sun8i-a83t.h

clk: sunxi-ng: Add driver for A83T CCU

2017-06-07 15:32:16 +02:00

ccu-sun8i-de2.c

clk: sunxi-ng: Add support for H6 DE3 clocks

2018-11-05 10:22:50 +01:00

ccu-sun8i-de2.h

clk: sunxi-ng: Add support for H6 DE3 clocks

2018-11-05 10:22:50 +01:00

ccu-sun8i-h3.c

clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent

2018-12-03 23:54:07 +08:00

ccu-sun8i-h3.h

clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO

2018-03-02 08:42:30 +01:00

ccu-sun8i-r40.c

clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output

2018-11-30 11:54:39 +08:00

ccu-sun8i-r40.h

clk: sunxi-ng: r40: Export video PLLs

2018-06-27 19:06:56 +02:00

ccu-sun8i-r.c

clk: Convert to using %pOF instead of full_name

2017-07-21 15:49:54 -07:00

ccu-sun8i-r.h

clk: sunxi-ng: Fix header guard of ccu-sun8i-r.h

2017-07-27 16:53:47 +02:00

ccu-sun8i-v3s.c

clk: Convert to using %pOF instead of full_name

2017-07-21 15:49:54 -07:00

ccu-sun8i-v3s.h

clk: sunxi-ng: add support for V3s CCU

2017-01-20 21:39:03 +01:00

ccu-sun9i-a80-de.c

clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()

2017-02-06 15:01:29 -08:00

ccu-sun9i-a80-de.h

clk: sunxi-ng: Add A80 Display Engine CCU

2017-01-30 08:38:30 +01:00

ccu-sun9i-a80-usb.c

clk: sunxi-ng: Add A80 USB CCU

2017-01-30 08:37:51 +01:00

ccu-sun9i-a80-usb.h

clk: sunxi-ng: Add A80 USB CCU

2017-01-30 08:37:51 +01:00

ccu-sun9i-a80.c

clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code

2017-04-13 14:09:30 +02:00

ccu-sun9i-a80.h

clk: sunxi-ng: Add A80 CCU

2017-01-30 08:37:30 +01:00

ccu-sun50i-a64.c

clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL

2018-11-23 23:22:01 +08:00

ccu-sun50i-a64.h

dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro

2018-09-05 09:19:59 +02:00

ccu-sun50i-h6-r.c

clk: sunxi-ng: add support for H6 PRCM CCU

2018-05-04 17:05:46 +02:00

ccu-sun50i-h6-r.h

clk: sunxi-ng: add support for H6 PRCM CCU

2018-05-04 17:05:46 +02:00

ccu-sun50i-h6.c

clk: sunxi-ng: h6: Set video PLLs limits

2018-11-05 10:21:43 +01:00

ccu-sun50i-h6.h

clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU

2018-03-21 12:27:13 +01:00

ccu-suniv-f1c100s.c

clk: sunxi-ng: add support for suniv F1C100s SoC

2018-12-04 08:41:13 +01:00

ccu-suniv-f1c100s.h

clk: sunxi-ng: add support for suniv F1C100s SoC

2018-12-04 08:41:13 +01:00

Kconfig

clk: sunxi-ng: add support for suniv F1C100s SoC

2018-12-04 08:41:13 +01:00

Makefile

clk: sunxi-ng: add support for suniv F1C100s SoC

2018-12-04 08:41:13 +01:00