042b67799e
Most of the blk-ctrl reset bits are found in one register, however
there are two bits in offset 8 for pulling the MIPI DPHY out of reset
and one of them needs to be set when IMX8MM_DISPBLK_PD_MIPI_CSI is brought
out of reset or the MIPI_CSI hangs.
Since MIPI_DSI is impacted, add the additional one for MIPI_DSI too.
Fixes:
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.. | ||
gpc.c | ||
gpcv2.c | ||
imx8m-blk-ctrl.c | ||
Kconfig | ||
Makefile | ||
soc-imx8m.c | ||
soc-imx.c |